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/linux/Documentation/devicetree/bindings/regulator/
H A Drohm,bd71815-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71815-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
33 regulator-name:
37 "^((ldo|buck)[1-5]|ldolpsr|ldodvref)$":
44 regulator-name:
[all …]
H A Drohm,bd71847-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
20 Note that if BD71847 starts at RUN state you probably want to use
21 regulator-boot-on at least for BUCK5. LDO6 is supplied by it and it must
23 voltage monitoring for LDO5/LDO6 can cause PMIC to reset.
30 "^LDO[1-6]$":
[all …]
H A Drohm,bd71837-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71837-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
20 Note that if BD71837 starts at RUN state you probably want to use
21 regulator-boot-on at least for BUCK6 and BUCK7 so that those are not
23 if they are disabled at startup the voltage monitoring for LDO5/LDO6 will
31 "^LDO[1-7]$":
[all …]
H A Drohm,bd71828-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71828-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
25 "^LDO[1-7]$":
32 regulator-name:
33 pattern: "^ldo[1-7]$"
[all …]
H A Dnxp,pca9450-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/nxp,pca9450-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robin Gong <yibin.gong@nxp.com>
18 https://www.nxp.com/docs/en/data-sheet/PCA9450DS.pdf
21 https://www.nxp.com/docs/en/data-sheet/PF9453_SDS.pdf
31 - nxp,pca9450a
32 - nxp,pca9450b
33 - nxp,pca9450c
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-pico-pi.dts1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "TechNexion PICO-PI-8M";
16 compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
19 stdout-path = &uart1;
22 pmic_osc: clock-pmic {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <32768>;
[all …]
H A Dimx8mq-phanbell.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2017-2019 NXP
6 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pmic_osc: clock-pmic {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <32768>;
[all …]
H A Dimx8mm-kontron-sl.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 compatible = "kontron,imx8mm-sl", "fsl,imx8mm";
23 stdout-path = &uart3;
28 cpu-supply = <&reg_vdd_arm>;
32 cpu-supply = <&reg_vdd_arm>;
36 cpu-supply = <&reg_vdd_arm>;
40 cpu-supply = <&reg_vdd_arm>;
44 operating-points-v2 = <&ddrc_opp_table>;
46 ddrc_opp_table: opp-table {
47 compatible = "operating-points-v2";
[all …]
H A Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
18 enable-active-high;
[all …]
H A Dimx8mq-librem5-devkit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
17 compatible = "purism,librem5-devkit", "fsl,imx8mq";
19 backlight_dsi: backlight-dsi {
[all …]
H A Dimx8mp-icore-mx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 compatible = "engicam,icore-mx8mp", "fsl,imx8mp";
13 cpu-supply = <&buck2>;
17 cpu-supply = <&buck2>;
21 cpu-supply = <&buck2>;
25 cpu-supply = <&buck2>;
29 clock-frequency = <100000>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_i2c1>;
36 interrupt-parent = <&gpio3>;
[all …]
H A Dimx8mq-librem5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
18 chassis-type = "handset";
20 backlight_dsi: backlight-dsi {
[all …]
H A Dimx8mp-debix-som-a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/leds/common.h>
13 compatible = "polyhex,imx8mp-debix-som-a", "fsl,imx8mp";
15 reg_usdhc2_vmmc: regulator-usdhc2 {
16 compatible = "regulator-fixed";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
19 regulator-name = "VSD_3V3";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
[all …]
H A Dimx8mp-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/net/ti-dp83867.h>
11 model = "PHYTEC phyCORE-i.MX8MP";
12 compatible = "phytec,imx8mp-phycore-som", "fsl,imx8mp";
24 reg_vdd_io: regulator-vdd-io {
25 compatible = "regulator-fixed";
26 regulator-always-on;
27 regulator-boot-on;
28 regulator-max-microvolt = <3300000>;
29 regulator-min-microvolt = <3300000>;
[all …]
H A Dimx8mp-tqma8mpql.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2025 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
11 model = "TQ-Systems i.MX8MPlus TQMa8MPxL";
12 compatible = "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
19 reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {
20 compatible = "regulator-gpio";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_reg_usdhc2_vqmmc>;
23 regulator-name = "V_SD2";
[all …]
H A Dimx8mp-tx8p-ml81.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2020 Lothar Waßmann <LW@KARO-electronics.de>
11 regulator-3v3-etn {
12 compatible = "regulator-fixed";
14 enable-active-high;
15 pinctrl-0 = <&pinctrl_reg_3v3_etn>;
16 pinctrl-names = "default";
17 regulator-always-on;
18 regulator-boot-on;
19 regulator-max-microvolt = <3300000>;
[all …]
H A Dimx8mn-tqma8mqnl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
9 model = "TQ-Systems i.MX8MN TQMa8MxNL";
10 compatible = "tq,imx8mn-tqma8mqnl", "fsl,imx8mn";
18 /* e-MMC IO, needed for HS modes */
19 reg_vcc1v8: regulator-vcc1v8 {
20 compatible = "regulator-fixed";
21 regulator-name = "TQMA8MXNL_VCC1V8";
22 regulator-min-microvolt = <1800000>;
23 regulator-max-microvolt = <1800000>;
[all …]
H A Dimx8mm-tqma8mqml.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML";
11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
19 /* e-MMC IO, needed for HS modes */
20 reg_vcc1v8: regulator-vcc1v8 {
21 compatible = "regulator-fixed";
22 regulator-name = "TQMA8MXML_VCC1V8";
23 regulator-min-microvolt = <1800000>;
[all …]
H A Dimx8mn-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx8mn-overdrive.dtsi"
16 compatible = "mmc-pwrseq-simple";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
19 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
21 clock-names = "ext_clock";
22 post-power-on-delay-ms = <80>;
32 cpu-supply = <&buck2_reg>;
36 cpu-supply = <&buck2_reg>;
[all …]
/linux/drivers/regulator/
H A Dbd71815-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
4 // bd71815-regulator.c ROHM BD71815 regulator driver
21 #include <linux/mfd/rohm-generic.h>
22 #include <linux/mfd/rohm-bd71815.h>
27 const struct rohm_dvs_config *dvs; member
179 return rohm_regulator_set_dvs_levels(data->dvs, np, desc, cfg->regmap); in set_hw_dvs_levels()
183 * Bucks 1 and 2 have two voltage selection registers where selected
184 * voltage can be set. Which of the registers is used can be either controlled
185 * by a control bit in register - or by HW state. If HW state specific voltages
186 * are given - then we assume HW state based control should be used.
[all …]
H A Dwm831x-dcdc.c1 // SPDX-License-Identifier: GPL-2.0+
3 // wm831x-dcdc.c -- DC-DC buck converter driver for the WM831x series
63 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_get_mode()
64 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_get_mode()
84 return -EINVAL; in wm831x_dcdc_get_mode()
107 return -EINVAL; in wm831x_dcdc_set_mode_int()
117 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_mode()
118 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_set_mode()
127 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_suspend_mode()
128 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; in wm831x_dcdc_set_suspend_mode()
[all …]
H A Dpf9453-regulator.c1 // SPDX-License-Identifier: GPL-2.0
30 const struct pf9453_dvs_config dvs; member
216 .max_register = PF9453_MAX_REG - 1,
222 * BUCK2RAM[1:0] BUCK2 DVS ramp rate setting
253 int ret = -EINVAL; in pf9453_pmic_write()
257 /* If not updating entire register, perform a read-mod-write */ in pf9453_pmic_write()
263 ret = regmap_read(pf9453->regmap, reg, &rxBuf); in pf9453_pmic_write()
265 dev_err(pf9453->dev, "Read reg=%0x error!\n", reg); in pf9453_pmic_write()
273 ret = regmap_raw_write(pf9453->regmap, PF9453_REG_LOCK, &key, 1U); in pf9453_pmic_write()
275 dev_err(pf9453->dev, "Write reg=%0x error!\n", reg); in pf9453_pmic_write()
[all …]
H A Dpca9450-regulator.c1 // SPDX-License-Identifier: GPL-2.0
20 #include <dt-bindings/regulator/nxp,pca9450-regulator.h>
36 const struct pc9450_dvs_config dvs; member
63 .max_register = PCA9450_MAX_REGISTER - 1,
69 * BUCK1RAM[1:0] BUCK1 DVS ramp rate setting
117 if (pca9450->sd_vsel_fixed_low) in pca9450_ldo5_get_reg_voltage_sel()
120 if (pca9450->sd_vsel_gpio && !gpiod_get_value(pca9450->sd_vsel_gpio)) in pca9450_ldo5_get_reg_voltage_sel()
123 return rdev->desc->vsel_reg; in pca9450_ldo5_get_reg_voltage_sel()
131 ret = regmap_read(rdev->regmap, pca9450_ldo5_get_reg_voltage_sel(rdev), &val); in pca9450_ldo5_get_voltage_sel_regmap()
135 val &= rdev->desc->vsel_mask; in pca9450_ldo5_get_voltage_sel_regmap()
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd71847-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic…
24 - rohm,bd71847
25 - rohm,bd71850
[all …]
/linux/include/linux/mfd/
H A Drohm-generic.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
40 * struct rohm_dvs_config - dynamic voltage scaling register descriptions
42 * @level_map: bitmap representing supported run-levels for this
44 * @run_reg: register address for regulator config at 'run' state
45 * @run_mask: value mask for regulator voltages at 'run' state
46 * @run_on_mask: enable mask for regulator at 'run' state
57 * Description of ROHM PMICs voltage configuration registers for different
81 int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs,

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