Home
last modified time | relevance | path

Searched +full:clock +full:- +full:skip (Results 1 – 25 of 506) sorted by relevance

12345678910>>...21

/linux/tools/testing/selftests/ptp/
H A Dphc.sh2 # SPDX-License-Identifier: GPL-2.0
14 if [[ "$(id -u)" -ne 0 ]]; then
15 echo "SKIP: need root privileges"
20 echo "SKIP: PTP device not provided"
28 if [[ ! -x "$(command -v "$cmd")" ]]; then
29 echo "SKIP: $cmd not installed"
39 echo "SKIP: unknown clock $DEV: No such device"
52 # Per-test return value. Clear at the beginning of each test.
59 if [[ $RET -eq 0 && $err -ne 0 ]]; then
68 if [[ $RET -ne 0 ]]; then
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dsilabs,si570.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/silabs,si570.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Silicon Labs Si570/Si571/Si598/Si599 programmable I2C clock generator
10 - Soren Brinkmann <soren.brinkmann@xilinx.com>
13 Silicon Labs 570, 571, 598 and 599 programmable I2C clock generators. Details
19 https://www.silabs.com/Support%20Documents/TechnicalDocs/si598-99.pdf
24 - silabs,si570
25 - silabs,si571
[all …]
H A Dcirrus,cs2000-cp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/cirrus,cs2000-cp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
13 The CS2000-CP is an extremely versatile system clocking device that
21 - cirrus,cs2000-cp
25 Common clock binding for CLK_IN, XTI/REF_CLK
28 clock-names:
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Dfsmc-nand.txt5 - compatible : "st,spear600-fsmc-nand", "stericsson,fsmc-nand"
6 - reg : Address range of the mtd chip
7 - reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"
10 - bank-width : Width (in bytes) of the device. If not present, the width
12 - nand-skip-bbtscan: Indicates the BBT scanning should be skipped
13 - timings: array of 6 bytes for NAND timings. The meanings of these bytes
15 byte 0 TCLR : CLE to RE delay in number of AHB clock cycles, only 4 bits
16 are valid. Zero means one clockcycle, 15 means 16 clock
19 byte 2 THIZ : number of HCLK clock cycles during which the data bus is
20 kept in Hi-Z (tristate) after the start of a write access.
[all …]
/linux/drivers/clk/
H A Dclk-conf.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
9 #include <linux/clk/clk-conf.h>
21 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
22 "#clock-cells"); in __set_clk_parents()
23 if (num_parents == -EINVAL) in __set_clk_parents()
24 pr_err("clk: invalid value of clock-parents property at %pOF\n", in __set_clk_parents()
28 rc = of_parse_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
29 "#clock-cells", index, &clkspec); in __set_clk_parents()
31 /* skip empty (null) phandles */ in __set_clk_parents()
[all …]
H A Dclk-s2mps11.c1 // SPDX-License-Identifier: GPL-2.0+
3 // clk-s2mps11.c - Clock driver for S2MPS11.
12 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/samsung,s2mps11.h>
42 return regmap_update_bits(s2mps11->iodev->regmap_pmic, in s2mps11_clk_prepare()
43 s2mps11->reg, in s2mps11_clk_prepare()
44 s2mps11->mask, s2mps11->mask); in s2mps11_clk_prepare()
51 regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg, in s2mps11_clk_unprepare()
52 s2mps11->mask, ~s2mps11->mask); in s2mps11_clk_unprepare()
61 ret = regmap_read(s2mps11->iodev->regmap_pmic, in s2mps11_clk_is_prepared()
[all …]
/linux/tools/perf/tests/shell/lib/
H A Dstat_output.sh2 # SPDX-License-Identifier: GPL-2.0
7 [ "$(id -u)" != 0 ] && [ "$(cat /proc/sys/kernel/perf_event_paranoid)" -gt $1 ]
13 echo -n "Checking $1 output: no args "
15 commachecker --no-args
21 echo -n "Checking $1 output: system wide "
24 echo "[Skip] paranoid and not root"
27 perf stat -a $2 true
28 commachecker --system-wide
34 echo -n "Checking $1 output: system wide no aggregation "
37 echo "[Skip] paranoid and not root"
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dqcom,ipa.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alex Elder <elder@kernel.org>
21 and has a distinct interrupt and a separately-defined address space.
28 - |
29 -------- ---------
31 | AP +<---. .----+ Modem |
32 | +--. | | .->+ |
34 -------- | | | | ---------
[all …]
/linux/tools/perf/tests/shell/
H A Dstat+json_output.sh3 # SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)
7 set -e
19 rm -f "${stat_output}"
21 trap - EXIT TERM INT
33 [ "$(id -u)" != 0 ] && [ "$(cat /proc/sys/kernel/perf_event_paranoid)" -gt $1 ]
38 echo -n "Checking json output: no args "
39 perf stat -j -o "${stat_output}" true
40 $PYTHON $pythonchecker --no-args --file "${stat_output}"
46 echo -n "Checking json output: system wide "
49 echo "[Skip] paranoia and not root"
[all …]
H A Dscript.sh3 # SPDX-License-Identifier: GPL-2.0
5 set -e
7 temp_dir=$(mktemp -d /tmp/perf-test-script.XXXXXXXXXX)
16 trap - EXIT TERM INT
17 sane=$(echo "${temp_dir}" | cut -b 1-21)
18 if [ "${sane}" = "/tmp/perf-test-script" ] ; then
19 echo "--- Cleaning up ---"
20 rm -rf "${temp_dir:?}/"*
39 if perf version --build-options | grep python | grep -q OFF ; then
40 echo "SKIP: python scripting is not supported"
[all …]
H A Dstat+std_output.sh3 # SPDX-License-Identifier: GPL-2.0
7 set -e
14 …(cpu-clock task-clock context-switches cpu-migrations page-faults stalled-cycles-frontend stalled-
19 rm -f "${stat_output}"
21 trap - EXIT TERM INT
33 local -i metric_only=0
36 in "--interval") prefix=2
37 ;; "--per-thread") prefix=2
38 ;; "--system-wide-no-aggr") prefix=2
39 ;; "--per-core") prefix=3
[all …]
/linux/drivers/net/ethernet/xscale/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 kernel: saying N will just cause the configurator to skip all
28 Say Y here if you want to use built-in Ethernet ports
32 bool "Intel IXP46x as PTP clock"
38 clock. This clock is only useful if your PTP programs are
/linux/drivers/i2c/busses/
H A Di2c-thunderx-pcidrv.c17 #include <linux/i2c-smbus.h>
24 #include "i2c-octeon-core.h"
26 #define DRV_NAME "i2c-thunderx"
38 * The interrupt will be asserted when there is non-STAT_IDLE state in the
44 i2c->twsi_base + TWSI_INT_ENA_W1S); in thunder_i2c_int_enable()
53 i2c->twsi_base + TWSI_INT_ENA_W1C); in thunder_i2c_int_disable()
59 i2c->twsi_base + TWSI_INT_ENA_W1S); in thunder_i2c_hlc_int_enable()
65 i2c->twsi_base + TWSI_INT_ENA_W1C); in thunder_i2c_hlc_int_disable()
91 i2c->clk = clk_get(dev, NULL); in thunder_i2c_clock_enable()
92 if (IS_ERR(i2c->clk)) { in thunder_i2c_clock_enable()
[all …]
/linux/tools/testing/selftests/vDSO/
H A Dvdso_test_correctness.c1 // SPDX-License-Identifier: GPL-2.0
3 * ldt_gdt.c - Test cases for LDT and GDT access
4 * Copyright (c) 2011-2015 Andrew Lutomirski
47 /* max length of lines in /proc/self/maps - anything longer is skipped here */
86 if (sscanf(line, "%p-%p %c-%cp %*x %*x:%*x %*u %s", in vsyscall_getcpu()
113 void *vdso = dlopen("linux-vdso.so.1", in fill_function_pointers()
116 vdso = dlopen("linux-gate.so.1", in fill_function_pointers()
119 vdso = dlopen("linux-vdso32.so.1", in fill_function_pointers()
122 vdso = dlopen("linux-vdso64.so.1", in fill_function_pointers()
226 if (a->tv_sec != b->tv_sec) in ts_leq()
[all …]
/linux/sound/usb/
H A Dusbaudio.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 /* handling of USB vendor/product ID pairs as 32-bit numbers */
56 struct list_head ep_list; /* list of audio-related endpoints */
58 struct list_head clock_ref_list; /* list of clock refcounts */
80 #define USB_AUDIO_IFACE_UNUSED ((void *)-1L)
83 dev_err(&(chip)->dev->dev, fmt, ##args)
85 dev_err_ratelimited(&(chip)->dev->dev, fmt, ##args)
87 dev_warn(&(chip)->dev->dev, fmt, ##args)
89 dev_info(&(chip)->dev->dev, fmt, ##args)
91 dev_dbg(&(chip)->dev->dev, fmt, ##args)
[all …]
/linux/drivers/gpu/drm/gma500/
H A Dintel_bios.c1 // SPDX-License-Identifier: GPL-2.0-only
27 /* skip to first section */ in find_section()
28 index += bdb->header_size; in find_section()
29 total = bdb->bdb_size; in find_section()
55 dev_priv->edp.bpp = 18; in parse_edp()
57 if (dev_priv->edp.support) { in parse_edp()
59 dev_priv->edp.bpp); in parse_edp()
64 panel_type = dev_priv->panel_type; in parse_edp()
65 switch ((edp->color_depth >> (panel_type * 2)) & 3) { in parse_edp()
67 dev_priv->edp.bpp = 18; in parse_edp()
[all …]
/linux/drivers/clk/ti/
H A Dclkt_dpll.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP2/3/4 DPLL clock functions
5 * Copyright (C) 2005-2008 Texas Instruments, Inc.
6 * Copyright (C) 2004-2010 Nokia Corporation
9 * Richard Woodruff <r-woodruff2@ti.com>
17 #include <linux/clk-provider.h>
23 #include "clock.h"
30 #define DPLL_MULT_UNDERFLOW -1
51 #define DPLL_FINT_UNDERFLOW -1
52 #define DPLL_FINT_INVALID -2
[all …]
/linux/arch/arm/mach-sunxi/
H A Dheadsmp.S1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 Chen-Yu Tsai
6 * Chen-Yu Tsai <wens@csie.org>
18 .arch armv7-a
20 * Enable cluster-level coherency, in preparation for turning on the MMU.
22 * Also enable regional clock gating and L2 data latency settings for
23 * Cortex-A15. These settings are from the vendor kernel.
34 /* The following is Cortex-A15 specific */
36 /* ACTLR2: Enable CPU regional clock gates */
43 /* Enable L2, GIC, and Timer regional clock gates */
[all …]
/linux/drivers/pwm/
H A Dpwm-sun4i.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 * - When outputing the source clock directly, the PWM logic will be bypassed
46 #define PWM_PRD(prd) (((prd) - 1) << 16)
98 return readl(sun4ichip->base + offset); in sun4i_pwm_readl()
104 writel(val, sun4ichip->base + offset); in sun4i_pwm_writel()
116 clk_rate = clk_get_rate(sun4ichip->clk); in sun4i_pwm_get_state()
118 return -EINVAL; in sun4i_pwm_get_state()
127 if ((val & BIT_CH(PWM_BYPASS, pwm->hwpwm)) && in sun4i_pwm_get_state()
128 sun4ichip->data->has_direct_mod_clk_output) { in sun4i_pwm_get_state()
[all …]
/linux/drivers/clk/bcm/
H A Dclk-raspberrypi.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Even though clk-bcm2835 provides an interface to the hardware registers for
8 * over-temperature and under-voltage protections provided by the firmware.
14 #include <linux/clk-provider.h>
19 #include <soc/bcm2835/raspberrypi-firmware.h>
35 [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = "pixel-bvb",
86 * The clock is shared between the HVS and the CSI
108 * HDMI connector, the firmware will skip the HSM
119 * The clock is shared between the two HDMI controllers
129 * As mentioned above, this clock is disabled during boot,
[all …]
/linux/arch/x86/kernel/cpu/
H A Dvmware.c20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
49 #define STEALCLOCK_NOT_AVAILABLE (-1)
55 u64 clock; /* stolen time counter in units of vtsc */ member
57 /* only for little-endian */
155 early_param("no-vmw-sched-clock", setup_vmw_sched_clock);
162 early_param("no-steal-acc", parse_no_stealacc);
170 ns -= vmware_cyc2ns.cyc2ns_offset; in vmware_sched_clock()
179 clocks_calc_mult_shift(&d->cyc2ns_mul, &d->cyc2ns_shift, in vmware_cyc2ns_setup()
181 d->cyc2ns_offset = mul_u64_u32_shr(tsc_now, d->cyc2ns_mul, in vmware_cyc2ns_setup()
182 d->cyc2ns_shift); in vmware_cyc2ns_setup()
[all …]
/linux/drivers/gpu/drm/radeon/
H A Datombios_crtc.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
36 #include "atom-bits.h"
42 struct drm_device *dev = crtc->dev; in atombios_overscan_setup()
43 struct radeon_device *rdev = dev->dev_private; in atombios_overscan_setup()
51 args.ucCRTC = radeon_crtc->crtc_id; in atombios_overscan_setup()
53 switch (radeon_crtc->rmx_type) { in atombios_overscan_setup()
55 args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in atombios_overscan_setup()
56 args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in atombios_overscan_setup()
57 args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in atombios_overscan_setup()
58 args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in atombios_overscan_setup()
[all …]
/linux/tools/testing/selftests/rtc/
H A Drtctest.c1 // SPDX-License-Identifier: GPL-2.0
3 * Real Time Clock Driver Test Program
40 self->fd = open(rtc_file, O_RDONLY); in FIXTURE_SETUP()
44 close(self->fd); in FIXTURE_TEARDOWN()
51 if (self->fd == -1 && errno == ENOENT) in TEST_F()
52 SKIP(return, "Skipping test since %s does not exist", rtc_file); in TEST_F()
53 ASSERT_NE(-1, self->fd); in TEST_F()
56 rc = ioctl(self->fd, RTC_RD_TIME, &rtc_tm); in TEST_F()
57 ASSERT_NE(-1, rc); in TEST_F()
67 .tm_sec = rtc_time->tm_sec, in rtc_time_to_timestamp()
[all …]
/linux/drivers/media/pci/cobalt/
H A Dcobalt-irq.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates.
11 #include "cobalt-driver.h"
12 #include "cobalt-irq.h"
13 #include "cobalt-omnitek.h"
17 struct cobalt *cobalt = s->cobalt; in cobalt_dma_stream_queue_handler()
18 int rx = s->video_channel; in cobalt_dma_stream_queue_handler()
20 COBALT_CVI_FREEWHEEL(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
22 COBALT_CVI_VMR(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
24 COBALT_CVI(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
[all …]
/linux/drivers/clk/renesas/
H A Dclk-rz.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
9 #include <linux/clk-provider.h>
26 /* -----------------------------------------------------------------------------
63 /* If mapping regs failed, skip non-pll clocks. System will boot anyhow */ in rz_cpg_register_clock()
65 return ERR_PTR(-ENXIO); in rz_cpg_register_clock()
67 /* FIXME:"i" and "g" are variable clocks with non-integer dividers (e.g. 2/3) in rz_cpg_register_clock()
76 return ERR_PTR(-EINVAL); in rz_cpg_register_clock()
90 num_clks = of_property_count_strings(np, "clock-output-names"); in rz_cpg_clocks_init()
98 data->clks = clks; in rz_cpg_clocks_init()
[all …]

12345678910>>...21