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/linux/drivers/iio/adc/
H A Dingenic-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * ADC driver for the Ingenic JZ47xx SoCs
4 * Copyright (c) 2019 Artur Rojek <contact@artur-rojek.eu>
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
10 #include <linux/clk.h>
102 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
107 struct clk *clk; member
116 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd() local
118 mutex_lock(&adc->lock); in ingenic_adc_set_adcmd()
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H A Dlpc18xx_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * IIO ADC driver for NXP LPC18xx ADC
8 * - Hardware triggers
9 * - Burst mode
10 * - Interrupts
11 * - DMA
14 #include <linux/clk.h>
26 /* LPC18XX ADC registers and bits */
46 struct clk *clk; member
69 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument
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H A Dfsl-imx25-gcq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
6 * connected to the imx25 ADC.
9 #include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
10 #include <linux/clk.h>
13 #include <linux/mfd/imx25-tsadc.h>
23 static const char * const driver_name = "mx25-gcq";
40 struct clk *clk; member
87 regmap_read(priv->regs, MX25_ADCQ_SR, &stats); in mx25_gcq_irq()
90 regmap_set_bits(priv->regs, MX25_ADCQ_MR, in mx25_gcq_irq()
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H A Dlpc32xx_adc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * lpc32xx_adc.c - Support for ADC in LPC32XX
5 * 3-channel, 10-bit ADC
10 #include <linux/clk.h>
46 #define LPC32XXAD_NAME "lpc32xx-adc"
50 struct clk *clk; member
70 mutex_lock(&st->lock); in lpc32xx_read_raw()
71 ret = clk_prepare_enable(st->clk); in lpc32xx_read_raw()
73 mutex_unlock(&st->lock); in lpc32xx_read_raw()
77 __raw_writel(LPC32XXAD_INTERNAL | (chan->address) | in lpc32xx_read_raw()
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H A Daspeed_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Aspeed AST2400/2500/2600 ADC
8 * ADC clock formula:
15 #include <linux/clk.h>
16 #include <linux/clk-provider.h>
45 * hardware logic in each version of ADC.
79 * When the sampling rate is too high, the ADC may not have enough charging
184 dev_warn(data->dev, "Couldn't find syscon node\n"); in aspeed_adc_set_trim_data()
185 return -EOPNOTSUPP; in aspeed_adc_set_trim_data()
190 dev_warn(data->dev, "Failed to get syscon regmap\n"); in aspeed_adc_set_trim_data()
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H A Dnpcm_adc.c1 // SPDX-License-Identifier: GPL-2.0
4 #include <linux/clk.h>
32 struct clk *adc_clk;
48 /* ADC registers */
67 /* ADC General Definition */
106 regtemp = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_isr()
108 iowrite32(regtemp, info->regs + NPCM_ADCCON); in npcm_adc_isr()
109 wake_up_interruptible(&info->wq); in npcm_adc_isr()
110 info->int_status = true; in npcm_adc_isr()
121 /* Select ADC channel */ in npcm_adc_read()
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H A Dat91_adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the ADC present in the Atmel AT91 evaluation boards.
11 #include <linux/clk.h>
38 #define AT91_ADC_TSAMOD (3 << 0) /* ADC mode */
39 #define AT91_ADC_TSAMOD_ADC_ONLY_MODE (0 << 0) /* ADC Mode */
103 #define AT91_ADC_ACR_PENDETSENS (0x3 << 0) /* pull-up resistor */
137 (st->registers->channel_base + (ch * 4))
139 (readl_relaxed(st->reg_base + reg))
141 (writel_relaxed(val, st->reg_base + reg))
161 * struct at91_adc_trigger - description of triggers
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H A Dsun20i-gpadc-iio.c1 // SPDX-License-Identifier: GPL-2.0
3 * GPADC driver for sunxi platforms (D1, T113-S3 and R329)
8 #include <linux/clk.h>
18 #include <linux/iio/adc-helpers.h>
21 #define SUN20I_GPADC_DRIVER_NAME "sun20i-gpadc"
69 mutex_lock(&info->lock); in sun20i_gpadc_adc_read()
71 reinit_completion(&info->completion); in sun20i_gpadc_adc_read()
73 if (info->last_channel != chan->channel) { in sun20i_gpadc_adc_read()
74 info->last_channel = chan->channel; in sun20i_gpadc_adc_read()
77 writel(SUN20I_GPADC_CS_EN_ADC_CH(chan->channel), in sun20i_gpadc_adc_read()
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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DFSDM ADC device driver
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
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H A Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 ADC
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
19 Each STM32 ADC block can have up to 3 ADC instances.
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H A Dnxp,imx8qxp-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP IMX8QXP ADC
10 - Cai Huoqing <caihuoqing@baidu.com>
13 Supports the ADC found on the IMX8QXP SoC.
17 const: nxp,imx8qxp-adc
28 clock-names:
30 - const: per
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H A Dti,ads131e08.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
10 - Jonathan Cameron <jic23@kernel.org>
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA), internal reference
17 The communication with ADC chip is via the SPI bus (mode 1).
24 - ti,ads131e04
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H A Dadi,ad9467.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adi,ad9467.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD9467 and similar High-Speed ADCs
10 - Michael Hennerich <michael.hennerich@analog.com>
13 The AD9467 and the parts similar with it, are high-speed analog-to-digital
18 All the parts support the register map described by Application Note AN-877
19 https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf
21 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf
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H A Dnuvoton,npcm750-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton NPCM BMC Analog to Digital Converter (ADC)
10 - Tomer Maimon <tmaimon77@gmail.com>
13 The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter,
19 - nuvoton,npcm750-adc
20 - nuvoton,npcm845-adc
27 description: ADC interrupt, should be set for falling edge.
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/linux/sound/soc/sunxi/
H A Dsun8i-codec.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * (C) Copyright 2010-2016
9 * Mylène Josserand <mylene.josserand@free-electrons.com>
14 #include <linux/clk.h>
27 #include <sound/soc-dapm.h>
227 struct clk *clk_bus;
228 struct clk *clk_module;
251 ret = clk_prepare_enable(scodec->clk_bus); in sun8i_codec_runtime_resume()
257 regcache_cache_only(scodec->regmap, false); in sun8i_codec_runtime_resume()
259 ret = regcache_sync(scodec->regmap); in sun8i_codec_runtime_resume()
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/linux/sound/soc/codecs/
H A Drt5514.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5514.c -- RT5514 ALSA SoC audio codec driver
24 #include <sound/soc-dapm.h>
31 #include "rt5514-spi.h"
120 regmap_write(rt5514->i2c_regmap, 0x18002000, 0x000010ec); in rt5514_enable_dsp_prepare()
122 regmap_write(rt5514->i2c_regmap, 0x18002200, 0x00028604); in rt5514_enable_dsp_prepare()
124 regmap_write(rt5514->i2c_regmap, 0xfafafafa, 0x00000001); in rt5514_enable_dsp_prepare()
125 /* mini-core reset */ in rt5514_enable_dsp_prepare()
126 regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x0005514b); in rt5514_enable_dsp_prepare()
127 regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x00055149); in rt5514_enable_dsp_prepare()
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H A Des8328.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * es8328.c -- ES8328 ALSA SoC Audio driver
5 * Copyright 2014 Sutajio Ko-Usagi PTE LTD
10 #include <linux/clk.h>
80 struct clk *clk; member
99 static const DECLARE_TLV_DB_SCALE(play_tlv, -3000, 100, 0);
100 static const DECLARE_TLV_DB_SCALE(dac_adc_tlv, -9600, 50, 0);
101 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
123 if (es8328->deemph) { in es8328_set_deemph()
126 if (abs(deemph_settings[i].rate - es8328->playback_fs) < in es8328_set_deemph()
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H A Djz4725b.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/clk.h>
163 struct clk *clk; member
167 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(jz4725b_dac_tlv, -2250, 150, 0);
169 0, 11, TLV_DB_SCALE_ITEM(-2250, 0, 0),
170 12, 31, TLV_DB_SCALE_ITEM(-2250, 150, 0),
174 0, 11, TLV_DB_SCALE_ITEM(-3350, 200, 0),
175 12, 23, TLV_DB_SCALE_ITEM(-1050, 100, 0),
228 SOC_SINGLE("High-Pass Filter Capture Switch",
251 SOC_DAPM_ENUM("ADC Source Capture Route", jz4725b_codec_adc_src_enum);
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H A Dtlv320aic32x4.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Author: Javier Martin <javier.martin@vista-silicon.com>
13 #include <linux/clk.h>
29 #include <sound/soc-dapm.h>
58 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in aic32x4_reset_adc()
63 * sequence but experiments show the ADC need in aic32x4_reset_adc()
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H A Drt5682.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt5682.c -- RT5682 ALSA SoC audio component driver
25 #include <sound/soc-dapm.h>
38 "LDO1-IN",
60 ret = regmap_multi_reg_write(rt5682->regmap, patch_list, in rt5682_apply_patch_list()
751 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
752 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
787 SOC_DAPM_ENUM("IF2 ADC Swap Mux", rt5682_if2_adc_enum);
790 SOC_DAPM_ENUM("IF1 01 ADC Swap Mux", rt5682_if1_01_adc_enum);
793 SOC_DAPM_ENUM("IF1 23 ADC Swap Mux", rt5682_if1_23_adc_enum);
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H A Des8316.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * es8316.c -- es8316 ALSA SoC audio driver
6 * Authors: David Yang <yangxiaohua@everest-semi.com>,
12 #include <linux/clk.h>
21 #include <sound/soc-dapm.h>
36 struct clk *mclk;
52 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9600, 50, 1);
53 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9600, 50, 1);
54 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(alc_max_gain_tlv, -650, 150, 0);
55 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(alc_min_gain_tlv, -1200, 150, 0);
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H A Drt5682s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt5682s.c -- RT5682I-VS ALSA SoC audio component driver
25 #include <sound/soc-dapm.h>
38 .dai_clk_names[RT5682S_DAI_WCLK_IDX] = "rt5682-dai-wclk",
39 .dai_clk_names[RT5682S_DAI_BCLK_IDX] = "rt5682-dai-bclk",
46 [RT5682S_SUPPLY_LDO1_IN] = "LDO1-IN",
69 ret = regmap_multi_reg_write(rt5682s->regmap, patch_list, ARRAY_SIZE(patch_list)); in rt5682s_apply_patch_list()
624 regmap_write(rt5682s->regmap, RT5682S_RESET, 0); in rt5682s_reset()
634 dev_dbg(component->dev, "%s btn_type=%x\n", __func__, btn_type); in rt5682s_button_detect()
651 mutex_lock(&rt5682s->sar_mutex); in rt5682s_sar_power_mode()
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H A Dadav80x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Author: Lars-Peter Clausen <lars@metafoo.de>
113 #define ADAV80X_PLL_OUTE_SYSCLKPD(x) BIT(2 - (x))
155 "ADC",
185 SND_SOC_DAPM_ADC("ADC", NULL, ADAV80X_ADC_CTRL1, 5, 1),
214 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); in adav80x_dapm_sysclk_check()
216 const char *clk; in adav80x_dapm_sysclk_check() local
218 switch (adav80x->clk_src) { in adav80x_dapm_sysclk_check()
220 clk = "PLL1"; in adav80x_dapm_sysclk_check()
223 clk = "PLL2"; in adav80x_dapm_sysclk_check()
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/linux/drivers/mfd/
H A Dti_am335x_tscadc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI Touch Screen / ADC MFD driver
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
12 #include <linux/clk.h>
33 spin_lock_irqsave(&tscadc->reg_lock, flags); in am335x_tsc_se_set_cache()
34 tscadc->reg_se_cache |= val; in am335x_tsc_se_set_cache()
35 if (tscadc->adc_waiting) in am335x_tsc_se_set_cache()
36 wake_up(&tscadc->reg_se_wait); in am335x_tsc_se_set_cache()
37 else if (!tscadc->adc_in_use) in am335x_tsc_se_set_cache()
38 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); in am335x_tsc_se_set_cache()
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H A Dmxs-lradc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale MXS Low Resolution Analog-to-Digital Converter driver
13 #include <linux/clk.h>
16 #include <linux/mfd/mxs-lradc.h>
57 DEFINE_RES_IRQ_NAMED(MX23_LRADC_CH0_IRQ, "mxs-lradc-channel0"),
58 DEFINE_RES_IRQ_NAMED(MX23_LRADC_CH1_IRQ, "mxs-lradc-channel1"),
59 DEFINE_RES_IRQ_NAMED(MX23_LRADC_CH2_IRQ, "mxs-lradc-channel2"),
60 DEFINE_RES_IRQ_NAMED(MX23_LRADC_CH3_IRQ, "mxs-lradc-channel3"),
61 DEFINE_RES_IRQ_NAMED(MX23_LRADC_CH4_IRQ, "mxs-lradc-channel4"),
62 DEFINE_RES_IRQ_NAMED(MX23_LRADC_CH5_IRQ, "mxs-lradc-channel5"),
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