Lines Matching +full:adc +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Author: Javier Martin <javier.martin@vista-silicon.com>
21 #include <linux/clk.h>
30 #include <sound/soc-dapm.h>
59 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in aic32x4_reset_adc()
64 * sequence but experiments show the ADC needs to be reset after each in aic32x4_reset_adc()
81 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in mic_bias_event()
112 ucontrol->value.integer.value[0] = (val & 0x01); in aic32x4_get_mfp1_gpio()
129 return -EINVAL; in aic32x4_set_mfp2_gpio()
132 if (ucontrol->value.integer.value[0] == (val & AIC32X4_MFP2_GPIO_OUT_HIGH)) in aic32x4_set_mfp2_gpio()
135 if (ucontrol->value.integer.value[0]) in aic32x4_set_mfp2_gpio()
136 val |= ucontrol->value.integer.value[0]; in aic32x4_set_mfp2_gpio()
153 ucontrol->value.integer.value[0] = (val & 0x01); in aic32x4_get_mfp3_gpio()
170 return -EINVAL; in aic32x4_set_mfp4_gpio()
173 if (ucontrol->value.integer.value[0] == (val & AIC32X4_MFP5_GPIO_OUT_HIGH)) in aic32x4_set_mfp4_gpio()
176 if (ucontrol->value.integer.value[0]) in aic32x4_set_mfp4_gpio()
177 val |= ucontrol->value.integer.value[0]; in aic32x4_set_mfp4_gpio()
193 ucontrol->value.integer.value[0] = ((val & 0x2) >> 1); in aic32x4_get_mfp5_gpio()
210 return -EINVAL; in aic32x4_set_mfp5_gpio()
213 if (ucontrol->value.integer.value[0] == (val & 0x1)) in aic32x4_set_mfp5_gpio()
216 if (ucontrol->value.integer.value[0]) in aic32x4_set_mfp5_gpio()
217 val |= ucontrol->value.integer.value[0]; in aic32x4_set_mfp5_gpio()
249 /* -63.5dB min, 0.5dB steps */
250 static DECLARE_TLV_DB_SCALE(tlv_pcm, -6350, 50, 0);
251 /* -6dB min, 1dB steps */
252 static DECLARE_TLV_DB_SCALE(tlv_driver_gain, -600, 100, 0);
253 /* -12dB min, 0.5dB steps */
254 static DECLARE_TLV_DB_SCALE(tlv_adc_vol, -1200, 50, 0);
255 /* -6dB min, 1dB steps */
256 static DECLARE_TLV_DB_SCALE(tlv_tas_driver_gain, -5850, 50, 0);
274 AIC32X4_RDACVOL, 0, -0x7f, 0x30, 7, 0, tlv_pcm),
278 AIC32X4_HPRGAIN, 0, -0x6, 0x1d, 5, 0,
281 AIC32X4_LORGAIN, 0, -0x6, 0x1d, 5, 0,
294 SOC_DOUBLE_R_S_TLV("ADC Level Volume", AIC32X4_LADCVOL,
295 AIC32X4_RADCVOL, 0, -0x18, 0x28, 6, 0, tlv_adc_vol),
299 SOC_SINGLE("Auto-mute Switch", AIC32X4_DACMUTE, 4, 7, 0),
368 SOC_DAPM_ENUM("CM_L L- Switch", cml_lpga_n_enum),
371 SOC_DAPM_ENUM("IN2_R L- Switch", in2r_lpga_n_enum),
374 SOC_DAPM_ENUM("IN3_R L- Switch", in3r_lpga_n_enum),
399 SOC_DAPM_ENUM("CM_R R- Switch", cmr_rpga_n_enum),
402 SOC_DAPM_ENUM("IN1_L R- Switch", in1l_rpga_n_enum),
405 SOC_DAPM_ENUM("IN3_L R- Switch", in3l_rpga_n_enum),
430 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", AIC32X4_ADCSETUP, 6, 0),
446 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", AIC32X4_ADCSETUP, 7, 0),
465 SND_SOC_DAPM_POST("ADC Reset", aic32x4_reset_adc),
507 {"Right ADC", NULL, "IN1_R to Right Mixer Positive Resistor"},
512 {"Right ADC", NULL, "IN2_R to Right Mixer Positive Resistor"},
517 {"Right ADC", NULL, "IN3_R to Right Mixer Positive Resistor"},
522 {"Right ADC", NULL, "IN2_L to Right Mixer Positive Resistor"},
527 {"Right ADC", NULL, "CM_R to Right Mixer Negative Resistor"},
532 {"Right ADC", NULL, "IN1_L to Right Mixer Negative Resistor"},
537 {"Right ADC", NULL, "IN3_L to Right Mixer Negative Resistor"},
543 {"Left ADC", NULL, "IN1_L to Left Mixer Positive Resistor"},
548 {"Left ADC", NULL, "IN2_L to Left Mixer Positive Resistor"},
553 {"Left ADC", NULL, "IN3_L to Left Mixer Positive Resistor"},
558 {"Left ADC", NULL, "IN1_R to Left Mixer Positive Resistor"},
563 {"Left ADC", NULL, "CM_L to Left Mixer Negative Resistor"},
568 {"Left ADC", NULL, "IN2_R to Left Mixer Negative Resistor"},
573 {"Left ADC", NULL, "IN3_R to Left Mixer Negative Resistor"},
600 struct snd_soc_component *component = codec_dai->component; in aic32x4_set_dai_sysclk()
601 struct clk *mclk; in aic32x4_set_dai_sysclk()
602 struct clk *pll; in aic32x4_set_dai_sysclk()
604 pll = devm_clk_get(component->dev, "pll"); in aic32x4_set_dai_sysclk()
615 struct snd_soc_component *component = codec_dai->component; in aic32x4_set_dai_fmt()
629 return -EINVAL; in aic32x4_set_dai_fmt()
656 return -EINVAL; in aic32x4_set_dai_fmt()
659 aic32x4->fmt = fmt; in aic32x4_set_dai_fmt()
691 if (aic32x4->type == AIC32X4_TYPE_TAS2505) { in aic32x4_set_processing_blocks()
693 return -EINVAL; in aic32x4_set_processing_blocks()
698 return -EINVAL; in aic32x4_set_processing_blocks()
729 ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); in aic32x4_setup_clocks()
738 if (aic32x4->type == AIC32X4_TYPE_TAS2505) in aic32x4_setup_clocks()
747 if (aic32x4->type == AIC32X4_TYPE_TAS2505) in aic32x4_setup_clocks()
756 if (aic32x4->type == AIC32X4_TYPE_TAS2505) in aic32x4_setup_clocks()
761 dev_err(component->dev, "Sampling rate not supported\n"); in aic32x4_setup_clocks()
762 return -EINVAL; in aic32x4_setup_clocks()
765 /* PCM over I2S is always 2-channel */ in aic32x4_setup_clocks()
766 if ((aic32x4->fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_I2S) in aic32x4_setup_clocks()
776 for (nadc = max_nadc; nadc > 0; --nadc) { in aic32x4_setup_clocks()
779 dosr -= dosr_increment) { in aic32x4_setup_clocks()
784 for (ndac = max_ndac; ndac > 0; --ndac) { in aic32x4_setup_clocks()
788 if (clk_round_rate(clocks[0].clk, dac_clock_rate) == 0) in aic32x4_setup_clocks()
791 clk_set_rate(clocks[0].clk, in aic32x4_setup_clocks()
794 clk_set_rate(clocks[1].clk, in aic32x4_setup_clocks()
797 clk_set_rate(clocks[2].clk, in aic32x4_setup_clocks()
802 clk_set_rate(clocks[3].clk, in aic32x4_setup_clocks()
805 clk_set_rate(clocks[4].clk, in aic32x4_setup_clocks()
810 clk_set_rate(clocks[5].clk, in aic32x4_setup_clocks()
821 dev_err(component->dev, in aic32x4_setup_clocks()
823 return -EINVAL; in aic32x4_setup_clocks()
830 struct snd_soc_component *component = dai->component; in aic32x4_hw_params()
863 if (aic32x4->swapdacs) in aic32x4_hw_params()
876 struct snd_soc_component *component = dai->component; in aic32x4_mute()
895 ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); in aic32x4_set_bias_level()
903 dev_err(component->dev, "Failed to enable clocks\n"); in aic32x4_set_bias_level()
936 .name = "tlv320aic32x4-hifi",
959 if (aic32x4->setup->gpio_func[0] != AIC32X4_MFPX_DEFAULT_VALUE) { in aic32x4_setup_gpios()
961 aic32x4->setup->gpio_func[0]); in aic32x4_setup_gpios()
967 if (aic32x4->setup->gpio_func[1] != AIC32X4_MFPX_DEFAULT_VALUE) { in aic32x4_setup_gpios()
969 aic32x4->setup->gpio_func[1]); in aic32x4_setup_gpios()
975 if (aic32x4->setup->gpio_func[2] != AIC32X4_MFPX_DEFAULT_VALUE) { in aic32x4_setup_gpios()
977 aic32x4->setup->gpio_func[2]); in aic32x4_setup_gpios()
983 if (aic32x4->setup->gpio_func[3] != AIC32X4_MFPX_DEFAULT_VALUE) { in aic32x4_setup_gpios()
985 aic32x4->setup->gpio_func[3]); in aic32x4_setup_gpios()
991 if (aic32x4->setup->gpio_func[4] != AIC32X4_MFPX_DEFAULT_VALUE) { in aic32x4_setup_gpios()
993 aic32x4->setup->gpio_func[4]); in aic32x4_setup_gpios()
1012 ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); in aic32x4_component_probe()
1016 if (aic32x4->setup) in aic32x4_component_probe()
1019 clk_set_parent(clocks[0].clk, clocks[1].clk); in aic32x4_component_probe()
1020 clk_set_parent(clocks[2].clk, clocks[3].clk); in aic32x4_component_probe()
1023 if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) { in aic32x4_component_probe()
1027 if (aic32x4->power_cfg & AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE) in aic32x4_component_probe()
1030 tmp_reg = (aic32x4->power_cfg & AIC32X4_PWR_AIC32X4_LDO_ENABLE) ? in aic32x4_component_probe()
1035 if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36) in aic32x4_component_probe()
1037 if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED) in aic32x4_component_probe()
1042 if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) in aic32x4_component_probe()
1048 if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) in aic32x4_component_probe()
1056 * Workaround: for an unknown reason, the ADC needs to be powered up in aic32x4_component_probe()
1101 AIC32X4_LDACVOL, -0x7f, 0x30, tlv_pcm),
1113 SOC_SINGLE("Auto-mute Switch", AIC32X4_DACMUTE, 4, 7, 0),
1145 .name = "tas2505-hifi",
1169 ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); in aic32x4_tas2505_component_probe()
1173 if (aic32x4->setup) in aic32x4_tas2505_component_probe()
1176 clk_set_parent(clocks[0].clk, clocks[1].clk); in aic32x4_tas2505_component_probe()
1177 clk_set_parent(clocks[2].clk, clocks[3].clk); in aic32x4_tas2505_component_probe()
1180 if (aic32x4->power_cfg & AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE) in aic32x4_tas2505_component_probe()
1183 tmp_reg = (aic32x4->power_cfg & AIC32X4_PWR_AIC32X4_LDO_ENABLE) ? in aic32x4_tas2505_component_probe()
1188 if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36) in aic32x4_tas2505_component_probe()
1190 if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED) in aic32x4_tas2505_component_probe()
1227 aic32x4_setup = devm_kzalloc(aic32x4->dev, sizeof(*aic32x4_setup), in aic32x4_parse_dt()
1230 return -ENOMEM; in aic32x4_parse_dt()
1232 ret = of_property_match_string(np, "clock-names", "mclk"); in aic32x4_parse_dt()
1234 return -EINVAL; in aic32x4_parse_dt()
1235 aic32x4->mclk_name = of_clk_get_parent_name(np, ret); in aic32x4_parse_dt()
1237 aic32x4->swapdacs = false; in aic32x4_parse_dt()
1238 aic32x4->micpga_routing = 0; in aic32x4_parse_dt()
1239 aic32x4->rstn_gpio = of_get_named_gpio(np, "reset-gpios", 0); in aic32x4_parse_dt()
1241 if (of_property_read_u32_array(np, "aic32x4-gpio-func", in aic32x4_parse_dt()
1242 aic32x4_setup->gpio_func, 5) >= 0) in aic32x4_parse_dt()
1243 aic32x4->setup = aic32x4_setup; in aic32x4_parse_dt()
1249 regulator_disable(aic32x4->supply_iov); in aic32x4_disable_regulators()
1251 if (!IS_ERR(aic32x4->supply_ldo)) in aic32x4_disable_regulators()
1252 regulator_disable(aic32x4->supply_ldo); in aic32x4_disable_regulators()
1254 if (!IS_ERR(aic32x4->supply_dv)) in aic32x4_disable_regulators()
1255 regulator_disable(aic32x4->supply_dv); in aic32x4_disable_regulators()
1257 if (!IS_ERR(aic32x4->supply_av)) in aic32x4_disable_regulators()
1258 regulator_disable(aic32x4->supply_av); in aic32x4_disable_regulators()
1266 aic32x4->supply_ldo = devm_regulator_get_optional(dev, "ldoin"); in aic32x4_setup_regulators()
1267 aic32x4->supply_iov = devm_regulator_get(dev, "iov"); in aic32x4_setup_regulators()
1268 aic32x4->supply_dv = devm_regulator_get_optional(dev, "dv"); in aic32x4_setup_regulators()
1269 aic32x4->supply_av = devm_regulator_get_optional(dev, "av"); in aic32x4_setup_regulators()
1273 if (IS_ERR(aic32x4->supply_iov)) { in aic32x4_setup_regulators()
1275 return PTR_ERR(aic32x4->supply_iov); in aic32x4_setup_regulators()
1278 if (IS_ERR(aic32x4->supply_ldo)) { in aic32x4_setup_regulators()
1279 if (PTR_ERR(aic32x4->supply_ldo) == -EPROBE_DEFER) in aic32x4_setup_regulators()
1280 return -EPROBE_DEFER; in aic32x4_setup_regulators()
1282 if (IS_ERR(aic32x4->supply_dv)) { in aic32x4_setup_regulators()
1284 return PTR_ERR(aic32x4->supply_dv); in aic32x4_setup_regulators()
1286 if (IS_ERR(aic32x4->supply_av)) { in aic32x4_setup_regulators()
1288 return PTR_ERR(aic32x4->supply_av); in aic32x4_setup_regulators()
1291 if (PTR_ERR(aic32x4->supply_dv) == -EPROBE_DEFER) in aic32x4_setup_regulators()
1292 return -EPROBE_DEFER; in aic32x4_setup_regulators()
1293 if (PTR_ERR(aic32x4->supply_av) == -EPROBE_DEFER) in aic32x4_setup_regulators()
1294 return -EPROBE_DEFER; in aic32x4_setup_regulators()
1297 ret = regulator_enable(aic32x4->supply_iov); in aic32x4_setup_regulators()
1303 if (!IS_ERR(aic32x4->supply_ldo)) { in aic32x4_setup_regulators()
1304 ret = regulator_enable(aic32x4->supply_ldo); in aic32x4_setup_regulators()
1311 if (!IS_ERR(aic32x4->supply_dv)) { in aic32x4_setup_regulators()
1312 ret = regulator_enable(aic32x4->supply_dv); in aic32x4_setup_regulators()
1319 if (!IS_ERR(aic32x4->supply_av)) { in aic32x4_setup_regulators()
1320 ret = regulator_enable(aic32x4->supply_av); in aic32x4_setup_regulators()
1327 if (!IS_ERR(aic32x4->supply_ldo) && IS_ERR(aic32x4->supply_av)) in aic32x4_setup_regulators()
1328 aic32x4->power_cfg |= AIC32X4_PWR_AIC32X4_LDO_ENABLE; in aic32x4_setup_regulators()
1333 if (!IS_ERR(aic32x4->supply_dv)) in aic32x4_setup_regulators()
1334 regulator_disable(aic32x4->supply_dv); in aic32x4_setup_regulators()
1337 if (!IS_ERR(aic32x4->supply_ldo)) in aic32x4_setup_regulators()
1338 regulator_disable(aic32x4->supply_ldo); in aic32x4_setup_regulators()
1341 regulator_disable(aic32x4->supply_iov); in aic32x4_setup_regulators()
1349 struct aic32x4_pdata *pdata = dev->platform_data; in aic32x4_probe()
1350 struct device_node *np = dev->of_node; in aic32x4_probe()
1359 return -ENOMEM; in aic32x4_probe()
1361 aic32x4->dev = dev; in aic32x4_probe()
1362 aic32x4->type = type; in aic32x4_probe()
1367 aic32x4->power_cfg = pdata->power_cfg; in aic32x4_probe()
1368 aic32x4->swapdacs = pdata->swapdacs; in aic32x4_probe()
1369 aic32x4->micpga_routing = pdata->micpga_routing; in aic32x4_probe()
1370 aic32x4->rstn_gpio = pdata->rstn_gpio; in aic32x4_probe()
1371 aic32x4->mclk_name = "mclk"; in aic32x4_probe()
1379 aic32x4->power_cfg = 0; in aic32x4_probe()
1380 aic32x4->swapdacs = false; in aic32x4_probe()
1381 aic32x4->micpga_routing = 0; in aic32x4_probe()
1382 aic32x4->rstn_gpio = -1; in aic32x4_probe()
1383 aic32x4->mclk_name = "mclk"; in aic32x4_probe()
1386 if (gpio_is_valid(aic32x4->rstn_gpio)) { in aic32x4_probe()
1387 ret = devm_gpio_request_one(dev, aic32x4->rstn_gpio, in aic32x4_probe()
1399 if (gpio_is_valid(aic32x4->rstn_gpio)) { in aic32x4_probe()
1401 gpio_set_value_cansleep(aic32x4->rstn_gpio, 1); in aic32x4_probe()
1409 ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); in aic32x4_probe()
1413 switch (aic32x4->type) { in aic32x4_probe()
1446 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");