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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 ADC
10 STM32 ADC is a successive approximation analog-to-digital converter.
11 It has several multiplexed input channels. Conversions can be performed
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
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H A Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DFSDM ADC device driver
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
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H A Datmel,sama9260-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama9260-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AT91 sama9260 and similar Analog to Digital Converter (ADC)
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
15 - atmel,at91sam9260-adc
16 - atmel,at91sam9rl-adc
17 - atmel,at91sam9g45-adc
18 - atmel,at91sam9x5-adc
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H A Dadc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: IIO Common Properties for ADC Channels
10 - Jonathan Cameron <jic23@kernel.org>
13 A few properties are defined in a common way ADC channels.
17 pattern: "^channel(@[0-9a-f]+)?$"
29 description: If provided, the channel is to be used in bipolar mode.
31 diff-channels:
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H A Dadi,ad7124.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/iio/adc/adi,ad7124.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices AD7124 ADC device driver
11 - Stefan Popa <stefan.popa@analog.com>
14 Bindings for the Analog Devices AD7124 ADC device. Datasheet can be
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf
21 - adi,ad7124-4
22 - adi,ad7124-8
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H A Daspeed,ast2600-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ADC that forms part of an ASPEED server management processor.
10 - Billy Tsai <billy_tsai@aspeedtech.com>
13 • 10-bits resolution for 16 voltage channels.
15 channels.
16 • Channel scanning can be non-continuous.
17 • Programmable ADC clock frequency.
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H A Dadi,ad7173.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/iio/adc/adi,ad7173.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices AD7173 ADC
11 - Ceclan Dumitru <dumitru.ceclan@analog.com>
14 Analog Devices AD717x ADC's:
15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which
16 can be used in high precision, low noise single channel applications
18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended
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H A Dadi,max11410.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/iio/adc/adi,max11410.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices MAX11410 ADC device driver
11 - Ibrahim Tilki <Ibrahim.Tilki@analog.com>
14 Bindings for the Analog Devices MAX11410 ADC device. Datasheet can be
21 - adi,max11410
30 interrupt-names:
31 description: Name of the gpio pin of max11410 used for IRQ
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H A Dqcom,spmi-vadc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm's SPMI PMIC ADC
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 SPMI PMIC voltage ADC (VADC) provides interface to clients to read
15 voltage. The VADC is a 15-bit sigma-delta ADC.
16 SPMI PMIC5/PMIC7 voltage ADC (ADC) provides interface to clients to read
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H A Dxilinx-xadc.txt6 The Xilinx XADC is an ADC that can be found in the Series 7 FPGAs from Xilinx.
14 The Xilinx System Monitor is an ADC that is found in the UltraScale and
16 communication. Xilinx provides a standard IP core that can be used to access the
22 - compatible: Should be one of
23 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
25 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
27 * "xlnx,system-management-wiz-1.3": When using the
30 - reg: Address and length of the register set for the device
31 - interrupts: Interrupt for the XADC control interface.
32 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
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H A Dcosmic,10001-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cosmic Circuits CC-10001 ADC
10 - Jonathan Cameron <jic23@kernel.org>
13 Cosmic Circuits 10001 10-bit ADC device.
17 const: cosmic,10001-adc
22 adc-reserved-channels:
25 Bitmask of reserved channels, i.e. channels that cannot be
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H A Dti,ads131e08.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
10 - Jonathan Cameron <jic23@kernel.org>
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA), internal reference
17 The communication with ADC chip is via the SPI bus (mode 1).
24 - ti,ads131e04
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H A Dadi,ad4130.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices AD4130 ADC device driver
11 - Cosmin Tanislav <cosmin.tanislav@analog.com>
14 Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here:
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
20 - adi,ad4130
29 clock-names:
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/linux/Documentation/devicetree/bindings/thermal/
H A Dqcom-spmi-adc-tm5.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm's SPMI PMIC ADC Thermal Monitoring
9 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 $ref: thermal-sensor.yaml#
16 - qcom,spmi-adc-tm5
17 - qcom,spmi-adc-tm5-gen2
18 - qcom,adc-tm7 # Incomplete / subject to change
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H A Dqcom-spmi-adc-tm-hc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm-hc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm's SPMI PMIC ADC HC Thermal Monitoring
9 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 $ref: thermal-sensor.yaml#
15 const: qcom,spmi-adc-tm-hc
23 "#thermal-sensor-cells":
26 "#address-cells":
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/linux/drivers/thermal/qcom/
H A Dqcom-spmi-adc-tm5.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
12 #include <linux/iio/adc/qcom-vadc-common.h>
26 * Thermal monitoring block consists of 8 (ADC_TM5_NUM_CHANNELS) channels. Each
27 * channel is programmed to use one of ADC channels for voltage comparison.
28 * Voltages are programmed using ADC codes, so we have to convert temp to
29 * voltage and then to ADC code value.
31 * Configuration of TM channels must match configuration of corresponding ADC
32 * channels.
178 * struct adc_tm5_channel - ADC Thermal Monitoring channel data.
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/linux/drivers/iio/adc/
H A Dmcp320x.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Driver for following ADC chips from Microchip Technology's:
14 * ------------
20 * ------------
23 * ------------
65 const struct iio_chan_spec *channels; member
72 * struct mcp320x - Microchip SPI ADC instance
74 * @msg: SPI message to select a channel and receive a value from the ADC
75 * @transfer: SPI transfers used by @msg
77 * @start_conv_transfer: SPI transfer used by @start_conv_msg
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # ADC drivers
10 bool "ST-Ericsson AB8500 GPADC driver"
15 (General Purpose Analog to Digital Converter) driver used to monitor
25 tristate "Analog Devices AD4000 ADC Driver"
31 SPI analog to digital converters (ADC).
37 tristate "Analog Device AD4130 ADC Driver"
45 Say yes here to build support for Analog Devices AD4130-8 SPI analog
46 to digital converters (ADC).
52 tristate "Analog Device AD4695 ADC Driver"
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H A Dti-adc084s021.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Driver for Texas Instruments' ADC084S021 ADC chip.
29 /* Buffer used to align data */
31 __be16 channels[4]; member
39 __be16 rx_buf[5]; /* First 16-bits are trash */
68 * adc084s021_adc_conversion() - Read an ADC channel and return its value.
70 * @adc: The ADC SPI data.
73 static int adc084s021_adc_conversion(struct adc084s021 *adc, __be16 *data) in adc084s021_adc_conversion() argument
75 int n_words = (adc->spi_trans.len >> 1) - 1; /* Discard first word */ in adc084s021_adc_conversion()
79 ret = spi_sync(adc->spi, &adc->message); in adc084s021_adc_conversion()
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H A Dstm32-dfsdm-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is the ADC part of the STM32 DFSDM driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
10 #include <linux/dma-mapping.h>
11 #include <linux/iio/adc/stm32-dfsdm-adc.h>
14 #include <linux/iio/hw-consumer.h>
16 #include <linux/iio/timer/stm32-lptim-trigger.h>
17 #include <linux/iio/timer/stm32-timer-trigger.h>
29 #include "stm32-dfsdm.h"
44 /* Limit filter output resolution to 31 bits. (i.e. sample range is +/-2^30) */
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H A Dqcom-pm8xxx-xoadc.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * specific-purpose and general purpose ADC converters and channels.
13 #include <linux/iio/adc/qcom-vadc-common.h>
27 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
28 * drivers/misc/pmic8058-xoadc.c
29 * drivers/hwmon/pm8xxx-adc.c
57 /* Proper ADC registers */
99 * On a later ADC the decimation factors are defined as
123 * Physical channels which MUST exist on all PM variants in order to provide
149 #define AMUX_RSV3 0x3 /* not used */
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H A Dstm32-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is part of STM32 ADC driver
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
12 #include <linux/dma-mapping.h>
16 #include <linux/iio/timer/stm32-lptim-trigger.h>
17 #include <linux/iio/timer/stm32-timer-trigger.h>
26 #include <linux/nvmem-consumer.h>
31 #include "stm32-adc-core.h"
36 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */
39 #define STM32_ADC_CH_MAX 20 /* max number of channels */
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/linux/arch/arm/boot/dts/
H A Dcros-adc-thermistors.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
4 * children of the IIO based ADC.
6 * Currently, used by Exynos5420 based Peach PIT and
12 &adc {
15 pullup-uv = <1800000>;
16 pullup-ohm = <47000>;
17 pulldown-ohm = <0>;
18 io-channels = <&adc 3>;
22 pullup-uv = <1800000>;
23 pullup-ohm = <47000>;
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/linux/Documentation/devicetree/bindings/mux/
H A Dadi,adg792a.txt4 - compatible : "adi,adg792a" or "adi,adg792g"
5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
8 * Standard mux-controller bindings as described in mux-controller.yaml
11 - gpio-controller : if present, #gpio-cells below is required.
12 - #gpio-cells : should be <2>
13 - First cell is the GPO line number, i.e. 0 or 1
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, array of states that the mux controllers will have
27 * Three independent mux controllers (of which one is used).
32 mux: mux-controller@50 {
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-tyan-s7106.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s7106-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
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