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/linux/drivers/usb/host/
H A Dxhci-mem.c3 * xHCI host controller driver
18 #include "xhci.h"
19 #include "xhci-trace.h"
20 #include "xhci-debugfs.h"
29 static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, in xhci_segment_alloc() argument
38 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_segment_alloc()
44 seg->trbs = dma_pool_zalloc(xhci->segment_pool, flags, &dma); in xhci_segment_alloc()
54 dma_pool_free(xhci->segment_pool, seg->trbs, dma); in xhci_segment_alloc()
71 static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg) in xhci_segment_free() argument
74 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); in xhci_segment_free()
[all …]
H A Dxhci.c3 * xHCI host controller driver
22 #include "xhci.h"
23 #include "xhci-trace.h"
24 #include "xhci-debugfs.h"
25 #include "xhci-dbgcap.h"
89 int xhci_handshake_check_state(struct xhci_hcd *xhci, void __iomem *ptr, in xhci_handshake_check_state() argument
98 xhci->xhc_state & exit_state, in xhci_handshake_check_state()
101 if (result == U32_MAX || xhci->xhc_state & exit_state) in xhci_handshake_check_state()
108 * Disable interrupts and begin the xHCI halting process.
110 void xhci_quiesce(struct xhci_hcd *xhci) in xhci_quiesce() argument
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H A Dxhci-pci.c3 * xHCI host controller driver PCI Bus Glue.
18 #include "xhci.h"
19 #include "xhci-trace.h"
20 #include "xhci-pci.h"
107 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci) in xhci_msix_sync_irqs() argument
109 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_msix_sync_irqs()
120 static void xhci_cleanup_msix(struct xhci_hcd *xhci) in xhci_cleanup_msix() argument
122 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_cleanup_msix()
128 free_irq(pci_irq_vector(pdev, 0), xhci_to_hcd(xhci)); in xhci_cleanup_msix()
137 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_try_enable_msi() local
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H A Dxhci-plat.c3 * xhci-plat.c - xHCI host controller driver platform Bus Glue.
8 * A lot of code borrowed from the Linux xHCI driver.
24 #include "xhci.h"
25 #include "xhci-plat.h"
26 #include "xhci-mvebu.h"
77 static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci) in xhci_plat_quirks() argument
79 struct xhci_plat_priv *priv = xhci_to_priv(xhci); in xhci_plat_quirks()
81 xhci->quirks |= priv->quirks; in xhci_plat_quirks()
118 .compatible = "generic-xhci",
120 .compatible = "xhci-platform",
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H A Dxhci-ring.c3 * xHCI host controller driver
58 #include "xhci.h"
59 #include "xhci-trace.h"
61 static int queue_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
148 static void next_trb(struct xhci_hcd *xhci, in next_trb() argument
164 void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring) in inc_deq() argument
184 xhci_warn(xhci, "Missing link TRB at end of segment\n"); in inc_deq()
194 xhci_warn(xhci, "Ring is an endless link TRB loop\n"); in inc_deq()
215 * xHCI hardware can't handle the chain bit being cleared on a link TRB.
220 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, in inc_enq() argument
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H A DMakefile6 # tell define_trace.h where to find the xhci trace header
14 xhci-hcd-y := xhci.o xhci-mem.o xhci-ext-caps.o
15 xhci-hcd-y += xhci-ring.o xhci-hub.o xhci-dbg.o
16 xhci-hcd-y += xhci-trace.o
19 xhci-hcd-y += xhci-dbgcap.o xhci-dbgtty.o
22 xhci-mtk-hcd-y := xhci-mtk.o xhci-mtk-sch.o
24 xhci-plat-hcd-y := xhci-plat.o
26 xhci-plat-hcd-y += xhci-mvebu.o
29 xhci-hcd-y += xhci-debugfs.o
32 xhci-rcar-hcd-y += xhci-rcar.o
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H A Dxhci-hub.c3 * xHCI host controller driver
16 #include "xhci.h"
17 #include "xhci-trace.h"
35 static int xhci_create_usb3x_bos_desc(struct xhci_hcd *xhci, char *buf, in xhci_create_usb3x_bos_desc() argument
60 for (i = 0; i < xhci->num_port_caps; i++) { in xhci_create_usb3x_bos_desc()
61 u8 major = xhci->port_caps[i].maj_rev; in xhci_create_usb3x_bos_desc()
62 u8 minor = xhci->port_caps[i].min_rev; in xhci_create_usb3x_bos_desc()
67 port_cap = &xhci->port_caps[i]; in xhci_create_usb3x_bos_desc()
111 reg = readl(&xhci->cap_regs->hcc_params); in xhci_create_usb3x_bos_desc()
115 if ((xhci->quirks & XHCI_LPM_SUPPORT)) { in xhci_create_usb3x_bos_desc()
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H A Dxhci-debugfs.c3 * xhci-debugfs.c - xHCI debugfs interface
13 #include "xhci.h"
14 #include "xhci-debugfs.h"
86 static struct xhci_regset *xhci_debugfs_alloc_regset(struct xhci_hcd *xhci) in xhci_debugfs_alloc_regset() argument
99 list_add_tail(&regset->list, &xhci->regset_list); in xhci_debugfs_alloc_regset()
114 static void xhci_debugfs_regset(struct xhci_hcd *xhci, u32 base, in xhci_debugfs_regset() argument
122 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_debugfs_regset()
124 rgs = xhci_debugfs_alloc_regset(xhci); in xhci_debugfs_regset()
141 static void xhci_debugfs_extcap_regset(struct xhci_hcd *xhci, int cap_id, in xhci_debugfs_extcap_regset() argument
148 void __iomem *base = &xhci->cap_regs->hc_capbase; in xhci_debugfs_extcap_regset()
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H A Dxhci-histb.c3 * xHCI host controller driver for HiSilicon STB SoCs
19 #include "xhci.h"
69 * refer to xHCI spec in xhci_histb_config()
193 struct xhci_hcd *xhci; in xhci_histb_probe() local
252 xhci = hcd_to_xhci(hcd); in xhci_histb_probe()
256 xhci->main_hcd = hcd; in xhci_histb_probe()
257 xhci->shared_hcd = usb_create_shared_hcd(driver, dev, dev_name(dev), in xhci_histb_probe()
259 if (!xhci->shared_hcd) { in xhci_histb_probe()
265 xhci->quirks |= XHCI_HW_LPM_DISABLE; in xhci_histb_probe()
268 xhci->quirks |= XHCI_LPM_SUPPORT; in xhci_histb_probe()
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H A Dxhci-debugfs.h3 * xhci-debugfs.h - xHCI debugfs interface
107 void xhci_debugfs_init(struct xhci_hcd *xhci);
108 void xhci_debugfs_exit(struct xhci_hcd *xhci);
111 void xhci_debugfs_create_slot(struct xhci_hcd *xhci, int slot_id);
112 void xhci_debugfs_remove_slot(struct xhci_hcd *xhci, int slot_id);
113 void xhci_debugfs_create_endpoint(struct xhci_hcd *xhci,
116 void xhci_debugfs_remove_endpoint(struct xhci_hcd *xhci,
119 void xhci_debugfs_create_stream_files(struct xhci_hcd *xhci,
123 static inline void xhci_debugfs_init(struct xhci_hcd *xhci) { } in xhci_debugfs_init() argument
124 static inline void xhci_debugfs_exit(struct xhci_hcd *xhci) { } in xhci_debugfs_exit() argument
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H A Dxhci-mtk.c3 * MediaTek xHCI Host Controller Driver
24 #include "xhci.h"
25 #include "xhci-mtk.h"
61 /* xHCI CSR */
145 if (!of_device_is_compatible(dev->of_node, "mediatek,mt8195-xhci")) in xhci_mtk_set_frame_interval()
451 static void xhci_mtk_quirks(struct device *dev, struct xhci_hcd *xhci) in xhci_mtk_quirks() argument
453 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_mtk_quirks()
456 xhci->quirks |= XHCI_MTK_HOST; in xhci_mtk_quirks()
461 xhci->quirks |= XHCI_SPURIOUS_SUCCESS; in xhci_mtk_quirks()
463 xhci->quirks |= XHCI_LPM_SUPPORT; in xhci_mtk_quirks()
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H A Dxhci.h4 * xHCI host controller driver
22 /* Code sharing between pci-quirks and xhci hcd */
23 #include "xhci-ext-caps.h"
26 #include "xhci-port.h"
27 #include "xhci-caps.h"
32 /* xHCI PCI Configuration Registers */
41 * xHCI register interface.
42 * This corresponds to the eXtensible Host Controller Interface (xHCI)
47 * struct xhci_cap_regs - xHCI Host Controller Capability Registers.
55 * @hcc_params2: HCCPARAMS2 Capability Parameters 2, xhci 1.1 only
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H A Dxhci-dbgcap.c3 * xhci-dbgcap.c - xHCI debug capability support
28 #include "xhci.h"
29 #include "xhci-trace.h"
30 #include "xhci-dbgcap.h"
428 /* xhci 7.6.9, all three contexts; info, ep-out and ep-in. Each 64 bytes*/ in dbc_alloc_ctx()
981 struct xhci_hcd *xhci; in dbc_show() local
983 xhci = hcd_to_xhci(dev_get_drvdata(dev)); in dbc_show()
984 dbc = xhci->dbc; in dbc_show()
996 struct xhci_hcd *xhci; in dbc_store() local
999 xhci = hcd_to_xhci(dev_get_drvdata(dev)); in dbc_store()
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H A Dxhci-ext-caps.c3 * XHCI extended capability handling
11 #include "xhci.h"
28 static int xhci_create_intel_xhci_sw_pdev(struct xhci_hcd *xhci, u32 cap_offset) in xhci_create_intel_xhci_sw_pdev() argument
30 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_create_intel_xhci_sw_pdev()
39 xhci_err(xhci, "couldn't allocate %s platform device\n", in xhci_create_intel_xhci_sw_pdev()
84 int xhci_ext_cap_init(struct xhci_hcd *xhci) in xhci_ext_cap_init() argument
86 void __iomem *base = &xhci->cap_regs->hc_capbase; in xhci_ext_cap_init()
97 if (xhci->quirks & XHCI_INTEL_USB_ROLE_SW) { in xhci_ext_cap_init()
98 ret = xhci_create_intel_xhci_sw_pdev(xhci, in xhci_ext_cap_init()
H A Dxhci-dbgcap.h3 * xhci-dbgcap.h - xHCI debug capability support
126 struct xhci_hcd *xhci; member
205 int xhci_create_dbc_dev(struct xhci_hcd *xhci);
206 void xhci_remove_dbc_dev(struct xhci_hcd *xhci);
211 int xhci_dbc_tty_probe(struct device *dev, void __iomem *res, struct xhci_hcd *xhci);
222 int xhci_dbc_suspend(struct xhci_hcd *xhci);
223 int xhci_dbc_resume(struct xhci_hcd *xhci);
226 static inline int xhci_create_dbc_dev(struct xhci_hcd *xhci) in xhci_create_dbc_dev() argument
231 static inline void xhci_remove_dbc_dev(struct xhci_hcd *xhci) in xhci_remove_dbc_dev() argument
241 static inline int xhci_dbc_suspend(struct xhci_hcd *xhci) in xhci_dbc_suspend() argument
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H A Dxhci-dbg.c3 * xHCI host controller driver
11 #include "xhci.h"
13 char *xhci_get_slot_state(struct xhci_hcd *xhci, in xhci_get_slot_state() argument
16 struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx); in xhci_get_slot_state()
22 void xhci_dbg_trace(struct xhci_hcd *xhci, void (*trace)(struct va_format *), in xhci_dbg_trace() argument
31 xhci_dbg(xhci, "%pV\n", &vaf); in xhci_dbg_trace()
H A DKconfig21 tristate "xHCI HCD (USB 3.0) support"
24 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
28 module will be called xhci-hcd.
32 bool "xHCI support for debug capability"
35 Say 'Y' to enable the support for the xHCI debug capability. Make
36 sure that your xHCI host supports the extended debug capability and
37 you want a TTY serial device based on the xHCI debug capability
46 tristate "Support for additional Renesas xHCI controller with firmware"
49 Say 'Y' to enable the support for the Renesas xHCI controller with
55 tristate "Generic xHCI driver for a platform device"
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/linux/Documentation/devicetree/bindings/usb/
H A Drenesas,usb-xhci.yaml4 $id: http://devicetree.org/schemas/usb/renesas,usb-xhci.yaml#
7 title: Renesas USB xHCI controllers
18 - renesas,xhci-r8a7742 # RZ/G1H
19 - renesas,xhci-r8a7743 # RZ/G1M
20 - renesas,xhci-r8a7744 # RZ/G1N
21 - renesas,xhci-r8a7790 # R-Car H2
22 - renesas,xhci-r8a7791 # R-Car M2-W
23 - renesas,xhci-r8a7793 # R-Car M2-N
24 - const: renesas,rcar-gen2-xhci # R-Car Gen2 and RZ/G1
27 - renesas,xhci-r8a774a1 # RZ/G2M
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H A Dgeneric-xhci.yaml4 $id: http://devicetree.org/schemas/usb/generic-xhci.yaml#
7 title: USB xHCI Controller
15 - description: Generic xHCI device
16 const: generic-xhci
20 - marvell,armada3700-xhci
21 - marvell,armada-375-xhci
22 - marvell,armada-380-xhci
23 - marvell,armada-8k-xhci
24 - const: generic-xhci
28 - brcm,bcm2711-xhci
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H A Dmediatek,mtk-xhci.yaml5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
8 title: MediaTek USB3 xHCI
14 - $ref: usb-xhci.yaml
18 case 1: only supports xHCI driver;
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
28 - mediatek,mt7622-xhci
29 - mediatek,mt7623-xhci
30 - mediatek,mt7629-xhci
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/linux/drivers/usb/dwc3/
H A Dhost.c16 #include "../host/xhci-port.h"
17 #include "../host/xhci-ext-caps.h"
18 #include "../host/xhci-caps.h"
19 #include "../host/xhci-plat.h"
38 /* xhci regs is not mapped yet, do it temperary here */ in dwc3_power_off_all_roothub_ports()
59 dev_err(dwc->dev, "xhci base reg invalid\n"); in dwc3_power_off_all_roothub_ports()
130 struct platform_device *xhci; in dwc3_host_init() local
136 * mode to avoid VBUS glitch happen when xhci get reset later. in dwc3_host_init()
144 xhci = platform_device_alloc("xhci-hcd", PLATFORM_DEVID_AUTO); in dwc3_host_init()
145 if (!xhci) { in dwc3_host_init()
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/linux/Documentation/devicetree/bindings/phy/
H A Drealtek,usb2phy.yaml15 The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs
16 support multiple XHCI controllers. One PHY device node maps to one XHCI
20 The USB architecture includes three XHCI controllers.
21 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
23 XHCI controller#0 -- usb2phy -- phy#0
25 XHCI controller#1 -- usb2phy -- phy#0
26 XHCI controller#2 -- usb2phy -- phy#0
30 The USB architecture includes two XHCI controllers.
33 XHCI controller#0 -- usb2phy -- phy#0
34 XHCI controller#1 -- usb2phy -- phy#0
[all …]
H A Drealtek,usb3phy.yaml15 The USB 3.0 PHY driver is designed to support the XHCI controller. The SoCs
16 support multiple XHCI controllers. One PHY device node maps to one XHCI
20 The USB architecture includes three XHCI controllers.
21 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
23 XHCI controller#0 -- usb2phy -- phy#0
25 XHCI controller#1 -- usb2phy -- phy#0
26 XHCI controller#2 -- usb2phy -- phy#0
30 The USB architecture includes three XHCI controllers.
31 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
32 XHCI controller#0 -- usb2phy -- phy#0
[all …]
/linux/drivers/usb/cdns3/
H A Dhost.c18 #include "../host/xhci.h"
19 #include "../host/xhci-plat.h"
34 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_cdns3_plat_start() local
38 value = readl(&xhci->op_regs->command); in xhci_cdns3_plat_start()
40 writel(value, &xhci->op_regs->command); in xhci_cdns3_plat_start()
71 struct platform_device *xhci; in __cdns_host_init() local
77 xhci = platform_device_alloc("xhci-hcd", PLATFORM_DEVID_AUTO); in __cdns_host_init()
78 if (!xhci) { in __cdns_host_init()
79 dev_err(cdns->dev, "couldn't allocate xHCI device\n"); in __cdns_host_init()
83 xhci->dev.parent = cdns->dev; in __cdns_host_init()
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-pci-drivers-xhci_hcd5 xHCI compatible USB host controllers (i.e. super-speed
12 The DbC debug device shares a root port with xHCI host.
15 to xHCI.
21 port will roll back to the xHCI.
32 presented in the USB device descriptor by this xhci debug
45 presented in the USB device descriptor by this xhci debug
57 presented in the USB device descriptor by this xhci debug
70 presented in the USB Interface descriptor by the xhci debug

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