Lines Matching full:xhci
15 The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs
16 support multiple XHCI controllers. One PHY device node maps to one XHCI
20 The USB architecture includes three XHCI controllers.
21 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
23 XHCI controller#0 -- usb2phy -- phy#0
25 XHCI controller#1 -- usb2phy -- phy#0
26 XHCI controller#2 -- usb2phy -- phy#0
30 The USB architecture includes two XHCI controllers.
33 XHCI controller#0 -- usb2phy -- phy#0
34 XHCI controller#1 -- usb2phy -- phy#0
38 The USB architecture includes three XHCI controllers.
39 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
40 XHCI controller#0 -- usb2phy -- phy#0
41 XHCI controller#1 -- usb2phy -- phy#0
42 XHCI controller#2 -- usb2phy -- phy#0
46 The USB architecture includes three XHCI controllers.
47 Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.
48 XHCI controller#0 -- usb2phy -- phy#0
50 XHCI controller#1 -- usb2phy -- phy#0
51 XHCI controller#2 -- usb2phy -- phy#0
54 The USB architecture includes three XHCI controllers.
55 Each XHCI maps to one USB 2.0 PHY.
56 XHCI controller#0 -- usb2phy -- phy#0
57 XHCI controller#1 -- usb2phy -- phy#0
58 XHCI controller#2 -- usb2phy -- phy#0