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/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 CSI controller
10 - Svyatoslav Ryhel <clamor95@gmail.com>
15 - nvidia,tegra20-csi
16 - nvidia,tegra30-csi
24 - description: module clock
25 - description: PAD A clock
[all …]
H A Dnvidia,tegra210-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra210-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra CSI controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^csi@[0-9a-f]+$"
19 - nvidia,tegra210-csi
26 - description: module clock
[all …]
/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-sun8i-v3s.c6 * Based on pinctrl-sun8i-h3.c, which is:
9 * Based on pinctrl-sun8i-a23.c, which is:
10 * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
11 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
23 #include "pinctrl-sunxi.h"
30 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
35 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
40 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
45 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
50 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
[all …]
H A Dpinctrl-sun50i-h6.c1 // SPDX-License-Identifier: GPL-2.0
13 #include "pinctrl-sunxi.h"
37 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
40 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
43 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
46 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
49 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
52 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
55 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
58 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
[all …]
H A Dpinctrl-sun8i-a83t.c6 * Based on pinctrl-sun8i-a23.c, which is:
7 * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
8 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
20 #include "pinctrl-sunxi.h"
24 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
30 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
36 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
42 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
48 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
54 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
[all …]
H A Dpinctrl-sun8i-a33.c6 * Based on pinctrl-sun8i-a23.c, which is:
7 * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
8 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
20 #include "pinctrl-sunxi.h"
24 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
30 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
36 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
41 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
46 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
52 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
[all …]
H A Dpinctrl-sun50i-a64.c4 * Copyright (C) 2016 - ARM Ltd.
7 * Based on pinctrl-sun7i-a20.c, which is:
8 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
20 #include "pinctrl-sunxi.h"
23 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
29 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
36 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
43 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
51 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
58 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
[all …]
H A Dpinctrl-sun8i-a23.c4 * Copyright (C) 2014 Chen-Yu Tsai
6 * Chen-Yu Tsai <wens@csie.org>
10 * Maxime Ripard <maxime.ripard@free-electrons.com>
22 #include "pinctrl-sunxi.h"
70 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
75 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
80 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
85 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
90 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
95 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
[all …]
H A Dpinctrl-suniv-f1c100s.c2 * Allwinner new F-series F1C100s SoC (suniv) pinctrl driver.
12 * Copyright (C) 2014 Chen-Yu Tsai
14 * Chen-Yu Tsai <wens@csie.org>
18 * Maxime Ripard <maxime.ripard@free-electrons.com>
30 #include "pinctrl-sunxi.h"
63 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
71 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
79 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
87 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
256 SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
[all …]
H A Dpinctrl-sun9i-a80.c6 * Maxime Ripard <maxime.ripard@free-electrons.com>
18 #include "pinctrl-sunxi.h"
90 SUNXI_FUNCTION(0x2, "gmac"), /* MII-CRS */
102 SUNXI_FUNCTION(0x2, "gmac"), /* RGMII-TXCK / GMII-TXEN */
108 SUNXI_FUNCTION(0x2, "gmac"), /* MII-TXERR */
114 SUNXI_FUNCTION(0x2, "gmac"), /* RGMII-CLKIN / MII-COL */
131 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
136 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
143 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
148 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
[all …]
/linux/drivers/staging/media/atomisp/pci/
H A Dsystem_global.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 // SPDX-License-Identifier: GPL-2.0-or-later
15 * - The system is hetereogeneous; Multiple cells and devices classes
16 * - The cell and device instances are homogeneous, each device type
18 * - Device instances supporting a subset of the class capabilities are
25 * N.B. the 3 input formatters are of 2 different classess
246 ISYS_IRQ1_ID, /* port b */
253 * Input-buffer Controller.
261 /* end of Input-buffer Controller */
297 * Input System 2401: CSI-MIPI recevier.
[all …]
/linux/include/video/
H A Dimx-ipu-v3.h2 * Copyright 2005-2009 Freescale Semiconductor, Inc.
8 * http://www.opensource.org/licenses/lgpl-license.html
21 #include <media/v4l2-mediabus.h>
32 #define IPU_PIX_FMT_GBR24 v4l2_fourcc('G', 'B', 'R', '3')
56 * Enumeration of CSI destinations
83 /* 90-degree rotations require the IRT unit */
121 * but the direct CSI->VDI linking is handled the same way as IDMAC
123 * these channel names are used to support the direct CSI->VD
495 int csi; global() member
[all...]
/linux/arch/powerpc/include/asm/book3s/64/
H A Dkup.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 b 100f // skip_restore_amr
93 EMIT_WARN_ENTRY 999b, __FILE__, __LINE__, (BUGFLAG_WARNING | BUGFLAG_ONCE)
102 * save AMR -> stack;
105 * KUAP_BLOCKED -> AMR;
108 * save IAMR -> stack;
110 * KUEP_BLOCKED ->IAMR
118 * save AMR -> stack;
120 * KUAP_BLOCKED -> AMR;
132 b 100f // skip_save_amr
[all …]
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64-amarula-relic.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2018 Amarula Solutions B.V.
5 /dts-v1/;
7 #include "sun50i-a64.dtsi"
8 #include "sun50i-a64-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
13 model = "Amarula A64-Relic";
14 compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
21 stdout-path = "serial0:115200n8";
25 compatible = "i2c-gpio";
[all …]
/linux/drivers/staging/media/tegra-video/
H A Dtegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * VI and CSI SoC specific data, operations and registers accessors.
17 #include "csi.h"
40 /* Tegra210 VI CSI registers */
64 /* Tegra210 CSI Pixel Parser registers: Starts from 0x838, offset 0x0 */
92 /* Tegra210 CSI PHY registers */
150 writel_relaxed(val, chan->vi->iomem + addr); in tegra_vi_write()
155 return readl_relaxed(chan->vi->iomem + addr); in tegra_vi_read()
164 vi_csi_base = chan->vi->iomem + TEGRA210_VI_CSI_BASE(portno); in vi_csi_write()
174 vi_csi_base = chan->vi->iomem + TEGRA210_VI_CSI_BASE(portno); in vi_csi_read()
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779a0-falcon-csi-dsi.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Falcon CSI/DSI sub-board
8 #include <dt-bindings/media/video-interfaces.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-lanes = <0>;
22 data-lanes = <1 2 3 4>;
23 remote-endpoint = <&max96712_out0>;
33 #address-cells = <1>;
34 #size-cells = <0>;
[all …]
H A Dwhite-hawk-csi-dsi.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the White Hawk CSI/DSI sub-board
8 #include <dt-bindings/media/video-interfaces.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
21 bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>;
22 clock-lanes = <0>;
23 data-lanes = <1 2 3>;
24 line-orders = <MEDIA_BUS_CSI2_CPHY_LINE_ORDER_ABC
27 remote-endpoint = <&max96712_out0>;
[all …]
/linux/Documentation/admin-guide/media/
H A Dipu6-isys.rst1 .. SPDX-License-Identifier: GPL-2.0
9 Copyright |copy| 2023--2024 Intel Corporation
26 Intel IPU6 is made up of two components - Input System (ISYS) and Processing
29 The Input System mainly works as MIPI CSI-2 receiver which receives and
32 There are 2 driver modules - intel-ipu6 and intel-ipu6-isys. intel-ipu6 is an
34 firmware authentication, DMA mapping and IPU-MMU (internal Memory mapping Unit)
36 sub-device interfaces. The IPU6 ISYS driver supports camera sensors connected
37 to the IPU6 ISYS through V4L2 sub-device sensor drivers.
39 .. Note:: See Documentation/driver-api/media/drivers/ipu6.rst for more
45 The Input System driver mainly configures CSI-2 D-PHY, constructs the firmware
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-a83t-tbs-a711.dts5 * This file is dual-licensed: you can use it either under the terms
22 * b) Permission is hereby granted, free of charge, to any person
44 /dts-v1/;
45 #include "sun8i-a83t.dtsi"
47 #include <dt-bindings/gpio/gpio.h>
48 #include <dt-bindings/pwm/pwm.h>
49 #include <dt-bindings/input/input.h>
53 compatible = "tbs-biometrics,a711", "allwinner,sun8i-a83t";
61 stdout-path = "serial0:115200n8";
65 compatible = "pwm-backlight";
[all …]
H A Dsun5i-a13-licheepi-one.dts4 * Based on sun5i-a13-olinuxino.dts, which is
5 * Copyright 2012 Maxime Ripard <maxime.ripard@free-electrons.com>
8 * This file is dual-licensed: you can use it either under the terms
25 * b) Permission is hereby granted, free of charge, to any person
47 /dts-v1/;
48 #include "sun5i-a13.dtsi"
49 #include "sunxi-common-regulators.dtsi"
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
56 compatible = "licheepi,licheepi-one", "allwinner,sun5i-a13";
[all …]
H A Dsun6i-a31s-sinovoip-bpi-m2.dts4 * This file is dual-licensed: you can use it either under the terms
21 * b) Permission is hereby granted, free of charge, to any person
43 /dts-v1/;
44 #include "sun6i-a31s.dtsi"
45 #include <dt-bindings/gpio/gpio.h>
48 model = "Sinovoip BPI-M2";
49 compatible = "sinovoip,bpi-m2", "allwinner,sun6i-a31s";
56 stdout-path = "serial0:115200n8";
60 compatible = "gpio-leds";
62 led-0 {
[all …]
H A Dsun6i-a31s-yones-toptech-bs1078-v2.dts4 * This file is dual-licensed: you can use it either under the terms
21 * b) Permission is hereby granted, free of charge, to any person
43 /dts-v1/;
44 #include "sun6i-a31s.dtsi"
45 #include "sunxi-common-regulators.dtsi"
47 #include <dt-bindings/gpio/gpio.h>
51 compatible = "yones-toptech,bs1078-v2", "allwinner,sun6i-a31s";
60 stdout-path = "serial0:115200n8";
89 vmmc-supply = <&reg_vcc3v0>;
90 bus-width = <4>;
[all …]
H A Dsun4i-a10-gemei-g9.dts6 * This file is dual-licensed: you can use it either under the terms
23 * b) Permission is hereby granted, free of charge, to any person
45 /dts-v1/;
46 #include "sun4i-a10.dtsi"
47 #include "sunxi-common-regulators.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/input.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
54 compatible = "gemei,g9", "allwinner,sun4i-a10";
61 stdout-path = "serial0:115200n8";
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp157f-dk2-scmi.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
7 #include "stm32mp15-scmi.dtsi"
10 reserved-memory {
13 no-map;
18 compatible = "arm,smc-wdt";
19 arm,smc-id = <0xbc000000>;
26 vdd-supply = <&scmi_vdd>;
27 vdda-supply = <&scmi_vdd>;
44 VL-supply = <&scmi_v3v3>;
[all …]
/linux/drivers/nvme/host/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2011-2014, Intel Corporation.
9 #include <linux/blk-mq.h>
10 #include <linux/blk-integrity.h>
17 #include <linux/backing-dev.h>
29 #include <linux/nvme-auth.h>
110 * nvme_wq - hosts nvme related works that are not reset or delete
111 * nvme_reset_wq - host
1905 nvme_ns_ids_equal(struct nvme_ns_ids * a,struct nvme_ns_ids * b) nvme_ns_ids_equal() argument
3294 nvme_get_log_lsi(struct nvme_ctrl * ctrl,u32 nsid,u8 log_page,u8 lsp,u8 csi,void * log,size_t size,u64 offset,u16 lsi) nvme_get_log_lsi() argument
3313 nvme_get_log(struct nvme_ctrl * ctrl,u32 nsid,u8 log_page,u8 lsp,u8 csi,void * log,size_t size,u64 offset) nvme_get_log() argument
3320 nvme_get_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log) nvme_get_effects_log() argument
3407 nvme_init_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log) nvme_init_effects_log() argument
[all...]

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