1*1b940d03SGeert Uytterhoeven// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*1b940d03SGeert Uytterhoeven/* 3*1b940d03SGeert Uytterhoeven * Device Tree Source for the White Hawk CSI/DSI sub-board 4*1b940d03SGeert Uytterhoeven * 5*1b940d03SGeert Uytterhoeven * Copyright (C) 2022 Glider bv 6*1b940d03SGeert Uytterhoeven */ 7*1b940d03SGeert Uytterhoeven 8*1b940d03SGeert Uytterhoeven#include <dt-bindings/media/video-interfaces.h> 9*1b940d03SGeert Uytterhoeven 10*1b940d03SGeert Uytterhoeven&csi40 { 11*1b940d03SGeert Uytterhoeven status = "okay"; 12*1b940d03SGeert Uytterhoeven 13*1b940d03SGeert Uytterhoeven ports { 14*1b940d03SGeert Uytterhoeven #address-cells = <1>; 15*1b940d03SGeert Uytterhoeven #size-cells = <0>; 16*1b940d03SGeert Uytterhoeven 17*1b940d03SGeert Uytterhoeven port@0 { 18*1b940d03SGeert Uytterhoeven reg = <0>; 19*1b940d03SGeert Uytterhoeven 20*1b940d03SGeert Uytterhoeven csi40_in: endpoint { 21*1b940d03SGeert Uytterhoeven bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>; 22*1b940d03SGeert Uytterhoeven clock-lanes = <0>; 23*1b940d03SGeert Uytterhoeven data-lanes = <1 2 3>; 24*1b940d03SGeert Uytterhoeven remote-endpoint = <&max96712_out0>; 25*1b940d03SGeert Uytterhoeven }; 26*1b940d03SGeert Uytterhoeven }; 27*1b940d03SGeert Uytterhoeven }; 28*1b940d03SGeert Uytterhoeven}; 29*1b940d03SGeert Uytterhoeven 30*1b940d03SGeert Uytterhoeven&csi41 { 31*1b940d03SGeert Uytterhoeven status = "okay"; 32*1b940d03SGeert Uytterhoeven 33*1b940d03SGeert Uytterhoeven ports { 34*1b940d03SGeert Uytterhoeven #address-cells = <1>; 35*1b940d03SGeert Uytterhoeven #size-cells = <0>; 36*1b940d03SGeert Uytterhoeven 37*1b940d03SGeert Uytterhoeven port@0 { 38*1b940d03SGeert Uytterhoeven reg = <0>; 39*1b940d03SGeert Uytterhoeven 40*1b940d03SGeert Uytterhoeven csi41_in: endpoint { 41*1b940d03SGeert Uytterhoeven bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>; 42*1b940d03SGeert Uytterhoeven clock-lanes = <0>; 43*1b940d03SGeert Uytterhoeven data-lanes = <1 2 3>; 44*1b940d03SGeert Uytterhoeven remote-endpoint = <&max96712_out1>; 45*1b940d03SGeert Uytterhoeven }; 46*1b940d03SGeert Uytterhoeven }; 47*1b940d03SGeert Uytterhoeven }; 48*1b940d03SGeert Uytterhoeven}; 49*1b940d03SGeert Uytterhoeven 50*1b940d03SGeert Uytterhoeven&i2c0 { 51*1b940d03SGeert Uytterhoeven pca9654_a: gpio@21 { 52*1b940d03SGeert Uytterhoeven compatible = "onnn,pca9654"; 53*1b940d03SGeert Uytterhoeven reg = <0x21>; 54*1b940d03SGeert Uytterhoeven gpio-controller; 55*1b940d03SGeert Uytterhoeven #gpio-cells = <2>; 56*1b940d03SGeert Uytterhoeven }; 57*1b940d03SGeert Uytterhoeven 58*1b940d03SGeert Uytterhoeven pca9654_b: gpio@22 { 59*1b940d03SGeert Uytterhoeven compatible = "onnn,pca9654"; 60*1b940d03SGeert Uytterhoeven reg = <0x22>; 61*1b940d03SGeert Uytterhoeven gpio-controller; 62*1b940d03SGeert Uytterhoeven #gpio-cells = <2>; 63*1b940d03SGeert Uytterhoeven }; 64*1b940d03SGeert Uytterhoeven 65*1b940d03SGeert Uytterhoeven eeprom@52 { 66*1b940d03SGeert Uytterhoeven compatible = "rohm,br24g01", "atmel,24c01"; 67*1b940d03SGeert Uytterhoeven label = "csi-dsi-sub-board-id"; 68*1b940d03SGeert Uytterhoeven reg = <0x52>; 69*1b940d03SGeert Uytterhoeven pagesize = <8>; 70*1b940d03SGeert Uytterhoeven }; 71*1b940d03SGeert Uytterhoeven}; 72*1b940d03SGeert Uytterhoeven 73*1b940d03SGeert Uytterhoeven&i2c1 { 74*1b940d03SGeert Uytterhoeven gmsl0: gmsl-deserializer@49 { 75*1b940d03SGeert Uytterhoeven compatible = "maxim,max96712"; 76*1b940d03SGeert Uytterhoeven reg = <0x49>; 77*1b940d03SGeert Uytterhoeven enable-gpios = <&pca9654_a 0 GPIO_ACTIVE_HIGH>; 78*1b940d03SGeert Uytterhoeven 79*1b940d03SGeert Uytterhoeven ports { 80*1b940d03SGeert Uytterhoeven #address-cells = <1>; 81*1b940d03SGeert Uytterhoeven #size-cells = <0>; 82*1b940d03SGeert Uytterhoeven 83*1b940d03SGeert Uytterhoeven port@4 { 84*1b940d03SGeert Uytterhoeven reg = <4>; 85*1b940d03SGeert Uytterhoeven max96712_out0: endpoint { 86*1b940d03SGeert Uytterhoeven bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>; 87*1b940d03SGeert Uytterhoeven clock-lanes = <0>; 88*1b940d03SGeert Uytterhoeven data-lanes = <1 2 3>; 89*1b940d03SGeert Uytterhoeven remote-endpoint = <&csi40_in>; 90*1b940d03SGeert Uytterhoeven }; 91*1b940d03SGeert Uytterhoeven }; 92*1b940d03SGeert Uytterhoeven }; 93*1b940d03SGeert Uytterhoeven }; 94*1b940d03SGeert Uytterhoeven 95*1b940d03SGeert Uytterhoeven gmsl1: gmsl-deserializer@4b { 96*1b940d03SGeert Uytterhoeven compatible = "maxim,max96712"; 97*1b940d03SGeert Uytterhoeven reg = <0x4b>; 98*1b940d03SGeert Uytterhoeven enable-gpios = <&pca9654_b 0 GPIO_ACTIVE_HIGH>; 99*1b940d03SGeert Uytterhoeven 100*1b940d03SGeert Uytterhoeven ports { 101*1b940d03SGeert Uytterhoeven #address-cells = <1>; 102*1b940d03SGeert Uytterhoeven #size-cells = <0>; 103*1b940d03SGeert Uytterhoeven 104*1b940d03SGeert Uytterhoeven port@4 { 105*1b940d03SGeert Uytterhoeven reg = <4>; 106*1b940d03SGeert Uytterhoeven max96712_out1: endpoint { 107*1b940d03SGeert Uytterhoeven bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>; 108*1b940d03SGeert Uytterhoeven clock-lanes = <0>; 109*1b940d03SGeert Uytterhoeven data-lanes = <1 2 3>; 110*1b940d03SGeert Uytterhoeven remote-endpoint = <&csi41_in>; 111*1b940d03SGeert Uytterhoeven }; 112*1b940d03SGeert Uytterhoeven }; 113*1b940d03SGeert Uytterhoeven }; 114*1b940d03SGeert Uytterhoeven }; 115*1b940d03SGeert Uytterhoeven}; 116*1b940d03SGeert Uytterhoeven 117*1b940d03SGeert Uytterhoeven&isp0 { 118*1b940d03SGeert Uytterhoeven status = "okay"; 119*1b940d03SGeert Uytterhoeven}; 120*1b940d03SGeert Uytterhoeven 121*1b940d03SGeert Uytterhoeven&isp1 { 122*1b940d03SGeert Uytterhoeven status = "okay"; 123*1b940d03SGeert Uytterhoeven}; 124*1b940d03SGeert Uytterhoeven 125*1b940d03SGeert Uytterhoeven&vin00 { 126*1b940d03SGeert Uytterhoeven status = "okay"; 127*1b940d03SGeert Uytterhoeven}; 128*1b940d03SGeert Uytterhoeven 129*1b940d03SGeert Uytterhoeven&vin01 { 130*1b940d03SGeert Uytterhoeven status = "okay"; 131*1b940d03SGeert Uytterhoeven}; 132*1b940d03SGeert Uytterhoeven 133*1b940d03SGeert Uytterhoeven&vin02 { 134*1b940d03SGeert Uytterhoeven status = "okay"; 135*1b940d03SGeert Uytterhoeven}; 136*1b940d03SGeert Uytterhoeven 137*1b940d03SGeert Uytterhoeven&vin03 { 138*1b940d03SGeert Uytterhoeven status = "okay"; 139*1b940d03SGeert Uytterhoeven}; 140*1b940d03SGeert Uytterhoeven 141*1b940d03SGeert Uytterhoeven&vin04 { 142*1b940d03SGeert Uytterhoeven status = "okay"; 143*1b940d03SGeert Uytterhoeven}; 144*1b940d03SGeert Uytterhoeven 145*1b940d03SGeert Uytterhoeven&vin05 { 146*1b940d03SGeert Uytterhoeven status = "okay"; 147*1b940d03SGeert Uytterhoeven}; 148*1b940d03SGeert Uytterhoeven 149*1b940d03SGeert Uytterhoeven&vin06 { 150*1b940d03SGeert Uytterhoeven status = "okay"; 151*1b940d03SGeert Uytterhoeven}; 152*1b940d03SGeert Uytterhoeven 153*1b940d03SGeert Uytterhoeven&vin07 { 154*1b940d03SGeert Uytterhoeven status = "okay"; 155*1b940d03SGeert Uytterhoeven}; 156*1b940d03SGeert Uytterhoeven 157*1b940d03SGeert Uytterhoeven&vin08 { 158*1b940d03SGeert Uytterhoeven status = "okay"; 159*1b940d03SGeert Uytterhoeven}; 160*1b940d03SGeert Uytterhoeven 161*1b940d03SGeert Uytterhoeven&vin09 { 162*1b940d03SGeert Uytterhoeven status = "okay"; 163*1b940d03SGeert Uytterhoeven}; 164*1b940d03SGeert Uytterhoeven 165*1b940d03SGeert Uytterhoeven&vin10 { 166*1b940d03SGeert Uytterhoeven status = "okay"; 167*1b940d03SGeert Uytterhoeven}; 168*1b940d03SGeert Uytterhoeven 169*1b940d03SGeert Uytterhoeven&vin11 { 170*1b940d03SGeert Uytterhoeven status = "okay"; 171*1b940d03SGeert Uytterhoeven}; 172*1b940d03SGeert Uytterhoeven 173*1b940d03SGeert Uytterhoeven&vin12 { 174*1b940d03SGeert Uytterhoeven status = "okay"; 175*1b940d03SGeert Uytterhoeven}; 176*1b940d03SGeert Uytterhoeven 177*1b940d03SGeert Uytterhoeven&vin13 { 178*1b940d03SGeert Uytterhoeven status = "okay"; 179*1b940d03SGeert Uytterhoeven}; 180*1b940d03SGeert Uytterhoeven 181*1b940d03SGeert Uytterhoeven&vin14 { 182*1b940d03SGeert Uytterhoeven status = "okay"; 183*1b940d03SGeert Uytterhoeven}; 184*1b940d03SGeert Uytterhoeven 185*1b940d03SGeert Uytterhoeven&vin15 { 186*1b940d03SGeert Uytterhoeven status = "okay"; 187*1b940d03SGeert Uytterhoeven}; 188