196851d39SAndre Przywara /*
296851d39SAndre Przywara * Allwinner A64 SoCs pinctrl driver.
396851d39SAndre Przywara *
496851d39SAndre Przywara * Copyright (C) 2016 - ARM Ltd.
596851d39SAndre Przywara * Author: Andre Przywara <andre.przywara@arm.com>
696851d39SAndre Przywara *
796851d39SAndre Przywara * Based on pinctrl-sun7i-a20.c, which is:
896851d39SAndre Przywara * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
996851d39SAndre Przywara *
1096851d39SAndre Przywara * This file is licensed under the terms of the GNU General Public
1196851d39SAndre Przywara * License version 2. This program is licensed "as is" without any
1296851d39SAndre Przywara * warranty of any kind, whether express or implied.
1396851d39SAndre Przywara */
1496851d39SAndre Przywara
1596851d39SAndre Przywara #include <linux/module.h>
1696851d39SAndre Przywara #include <linux/platform_device.h>
1796851d39SAndre Przywara #include <linux/of.h>
1896851d39SAndre Przywara #include <linux/pinctrl/pinctrl.h>
1996851d39SAndre Przywara
2096851d39SAndre Przywara #include "pinctrl-sunxi.h"
2196851d39SAndre Przywara
2296851d39SAndre Przywara static const struct sunxi_desc_pin a64_pins[] = {
2396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
2496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
2596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
2696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart2"), /* TX */
2796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "jtag"), /* MS0 */
2896851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* EINT0 */
2996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
3096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
3196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart2"), /* RX */
3396851d39SAndre Przywara SUNXI_FUNCTION(0x4, "jtag"), /* CK0 */
3496851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */
3596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* EINT1 */
3696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
3796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
3896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
4096851d39SAndre Przywara SUNXI_FUNCTION(0x4, "jtag"), /* DO0 */
4196851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */
4296851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* EINT2 */
4396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
4496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
4596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
4696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
4796851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s0"), /* MCLK */
4896851d39SAndre Przywara SUNXI_FUNCTION(0x4, "jtag"), /* DI0 */
4996851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */
5096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* EINT3 */
5196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
5296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
5396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
5496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif2"), /* SYNC */
5596851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s0"), /* SYNC */
5696851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* CLK */
5796851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* EINT4 */
5896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
5996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
6096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
6196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif2"), /* BCLK */
6296851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s0"), /* BCLK */
6396851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* DATA */
6496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* EINT5 */
6596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
6696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
6796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
6896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif2"), /* DOUT */
6996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s0"), /* DOUT */
7096851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* RST */
7196851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* EINT6 */
7296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
7396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
7496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
7596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif2"), /* DIN */
7696851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s0"), /* DIN */
7796851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* DET */
7896851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* EINT7 */
7996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
8096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
8196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
8296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "uart0"), /* TX */
8396851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* EINT8 */
8496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
8596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
8696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
8796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "uart0"), /* RX */
8896851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* EINT9 */
8996851d39SAndre Przywara /* Hole */
9096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
9196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
9296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
9396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
9496851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi0")), /* MOSI */
9596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
9696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
9796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
9896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
9996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2"), /* DS */
10096851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi0")), /* MISO */
10196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
10296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
10396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
10496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
10596851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi0")), /* SCK */
10696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
10796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
10896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
10996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NCE1 */
11096851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi0")), /* CS */
11196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
11296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
11396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
11496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
11596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
11696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
11796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
11896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NRE# */
11996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
12096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
12196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
12296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
12396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
12496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
12596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
12696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
12796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
12896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0")), /* NRB1 */
12996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
13096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
13196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
13296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
13396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
13496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
13596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
13696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
13796851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
13896851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
13996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
14096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
14196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
14296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
14396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
14496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
14596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
14696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
14796851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
14896851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
14996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
15096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
15196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
15296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */
15396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */
15496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
15596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
15696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
15796851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */
15896851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */
15996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
16096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
16196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
16296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */
16396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
16496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
16596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
16696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
16796851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */
16896851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
16996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
17096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
17196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
17296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQS */
17396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* RST */
17496851d39SAndre Przywara /* Hole */
17596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
17696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
17796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
17896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
17996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart3"), /* TX */
18096851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi1"), /* CS */
18196851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* CLK */
18296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
18396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
18496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
18596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
18696851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart3"), /* RX */
18796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi1"), /* CLK */
18896851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* DE */
18996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
19096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
19196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
19296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
19396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart4"), /* TX */
19496851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */
19596851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* HSYNC */
19696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
19796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
19896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
19996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
20096851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart4"), /* RX */
20196851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi1"), /* MISO */
20296851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* VSYNC */
20396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
20496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
20596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
20696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
20796851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart4"), /* RTS */
20896851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D0 */
20996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
21096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
21196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
21296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
21396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart4"), /* CTS */
21496851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D1 */
21596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
21696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
21796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
21896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
21996851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D2 */
22096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
22196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
22296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
22396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
22496851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D3 */
22596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
22696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
22796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
22896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
22996851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac"), /* ERXD3 */
23096851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D4 */
23196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
23296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
23396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
23496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
23596851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac"), /* ERXD2 */
23696851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D5 */
23796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
23896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
23996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
24096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
24196851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ERXD1 */
24296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
24396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
24496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
24596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
24696851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ERXD0 */
24796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
24896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
24996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
25096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
25196851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VP0 */
25296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ERXCK */
25396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
25496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
25596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
25696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
25796851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VN0 */
25896851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ERXCTL */
25996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
26096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
26196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
26296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
26396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VP1 */
26496851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ENULL */
26596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
26696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
26796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
26896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
26996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VN1 */
27096851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac"), /* ETXD3 */
27196851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D6 */
27296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
27396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
27496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
27596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
27696851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VP2 */
27796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac"), /* ETXD2 */
27896851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D7 */
27996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
28096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
28196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
28296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
28396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VN2 */
28496851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ETXD1 */
28596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
28696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
28796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
28896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
28996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VPC */
29096851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ETXD0 */
29196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
29296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
29396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
29496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
29596851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VNC */
29696851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ETXCK */
29796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
29896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
29996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
30096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
30196851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VP3 */
30296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ETXCTL */
30396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
30496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
30596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
30696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
30796851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VN3 */
30896851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ECLKIN */
30996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
31096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
31196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
31296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "pwm"), /* PWM0 */
31396851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* EMDC */
31496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
31596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
31696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
31796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* EMDIO */
31896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
31996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
32096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out")),
32196851d39SAndre Przywara /* Hole */
32296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
32396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
32496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3253504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* PCK */
326*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* CLK */
32796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
32896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
32996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3303504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* CK */
331*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* ERR */
33296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
33396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
33496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3353504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
336*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* SYNC */
33796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
33896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
33996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3403504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
341*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* DVLD */
34296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
34396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
34496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3453504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* D0 */
346*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* D0 */
34796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
34896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
34996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3503504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* D1 */
351*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* D1 */
35296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
35396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
35496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3553504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* D2 */
356*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* D2 */
35796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
35896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
35996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3603504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* D3 */
361*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* D3 */
36296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
36396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
36496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3653504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* D4 */
366*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* D4 */
36796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
36896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
36996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3703504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* D5 */
371*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* D5 */
37296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
37396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
37496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3753504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* D6 */
376*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* D6 */
37796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
37896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
37996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3803504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi"), /* D7 */
381*4f45f45bSChen-Yu Tsai SUNXI_FUNCTION(0x4, "ts")), /* D7 */
38296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
38396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
38496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3853504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi")), /* SCK */
38696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
38796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
38896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
3893504caa1SChen-Yu Tsai SUNXI_FUNCTION(0x2, "csi")), /* SDA */
39096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
39196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
39296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
39396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "pll"), /* LOCK_DBG */
39496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2c2")), /* SCK */
39596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
39696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
39796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
39896851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2c2")), /* SDA */
39996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
40096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
40196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out")),
40296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
40396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
40496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out")),
40596851d39SAndre Przywara /* Hole */
40696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
40796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
40896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
40996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
41096851d39SAndre Przywara SUNXI_FUNCTION(0x3, "jtag")), /* MSI */
41196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
41296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
41396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
41496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
41596851d39SAndre Przywara SUNXI_FUNCTION(0x3, "jtag")), /* DI1 */
41696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
41796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
41896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
41996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
42096851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart0")), /* TX */
42196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
42296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
42396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
42496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
42596851d39SAndre Przywara SUNXI_FUNCTION(0x3, "jtag")), /* DO1 */
42696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
42796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
42896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
42996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
4307c5c2c2dSAndre Przywara SUNXI_FUNCTION(0x3, "uart0")), /* RX */
43196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
43296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
43396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
43496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
43596851d39SAndre Przywara SUNXI_FUNCTION(0x3, "jtag")), /* CK1 */
43696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
43796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
43896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out")),
43996851d39SAndre Przywara /* Hole */
44096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
44196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
44296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
44396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
44496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* EINT0 */
44596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
44696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
44796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
44896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
44996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* EINT1 */
45096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
45196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
45296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
45396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
45496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* EINT2 */
45596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
45696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
45796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
45896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
45996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* EINT3 */
46096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
46196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
46296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
46396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
46496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* EINT4 */
46596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
46696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
46796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
46896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
46996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* EINT5 */
47096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
47196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
47296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
47396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart1"), /* TX */
47496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* EINT6 */
47596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
47696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
47796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
47896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart1"), /* RX */
47996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), /* EINT7 */
48096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
48196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
48296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
48396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
48496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), /* EINT8 */
48596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
48696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
48796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
48896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
48996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), /* EINT9 */
49096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
49196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
49296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
49396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif3"), /* SYNC */
49496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s1"), /* SYNC */
49596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* EINT10 */
49696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
49796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
49896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
49996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif3"), /* BCLK */
50096851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s1"), /* BCLK */
50196851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* EINT11 */
50296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
50396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
50496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
50596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif3"), /* DOUT */
50696851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s1"), /* DOUT */
50796851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* EINT12 */
50896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
50996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
51096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
51196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif3"), /* DIN */
51296851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s1"), /* DIN */
51396851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* EINT13 */
51496851d39SAndre Przywara /* Hole */
51596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
51696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
51796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
51896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
51996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), /* EINT0 */
52096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
52196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
52296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
52396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
52496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* EINT1 */
52596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
52696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
52796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
52896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
52996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), /* EINT2 */
53096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
53196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
53296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
53396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
53496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), /* EINT3 */
53596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
53696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
53796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
53896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart3"), /* TX */
53996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), /* EINT4 */
54096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
54196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
54296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
54396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart3"), /* RX */
54496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), /* EINT5 */
54596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
54696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
54796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
54896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart3"), /* RTS */
54996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), /* EINT6 */
55096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
55196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
55296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
55396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart3"), /* CTS */
55496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), /* EINT7 */
55596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
55696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
55796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
55896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "spdif"), /* OUT */
55996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), /* EINT8 */
56096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
56196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
56296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
56396851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), /* EINT9 */
56496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
56596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
56696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
56796851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mic"), /* CLK */
56896851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* EINT10 */
56996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
57096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"),
57196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"),
57296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mic"), /* DATA */
57396851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* EINT11 */
57496851d39SAndre Przywara };
57596851d39SAndre Przywara
57696851d39SAndre Przywara static const struct sunxi_pinctrl_desc a64_pinctrl_data = {
57796851d39SAndre Przywara .pins = a64_pins,
57896851d39SAndre Przywara .npins = ARRAY_SIZE(a64_pins),
57996851d39SAndre Przywara .irq_banks = 3,
58096851d39SAndre Przywara };
58196851d39SAndre Przywara
a64_pinctrl_probe(struct platform_device * pdev)58296851d39SAndre Przywara static int a64_pinctrl_probe(struct platform_device *pdev)
58396851d39SAndre Przywara {
58496851d39SAndre Przywara return sunxi_pinctrl_init(pdev,
58596851d39SAndre Przywara &a64_pinctrl_data);
58696851d39SAndre Przywara }
58796851d39SAndre Przywara
58896851d39SAndre Przywara static const struct of_device_id a64_pinctrl_match[] = {
58996851d39SAndre Przywara { .compatible = "allwinner,sun50i-a64-pinctrl", },
59096851d39SAndre Przywara {}
59196851d39SAndre Przywara };
59296851d39SAndre Przywara
59396851d39SAndre Przywara static struct platform_driver a64_pinctrl_driver = {
59496851d39SAndre Przywara .probe = a64_pinctrl_probe,
59596851d39SAndre Przywara .driver = {
59696851d39SAndre Przywara .name = "sun50i-a64-pinctrl",
59796851d39SAndre Przywara .of_match_table = a64_pinctrl_match,
59896851d39SAndre Przywara },
59996851d39SAndre Przywara };
60096851d39SAndre Przywara builtin_platform_driver(a64_pinctrl_driver);
601