Home
last modified time | relevance | path

Searched +full:0 +full:x0b116000 (Results 1 – 7 of 7) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,a53pll.yaml32 const: 0
59 reg = <0xb016000 0x40>;
60 #clock-cells = <0>;
66 reg = <0x0b116000 0x40>;
67 #clock-cells = <0>;
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dipq5018.dtsi21 #clock-cells = <0>;
26 #clock-cells = <0>;
32 #size-cells = <0>;
34 CPU0: cpu@0 {
37 reg = <0x0>;
47 reg = <0x1>;
57 cache-size = <0x80000>;
89 reg = <0x0 0x40000000 0x0 0x0>;
108 reg = <0x0 0x4a800000 0x0 0x200000>;
113 reg = <0x0 0x4aa00000 0x0 0x100000>;
[all …]
H A Dipq5332.dtsi21 #clock-cells = <0>;
26 #clock-cells = <0>;
32 #size-cells = <0>;
34 CPU0: cpu@0 {
37 reg = <0x0>;
47 reg = <0x1>;
57 reg = <0x2>;
67 reg = <0x3>;
84 qcom,dload-mode = <&tcsr 0x6100>;
91 reg = <0x0 0x40000000 0x0 0x0>;
[all …]
H A Dipq9574.dtsi24 #clock-cells = <0>;
29 #clock-cells = <0>;
35 #size-cells = <0>;
37 CPU0: cpu@0 {
40 reg = <0x0>;
53 reg = <0x1>;
66 reg = <0x2>;
79 reg = <0x3>;
99 qcom,dload-mode = <&tcsr 0x6100>;
106 reg = <0x0 0x40000000 0x0 0x0>;
[all …]
H A Dipq6018.dtsi23 #clock-cells = <0>;
29 #clock-cells = <0>;
35 #size-cells = <0>;
37 CPU0: cpu@0 {
40 reg = <0x0>;
54 reg = <0x1>;
67 reg = <0x2>;
80 reg = <0x3>;
99 qcom,dload-mode = <&tcsr 0x6100>;
111 opp-supported-hw = <0xf>;
[all …]
H A Dipq8074.dtsi21 #clock-cells = <0>;
27 #clock-cells = <0>;
33 #size-cells = <0>;
35 CPU0: cpu@0 {
38 reg = <0x0>;
47 reg = <0x1>;
55 reg = <0x2>;
63 reg = <0x3>;
90 reg = <0x0 0x4a600000 0x0 0x400000>;
95 reg = <0x0 0x4aa00000 0x0 0x100000>;
[all …]
H A Dmsm8939.dtsi30 #clock-cells = <0>;
36 #clock-cells = <0>;
43 #size-cells = <0>;
49 reg = <0x100>;
67 reg = <0x101>;
80 reg = <0x102>;
93 reg = <0x103>;
102 CPU4: cpu@0 {
106 reg = <0x0>;
124 reg = <0x1>;
[all …]