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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-skov-revc-lt2.dtsi69 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
70 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
71 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
72 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
73 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
74 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
75 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
76 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
77 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
78 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
H A Dimx6dl-skov-revc-lt6.dts76 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
77 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
78 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
79 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
80 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
81 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
82 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
83 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
84 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
85 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
H A Dimx6qdl-phytec-mira-peb-av-02.dtsi77 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
78 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
79 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
81 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
82 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
83 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
84 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
85 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
86 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
87 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
[all …]
H A Dimx6q-skov-revc-lt6.dts98 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
99 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
100 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
101 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
102 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
103 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
104 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
105 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
106 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
107 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
H A Dimx6q-var-mx6customboard.dts133 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
134 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
135 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
136 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
137 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10
138 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
139 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
140 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
141 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
142 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
[all …]
H A Dimx6ul-tx6ul-mainboard.dts167 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x10 /* LSCLK */
168 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x10 /* OE_ACD */
169 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
170 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x10 /* VSYNC */
171 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x10
172 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x10
173 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x10
174 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x10
175 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x10
176 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x10
[all …]
H A Dimx6dl-yapp4-common.dtsi122 reg = <0x10>;
430 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
431 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
432 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
433 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
434 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
435 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
436 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
437 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
438 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
H A Dimx6dl-yapp43-common.dtsi437 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
438 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
439 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
440 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
441 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
442 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
443 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
444 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
445 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
446 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
[all …]
H A Dimx6qdl-sabrelite.dtsi513 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
514 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
515 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
516 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
517 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
518 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
519 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
520 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
521 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
522 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
/linux/fs/unicode/
H A Dutf8data.c_shipped96 0xe1,0x8d,0xa9,0x10,0x08,0x01,0xff,0xe8,0xb1,0x88,0x00,0x01,0xff,0xe6,0x9b,0xb4,
98 0xab,0x10,0x08,0x01,0xff,0xe9,0xb9,0xbf,0x00,0x01,0xff,0xe8,0xab,0x96,0x00,0xe3,
99 0x09,0xac,0xe2,0xe8,0xab,0xe1,0xd7,0xab,0x10,0x08,0x01,0xff,0xe7,0xb8,0xb7,0x00,
109 0x4e,0xe3,0xe2,0x2d,0xe3,0xe1,0x1b,0xe3,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00,
111 0xe2,0x0e,0xe5,0xe1,0xfd,0xe4,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff,
112 0xe5,0x93,0xb6,0x00,0xd4,0x34,0xd3,0x18,0xe2,0xf7,0xe5,0xe1,0xe6,0xe5,0x10,0x09,
114 0xe6,0x91,0x11,0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff,0xe5,0xac,
116 0x10,0x08,0x05,0xff,0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98,0x00,0xe1,
117 0x38,0xe6,0x10,0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00,
119 0xea,0xe1,0x93,0xea,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff,0xe6,0xb5,
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-pocketbeagle.dts225 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
226 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
234 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
235 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
243 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
244 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
252 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
253 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
261 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
262 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
[all …]
/linux/drivers/scsi/aic7xxx/
H A Daic79xx_reg_print.c_shipped16 { "PCIINT", 0x10, 0x10 },
47 { "SEQ_SWTMRTO", 0x10, 0x10 }
62 { "AUTOCLRCMDINT", 0x10, 0x10 },
101 { "MREQPEND", 0x10, 0x10 },
129 { "FORCEBUSFREE", 0x10, 0x10 },
146 { "ENRSELI", 0x10, 0x10 },
162 { "FIFO0FREE", 0x10, 0x10 },
187 { "ATNI", 0x10, 0x10 },
207 { "COMMAND_PHASE", 0x10, 0x10 },
242 { "ENSELINGO", 0x10, 0x10 },
[all …]
H A Daic7xxx_reg_print.c_shipped16 { "ENRSELI", 0x10, 0x10 },
33 { "CLRSTCNT", 0x10, 0x10 },
51 { "ATNI", 0x10, 0x10 },
74 { "SINGLE_EDGE", 0x10, 0x10 },
95 { "SELINGO", 0x10, 0x10 },
113 { "PHASEMIS", 0x10, 0x10 },
131 { "EXP_ACTIVE", 0x10, 0x10 },
163 { "ENSELINGO", 0x10, 0x10 },
172 0x10, regvalue, cur_col, wrap));
180 { "ENPHASEMIS", 0x10, 0x10 },
[all …]
H A Daic7xxx_reg.h_shipped75 ahc_print_register(NULL, 0, "SIMODE0", 0x10, regvalue, cur_col, wrap)
199 #define CLRSTCNT 0x10
216 #define ATNO 0x10
225 #define ATNI 0x10
237 #define SINGLE_EDGE 0x10
252 #define BUSFREEREV 0x10
265 #define CLRSELINGO 0x10
274 #define SELINGO 0x10
294 #define PHASEMIS 0x10
304 #define EXP_ACTIVE 0x10
[all …]
H A Daic79xx_reg.h_shipped375 #define PCIINT 0x10
392 #define STATUS_OVERRUN 0x10
414 #define CLRPCIINT 0x10
424 #define CLRDPARERR 0x10
433 #define DPARERR 0x10
441 #define SWINT 0x10
457 #define SEQ_SWTMRTO 0x10
464 #define CLRSEQ_SWTMRTO 0x10
472 #define SNSCB_QOFF 0x10
482 #define HS_MAILBOX_ACT 0x10
[all …]
H A Daic7xxx_seq.h_shipped15 0x08, 0x1f, 0x3e, 0x10,
18 0x08, 0x1f, 0x3e, 0x10,
66 0x10, 0x03, 0x4e, 0x79,
74 0x10, 0x03, 0x9e, 0x78,
82 0x10, 0x03, 0x4e, 0x79,
90 0x10, 0x3c, 0x78, 0x00,
92 0x10, 0x03, 0x3e, 0x69,
150 0x10, 0xb8, 0x20, 0x79,
153 0x10, 0x03, 0x3c, 0x69,
210 0x40, 0xaa, 0x7e, 0x10,
[all …]
/linux/Documentation/devicetree/bindings/
H A Dresource-names.txt31 reg = <0 0x10 0x10>, <0 0x20 0x10>,
32 <1 0x10 0x10>, <1 0x20 0x10>;
41 reg = <0 0x40 0x10>, <1 0x40 0x10>;
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-cpu-opp.dtsi146 <0x10 0x0080>, <0x02 0x0100>,
148 <0x10 0x0100>;
163 <0x10 0x0080>, <0x08 0x0100>,
164 <0x10 0x0100>, <0x01 0x0400>;
217 <0x08 0x0080>, <0x10 0x0080>,
219 <0x10 0x0100>;
257 <0x08 0x0080>, <0x10 0x0080>,
259 <0x10 0x0100>;
286 <0x10 0x0080>, <0x08 0x0100>,
287 <0x10 0x0100>;
[all …]
/linux/tools/testing/selftests/arm64/fp/
H A Dfp-pidbench.S16 mov x10, x20
22 sub x10, x10, #1
23 cbnz x10, 1b
/linux/arch/mips/boot/dts/mti/
H A Dsead3.dts115 offset = <0x10>;
121 offset = <0x10>;
127 offset = <0x10>;
133 offset = <0x10>;
139 offset = <0x10>;
140 mask = <0x10>;
145 offset = <0x10>;
151 offset = <0x10>;
157 offset = <0x10>;
189 mask = <0x10>;
/linux/arch/arm64/kernel/
H A Dhibernate-asm.S63 1: ldr x10, [x19, #HIBERN_PBE_ORIG]
64 mov x0, x10
69 add x1, x10, #PAGE_SIZE
73 bic x4, x10, x3
/linux/drivers/net/wan/
H A Dwanxlfw.inc_shipped4 0x10,0x14,0x42,0x80,0x4A,0xB0,0x09,0xB0,0x00,0x00,0x10,0x04,0x67,0x00,0x00,0x0E,
5 0x06,0xB0,0x40,0x00,0x00,0x00,0x09,0xB0,0x00,0x00,0x10,0x04,0x58,0x80,0x0C,0x80,
6 0x00,0x00,0x00,0x10,0x66,0x00,0xFF,0xDE,0x21,0xFC,0x00,0x00,0x16,0xBC,0x00,0x6C,
11 0x10,0x26,0x33,0xFC,0x01,0x10,0xFF,0xFC,0x10,0x2A,0x23,0xFC,0x00,0xD4,0x9F,0x40,
14 0x01,0x10,0x23,0xFC,0x00,0x00,0x00,0x08,0xFF,0xF9,0x01,0x24,0x23,0xFC,0x00,0x00,
24 0x00,0x00,0x00,0x10,0x66,0x00,0xFF,0xBC,0x23,0xC6,0xFF,0xF9,0x00,0xE4,0x60,0x00,
25 0xFF,0x92,0x20,0x70,0x09,0xB0,0x00,0x00,0x10,0x04,0x4A,0xA8,0x00,0x00,0x66,0x00,
32 0x10,0x00,0x09,0xB0,0x00,0x00,0x19,0xAA,0x61,0x00,0x05,0x76,0x22,0x30,0x09,0xB0,
34 0x18,0x00,0x00,0x00,0x0C,0xA8,0x00,0x00,0x00,0x01,0x00,0x10,0x67,0x00,0x00,0x06,
39 0x09,0xB0,0x00,0x00,0x18,0x52,0x25,0x7C,0x00,0x00,0xFF,0xFF,0x00,0x10,0x25,0x7C,
[all …]
/linux/Documentation/i2c/
H A Di2c-address-translators.rst40 Slave X @ 0x10
46 Slave Y @ 0x10
62 X (bus B, 0x10) 0x20
63 Y (bus C, 0x10) 0x30
68 - Slave X driver requests a transaction (on adapter B), slave address 0x10
73 propagates transaction on bus B with address translated to 0x10,
76 address 0x10 and replies normally
79 - ATR driver receives the reply, rewrites messages with address 0x10
81 - Slave X driver gets back the msgs[], with reply and address 0x10
/linux/arch/mips/boot/dts/cavium-octeon/
H A Docteon_3xxx.dts23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
35 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
42 marvell,reg-init = <3 0x10 0 0x5777>,
50 marvell,reg-init = <3 0x10 0 0x5777>,
58 marvell,reg-init = <3 0x10 0 0x5777>,
66 marvell,reg-init = <3 0x10 0 0x5777>,
75 marvell,reg-init = <3 0x10 0 0x5777>,
83 marvell,reg-init = <3 0x10 0 0x5777>,
91 marvell,reg-init = <3 0x10 0 0x5777>,
99 marvell,reg-init = <3 0x10 0 0x5777>,
[all …]
H A Dubnt_e100.dts34 tx-delay = <0x10>;
39 tx-delay = <0x10>;
44 tx-delay = <0x10>;

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