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Searched refs:writeb (Results 1 – 25 of 306) sorted by relevance

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/linux/drivers/media/cec/platform/s5p/
H A Dexynos_hdmi_cecctrl.c44 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_3); in s5p_cec_set_divider()
45 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_2); in s5p_cec_set_divider()
46 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_1); in s5p_cec_set_divider()
47 writeb(div_val, cec->reg + S5P_CEC_DIVISOR_0); in s5p_cec_set_divider()
56 writeb(reg, cec->reg + S5P_CEC_RX_CTRL); in s5p_cec_enable_rx()
66 writeb(reg, cec->reg + S5P_CEC_IRQ_MASK); in s5p_cec_mask_rx_interrupts()
76 writeb(reg, cec->reg + S5P_CEC_IRQ_MASK); in s5p_cec_unmask_rx_interrupts()
86 writeb(reg, cec->reg + S5P_CEC_IRQ_MASK); in s5p_cec_mask_tx_interrupts()
96 writeb(reg, cec->reg + S5P_CEC_IRQ_MASK); in s5p_cec_unmask_tx_interrupts()
103 writeb(S5P_CEC_RX_CTRL_RESET, cec->reg + S5P_CEC_RX_CTRL); in s5p_cec_reset()
[all …]
/linux/arch/mips/sni/
H A Drm200.c167 writeb(cached_slave_mask, rm200_pic_slave + PIC_IMR); in sni_rm200_disable_8259A_irq()
169 writeb(cached_master_mask, rm200_pic_master + PIC_IMR); in sni_rm200_disable_8259A_irq()
182 writeb(cached_slave_mask, rm200_pic_slave + PIC_IMR); in sni_rm200_enable_8259A_irq()
184 writeb(cached_master_mask, rm200_pic_master + PIC_IMR); in sni_rm200_enable_8259A_irq()
194 writeb(0x0B, rm200_pic_master + PIC_CMD); in sni_rm200_i8259A_irq_real()
196 writeb(0x0A, rm200_pic_master + PIC_CMD); in sni_rm200_i8259A_irq_real()
199 writeb(0x0B, rm200_pic_slave + PIC_CMD); /* ISR register */ in sni_rm200_i8259A_irq_real()
201 writeb(0x0A, rm200_pic_slave + PIC_CMD); in sni_rm200_i8259A_irq_real()
240 writeb(cached_slave_mask, rm200_pic_slave + PIC_IMR); in sni_rm200_mask_and_ack_8259A()
241 writeb(0x60+(irq & 7), rm200_pic_slave + PIC_CMD); in sni_rm200_mask_and_ack_8259A()
[all …]
/linux/drivers/tty/serial/
H A Dmcf.c91 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP1); in mcf_set_mctrl()
93 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP0); in mcf_set_mctrl()
104 writeb(MCFUART_UCR_TXENABLE, port->membase + MCFUART_UCR); in mcf_start_tx()
106 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP1); in mcf_start_tx()
109 writeb(pp->imr, port->membase + MCFUART_UIMR); in mcf_start_tx()
119 writeb(pp->imr, port->membase + MCFUART_UIMR); in mcf_stop_tx()
129 writeb(pp->imr, port->membase + MCFUART_UIMR); in mcf_stop_rx()
140 writeb(MCFUART_UCR_CMDBREAKSTART, port->membase + MCFUART_UCR); in mcf_break_ctl()
142 writeb(MCFUART_UCR_CMDBREAKSTOP, port->membase + MCFUART_UCR); in mcf_break_ctl()
156 writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR); in mcf_startup()
[all …]
H A Dsunsab.c136 writeb(SAB82532_CMDR_RFRD, &up->regs->w.cmdr); in receive_chars()
150 writeb(SAB82532_CMDR_RMC, &up->regs->w.cmdr); in receive_chars()
240 writeb(up->interrupt_mask1, &up->regs->w.imr1); in transmit_chars()
257 writeb(up->interrupt_mask1, &up->regs->w.imr1); in transmit_chars()
262 writeb(up->interrupt_mask1, &up->regs->w.imr1); in transmit_chars()
273 writeb(ch, &up->regs->w.xfifo[i]); in transmit_chars()
278 writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr); in transmit_chars()
412 writeb(up->interrupt_mask1, &up->regs->w.imr1); in sunsab_stop_tx()
422 writeb(up->cached_mode, &up->regs->rw.mode); in sunsab_tx_idle()
423 writeb(up->cached_pvr, &up->regs->rw.pvr); in sunsab_tx_idle()
[all …]
H A Dmilbeaut_usio.c69 writeb(readb(port->membase + MLB_USIO_REG_SCR) & ~MLB_USIO_SCR_TBIE, in mlb_usio_stop_tx()
80 writeb(readb(port->membase + MLB_USIO_REG_SCR) & in mlb_usio_tx_chars()
111 writeb(readb(port->membase + MLB_USIO_REG_SCR) | MLB_USIO_SCR_TBIE, in mlb_usio_tx_chars()
129 writeb(readb(port->membase + MLB_USIO_REG_SCR) | MLB_USIO_SCR_TBIE, in mlb_usio_start_tx()
138 writeb(readb(port->membase + MLB_USIO_REG_SCR) & ~MLB_USIO_SCR_RIE, in mlb_usio_stop_rx()
144 writeb(readb(port->membase + MLB_USIO_REG_SCR) | in mlb_usio_enable_ms()
194 writeb(readb(port->membase + MLB_USIO_REG_SSR) | in mlb_usio_rx_chars()
272 writeb(0, port->membase + MLB_USIO_REG_SCR); in mlb_usio_startup()
273 writeb(escr, port->membase + MLB_USIO_REG_ESCR); in mlb_usio_startup()
274 writeb(MLB_USIO_SCR_UPCL, port->membase + MLB_USIO_REG_SCR); in mlb_usio_startup()
[all …]
/linux/drivers/scsi/
H A Dmac53c94.c113 writeb(CMD_SCSI_RESET, &regs->command); /* assert RST */ in DEF_SCSI_QCMD()
115 writeb(CMD_RESET, &regs->command); in DEF_SCSI_QCMD()
118 writeb(CMD_NOP, &regs->command); in DEF_SCSI_QCMD()
129 writeb(state->host->this_id | CF1_PAR_ENABLE, &regs->config1); in mac53c94_init()
130 writeb(TIMO_VAL(250), &regs->sel_timeout); /* 250ms */ in mac53c94_init()
131 writeb(CLKF_VAL(state->clk_freq), &regs->clk_factor); in mac53c94_init()
132 writeb(CF2_FEATURE_EN, &regs->config2); in mac53c94_init()
133 writeb(0, &regs->config3); in mac53c94_init()
134 writeb(0, &regs->sync_period); in mac53c94_init()
135 writeb(0, &regs->sync_offset); in mac53c94_init()
[all …]
/linux/drivers/rtc/
H A Drtc-stk17ta8.c79 writeb(flags | RTC_WRITE, pdata->ioaddr + RTC_FLAGS); in stk17ta8_rtc_set_time()
81 writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR); in stk17ta8_rtc_set_time()
82 writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH); in stk17ta8_rtc_set_time()
83 writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY); in stk17ta8_rtc_set_time()
84 writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE); in stk17ta8_rtc_set_time()
85 writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS); in stk17ta8_rtc_set_time()
86 writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES); in stk17ta8_rtc_set_time()
87 writeb(bin2bcd(tm->tm_sec) & RTC_SECONDS_MASK, ioaddr + RTC_SECONDS); in stk17ta8_rtc_set_time()
88 writeb(bin2bcd((tm->tm_year + 1900) / 100), ioaddr + RTC_CENTURY); in stk17ta8_rtc_set_time()
90 writeb(flags & ~RTC_WRITE, pdata->ioaddr + RTC_FLAGS); in stk17ta8_rtc_set_time()
[all …]
H A Drtc-ds1553.c79 writeb(RTC_WRITE, pdata->ioaddr + RTC_CONTROL); in ds1553_rtc_set_time()
81 writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR); in ds1553_rtc_set_time()
82 writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH); in ds1553_rtc_set_time()
83 writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY); in ds1553_rtc_set_time()
84 writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE); in ds1553_rtc_set_time()
85 writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS); in ds1553_rtc_set_time()
86 writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES); in ds1553_rtc_set_time()
87 writeb(bin2bcd(tm->tm_sec) & RTC_SECONDS_MASK, ioaddr + RTC_SECONDS); in ds1553_rtc_set_time()
90 writeb(RTC_WRITE | (century & RTC_CENTURY_MASK), ioaddr + RTC_CENTURY); in ds1553_rtc_set_time()
91 writeb(century & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL); in ds1553_rtc_set_time()
[all …]
H A Drtc-ds1742.c63 writeb(RTC_WRITE, ioaddr + RTC_CONTROL); in ds1742_rtc_set_time()
65 writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR); in ds1742_rtc_set_time()
66 writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH); in ds1742_rtc_set_time()
67 writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY); in ds1742_rtc_set_time()
68 writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE); in ds1742_rtc_set_time()
69 writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS); in ds1742_rtc_set_time()
70 writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES); in ds1742_rtc_set_time()
71 writeb(bin2bcd(tm->tm_sec) & RTC_SECONDS_MASK, ioaddr + RTC_SECONDS); in ds1742_rtc_set_time()
74 writeb(RTC_WRITE | (century & RTC_CENTURY_MASK), ioaddr + RTC_CENTURY); in ds1742_rtc_set_time()
75 writeb(century & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL); in ds1742_rtc_set_time()
[all …]
H A Drtc-m48t35.c68 writeb(control | M48T35_RTC_READ, &priv->reg->control); in m48t35_read_time()
75 writeb(control, &priv->reg->control); in m48t35_read_time()
133 writeb(control | M48T35_RTC_SET, &priv->reg->control); in m48t35_set_time()
134 writeb(yrs, &priv->reg->year); in m48t35_set_time()
135 writeb(mon, &priv->reg->month); in m48t35_set_time()
136 writeb(day, &priv->reg->date); in m48t35_set_time()
137 writeb(hrs, &priv->reg->hour); in m48t35_set_time()
138 writeb(min, &priv->reg->min); in m48t35_set_time()
139 writeb(sec, &priv->reg->sec); in m48t35_set_time()
140 writeb(control, &priv->reg->control); in m48t35_set_time()
H A Drtc-renesas-rtca3.c143 writeb(tmp, priv->base + off); in rtca3_byte_update_bits()
152 writeb(val & ~pending, priv->base + RTCA3_RSR); in rtca3_alarm_handler_helper()
183 writeb(val & ~pending, priv->base + RTCA3_RSR); in rtca3_periodic_handler()
299 writeb(rcr2 & ~RTCA3_RCR2_START, priv->base + RTCA3_RCR2); in rtca3_set_time()
307 writeb(bin2bcd(tm->tm_sec), priv->base + RTCA3_RSECCNT); in rtca3_set_time()
308 writeb(bin2bcd(tm->tm_min), priv->base + RTCA3_RMINCNT); in rtca3_set_time()
309 writeb(bin2bcd(tm->tm_hour), priv->base + RTCA3_RHRCNT); in rtca3_set_time()
310 writeb(bin2bcd(tm->tm_wday), priv->base + RTCA3_RWKCNT); in rtca3_set_time()
311 writeb(bin2bcd(tm->tm_mday), priv->base + RTCA3_RDAYCNT); in rtca3_set_time()
312 writeb(bin2bcd(tm->tm_mon + 1), priv->base + RTCA3_RMONCNT); in rtca3_set_time()
[all …]
H A Drtc-sh.c106 writeb(tmp, rtc->regbase + RCR1); in sh_rtc_alarm()
130 writeb(tmp, rtc->regbase + RCR1); in sh_rtc_alarm_irq_enable()
153 writeb(tmp, rtc->regbase + RCR1); in sh_rtc_read_time()
205 writeb(tmp, rtc->regbase + RCR2); in sh_rtc_set_time()
207 writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT); in sh_rtc_set_time()
208 writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT); in sh_rtc_set_time()
209 writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT); in sh_rtc_set_time()
210 writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT); in sh_rtc_set_time()
211 writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT); in sh_rtc_set_time()
212 writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT); in sh_rtc_set_time()
[all …]
H A Drtc-s3c.c112 writeb(tmp, info->base + S3C2410_RTCALM); in s3c_rtc_setaie()
178 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC); in s3c_rtc_write_time()
179 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN); in s3c_rtc_write_time()
180 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR); in s3c_rtc_write_time()
181 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE); in s3c_rtc_write_time()
182 writeb(bin2bcd(tm->tm_mon), info->base + S3C2410_RTCMON); in s3c_rtc_write_time()
183 writeb(bin2bcd(tm->tm_year), info->base + S3C2410_RTCYEAR); in s3c_rtc_write_time()
288 writeb(0x00, info->base + S3C2410_RTCALM); in s3c_rtc_setalarm()
292 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC); in s3c_rtc_setalarm()
297 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN); in s3c_rtc_setalarm()
[all …]
/linux/drivers/sbus/char/
H A Dbbc_i2c.c159 writeb(client->bus, bp->i2c_bussel_reg); in bbc_i2c_writeb()
161 writeb(address, bp->i2c_control_regs + 0x1); in bbc_i2c_writeb()
162 writeb(I2C_PCF_START, bp->i2c_control_regs + 0x0); in bbc_i2c_writeb()
166 writeb(off, bp->i2c_control_regs + 0x1); in bbc_i2c_writeb()
171 writeb(val, bp->i2c_control_regs + 0x1); in bbc_i2c_writeb()
178 writeb(I2C_PCF_STOP, bp->i2c_control_regs + 0x0); in bbc_i2c_writeb()
189 writeb(client->bus, bp->i2c_bussel_reg); in bbc_i2c_readb()
191 writeb(address, bp->i2c_control_regs + 0x1); in bbc_i2c_readb()
192 writeb(I2C_PCF_START, bp->i2c_control_regs + 0x0); in bbc_i2c_readb()
196 writeb(off, bp->i2c_control_regs + 0x1); in bbc_i2c_readb()
[all …]
/linux/drivers/net/ethernet/8390/
H A Detherh.c52 #define ei_outb(_v,_p) writeb(_v,(void __iomem *)_p)
54 #define ei_outb_p(_v,_p) writeb(_v,(void __iomem *)_p)
123 writeb(ctrl, eh->ctrl_port); in etherh_set_ctrl()
130 writeb(ctrl, eh->ctrl_port); in etherh_clr_ctrl()
180 writeb((readb(addr) & 0xf8) | 1, addr); in etherh_setif()
183 writeb((readb(addr) & 0xf8), addr); in etherh_setif()
282 writeb(E8390_NODMA+E8390_PAGE0+E8390_STOP, addr); in etherh_reset()
330 writeb (E8390_NODMA | E8390_PAGE0 | E8390_START, addr + E8390_CMD); in etherh_block_output()
332 writeb (0x42, addr + EN0_RCNTLO); in etherh_block_output()
333 writeb (0x00, addr + EN0_RCNTHI); in etherh_block_output()
[all …]
/linux/drivers/i2c/busses/
H A Di2c-gxp.c162 writeb(slave->addr << 1, drvdata->base + GXP_I2COWNADR); in gxp_i2c_reg_slave()
163 writeb(SLAVE_EVT_CLR | SNOOP_EVT_MASK | SLAVE_ACK_ENAB | in gxp_i2c_reg_slave()
175 writeb(0x00, drvdata->base + GXP_I2COWNADR); in gxp_i2c_unreg_slave()
176 writeb(SNOOP_EVT_CLR | SLAVE_EVT_CLR | SNOOP_EVT_MASK | in gxp_i2c_unreg_slave()
197 writeb(MASTER_EVT_CLR | STOP_CMD, drvdata->base + GXP_I2CMCMD); in gxp_i2c_stop()
249 writeb(MASTER_EVT_CLR | RW_CMD, in gxp_i2c_chk_addr_ack()
253 writeb(MASTER_EVT_CLR | MASTER_ACK_ENAB | in gxp_i2c_chk_addr_ack()
306 writeb(MASTER_EVT_CLR | RW_CMD, in gxp_i2c_ack_data()
310 writeb(MASTER_EVT_CLR | MASTER_ACK_ENAB | in gxp_i2c_ack_data()
371 writeb(SLAVE_EVT_CLR | SNOOP_EVT_MASK | in gxp_i2c_slave_irq_handler()
[all …]
H A Di2c-mchp-pci1xxxx.c382 writeb(regval, p); in pci1xxxx_i2c_configure_smbalert_pin()
397 writeb(regval, p); in pci1xxxx_i2c_send_start_stop()
414 writeb(regval, i2c->i2c_base + SMB_CORE_CTRL_REG_OFF); in pci1xxxx_i2c_set_clear_FW_ACK()
423 writeb(slaveaddr, p++); in pci1xxxx_i2c_buffer_write()
436 writeb(SMB_CORE_CTRL_ESO, i2c->i2c_base + SMB_CORE_CTRL_REG_OFF); in pci1xxxx_i2c_enable_ESO()
446 writeb(regval, p); in pci1xxxx_i2c_reset_counters()
460 writeb(regval, p); in pci1xxxx_i2c_set_transfer_dir()
465 writeb(count, i2c->i2c_base + SMBUS_MCU_COUNTER_REG_OFF); in pci1xxxx_i2c_set_mcu_count()
470 writeb(readcount, i2c->i2c_base + SMB_CORE_CMD_REG_OFF3); in pci1xxxx_i2c_set_read_count()
475 writeb(writecount, i2c->i2c_base + SMB_CORE_CMD_REG_OFF2); in pci1xxxx_i2c_set_write_count()
[all …]
H A Di2c-synquacer.c184 writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_stop()
204 writeb(0, i2c->base + SYNQUACER_I2C_REG_ADR); in synquacer_i2c_hw_init()
207 writeb(SYNQUACER_I2C_BUS_CLK_FR(i2c->pclkrate), in synquacer_i2c_hw_init()
221 writeb(ccr_cs | SYNQUACER_I2C_CCR_FM | in synquacer_i2c_hw_init()
224 writeb(csr_cs, i2c->base + SYNQUACER_I2C_REG_CSR); in synquacer_i2c_hw_init()
236 writeb(ccr_cs | SYNQUACER_I2C_CCR_EN, in synquacer_i2c_hw_init()
238 writeb(csr_cs, i2c->base + SYNQUACER_I2C_REG_CSR); in synquacer_i2c_hw_init()
245 writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_hw_init()
246 writeb(0, i2c->base + SYNQUACER_I2C_REG_BC2R); in synquacer_i2c_hw_init()
252 writeb(0, i2c->base + SYNQUACER_I2C_REG_CCR); in synquacer_i2c_hw_reset()
[all …]
H A Di2c-ls2x.c84 writeb(LS2X_CR_IACK, priv->base + I2C_LS2X_CR); in ls2x_i2c_isr()
116 writeb(FIELD_GET(GENMASK(7, 0), val), priv->base + I2C_LS2X_PRER_LO); in ls2x_i2c_adjust_bus_speed()
117 writeb(FIELD_GET(GENMASK(15, 8), val), priv->base + I2C_LS2X_PRER_HI); in ls2x_i2c_adjust_bus_speed()
123 writeb(readb(priv->base + I2C_LS2X_CTR) & ~CTR_FREQ_MASK, in ls2x_i2c_init()
129 writeb(readb(priv->base + I2C_LS2X_CTR) | CTR_READY_MASK, in ls2x_i2c_init()
138 writeb(txdata, priv->base + I2C_LS2X_CR); in ls2x_i2c_xfer_byte()
174 writeb(LS2X_CR_STOP, priv->base + I2C_LS2X_CR); in ls2x_i2c_stop()
184 writeb(i2c_8bit_addr_from_msg(msgs), priv->base + I2C_LS2X_TXR); in ls2x_i2c_start()
224 writeb(*buf++, priv->base + I2C_LS2X_TXR); in ls2x_i2c_tx()
336 writeb(readb(priv->base + I2C_LS2X_CTR) & ~LS2X_CTR_IEN, in ls2x_i2c_suspend()
H A Di2c-emev2.c76 writeb((readb(priv->base + reg) & ~clear) | set, priv->base + reg); in em_clear_set_bit()
112 writeb(0, priv->base + I2C_OFS_IICACT0); in em_i2c_reset()
121 writeb(I2C_BIT_DFC0, priv->base + I2C_OFS_IICCL0); in em_i2c_reset()
124 writeb(I2C_BIT_STCEN | I2C_BIT_IICRSV, priv->base + I2C_OFS_IICF0); in em_i2c_reset()
127 writeb(I2C_BIT_WTIM0, priv->base + I2C_OFS_IICC0); in em_i2c_reset()
130 writeb(I2C_BIT_IICE0, priv->base + I2C_OFS_IICACT0); in em_i2c_reset()
149 writeb(i2c_8bit_addr_from_msg(msg), priv->base + I2C_OFS_IIC0); in __em_i2c_xfer()
188 writeb(msg->buf[count], priv->base + I2C_OFS_IIC0); in __em_i2c_xfer()
270 writeb(value, priv->base + I2C_OFS_IIC0); in em_i2c_slave_irq()
329 writeb(slave->addr << 1, priv->base + I2C_OFS_SVA0); in em_i2c_reg_slave()
[all …]
/linux/drivers/comedi/drivers/
H A Dii_pci20kc.c160 writeb(val & 0xff, iobase + II20K_AO_LSB_REG(chan)); in ii20k_ao_insn_write()
161 writeb((val >> 8) & 0xff, iobase + II20K_AO_MSB_REG(chan)); in ii20k_ao_insn_write()
162 writeb(0x00, iobase + II20K_AO_STRB_REG(chan)); in ii20k_ao_insn_write()
192 writeb(II20K_AI_CONF_ENA, iobase + II20K_AI_CONF_REG); in ii20k_ai_setup()
195 writeb(0, iobase + II20K_AI_STATUS_CMD_REG); in ii20k_ai_setup()
199 writeb(val, iobase + II20K_AI_OPT_REG); in ii20k_ai_setup()
203 writeb(val, iobase + II20K_AI_SET_TIME_REG); in ii20k_ai_setup()
206 writeb(1, iobase + II20K_AI_LAST_CHAN_ADDR_REG); in ii20k_ai_setup()
213 writeb(val, iobase + II20K_AI_CHANLIST_REG); in ii20k_ai_setup()
216 writeb(0, iobase + II20K_AI_COUNT_RESET_REG); in ii20k_ai_setup()
[all …]
/linux/drivers/scsi/arm/
H A Dcumana_1.c53 writeb(0x02, base + CTRL); in cumanascsi_pwrite()
78 writeb(0x12, base + CTRL); in cumanascsi_pwrite()
88 writeb(*addr++, dma); in cumanascsi_pwrite()
98 writeb(*addr++, dma); in cumanascsi_pwrite()
104 writeb(hostdata->ctrl | 0x40, base + CTRL); in cumanascsi_pwrite()
120 writeb(0x00, base + CTRL); in cumanascsi_pread()
144 writeb(0x10, base + CTRL); in cumanascsi_pread()
170 writeb(hostdata->ctrl | 0x40, base + CTRL); in cumanascsi_pread()
189 writeb(0, base + CTRL); in cumanascsi_read()
194 writeb(0x40, base + CTRL); in cumanascsi_read()
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-usb-hs-28nm.c88 writeb(val, priv->base + PHY_INTR_CLEAR0); in qcom_snps_hsphy_enable_hv_interrupts()
90 writeb(0x0, priv->base + PHY_IRQ_CMD); in qcom_snps_hsphy_enable_hv_interrupts()
92 writeb(0x1, priv->base + PHY_IRQ_CMD); in qcom_snps_hsphy_enable_hv_interrupts()
114 writeb(val, priv->base + PHY_INTR_MASK0); in qcom_snps_hsphy_enable_hv_interrupts()
123 writeb(val, priv->base + PHY_INTR_MASK0); in qcom_snps_hsphy_disable_hv_interrupts()
128 writeb(val, priv->base + PHY_INTR_CLEAR0); in qcom_snps_hsphy_disable_hv_interrupts()
130 writeb(0x0, priv->base + PHY_IRQ_CMD); in qcom_snps_hsphy_disable_hv_interrupts()
133 writeb(0x1, priv->base + PHY_IRQ_CMD); in qcom_snps_hsphy_disable_hv_interrupts()
143 writeb(val, priv->base + PHY_CTRL_COMMON0); in qcom_snps_hsphy_enter_retention()
152 writeb(val, priv->base + PHY_CTRL_COMMON0); in qcom_snps_hsphy_exit_retention()
[all …]
/linux/drivers/ata/
H A Dpata_imx.c72 writeb(3, priv->host_regs + PATA_IMX_ATA_TIME_OFF); in pata_imx_set_timing()
73 writeb(3, priv->host_regs + PATA_IMX_ATA_TIME_ON); in pata_imx_set_timing()
74 writeb(timing.setup, priv->host_regs + PATA_IMX_ATA_TIME_1); in pata_imx_set_timing()
75 writeb(timing.act8b, priv->host_regs + PATA_IMX_ATA_TIME_2W); in pata_imx_set_timing()
76 writeb(timing.act8b, priv->host_regs + PATA_IMX_ATA_TIME_2R); in pata_imx_set_timing()
77 writeb(1, priv->host_regs + PATA_IMX_ATA_TIME_PIO_RDX); in pata_imx_set_timing()
79 writeb(pio_t4[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_4); in pata_imx_set_timing()
80 writeb(pio_t9[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_9); in pata_imx_set_timing()
81 writeb(pio_tA[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_AX); in pata_imx_set_timing()
/linux/drivers/clocksource/
H A Drenesas-ostm.c49 writeb(TT, timer_of_base(to) + OSTM_TT); in ostm_timer_stop()
66 writeb(CTL_FREERUN, timer_of_base(to) + OSTM_CTL); in ostm_init_clksrc()
67 writeb(TS, timer_of_base(to) + OSTM_TS); in ostm_init_clksrc()
93 writeb(CTL_ONESHOT, timer_of_base(to) + OSTM_CTL); in ostm_clock_event_next()
94 writeb(TS, timer_of_base(to) + OSTM_TS); in ostm_clock_event_next()
115 writeb(CTL_PERIODIC, timer_of_base(to) + OSTM_CTL); in ostm_set_periodic()
116 writeb(TS, timer_of_base(to) + OSTM_TS); in ostm_set_periodic()

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