91 		writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP1);  in mcf_set_mctrl()
93 		writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP0);  in mcf_set_mctrl()
104 		writeb(MCFUART_UCR_TXENABLE, port->membase + MCFUART_UCR);  in mcf_start_tx()
106 		writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP1);  in mcf_start_tx()
109 	writeb(pp->imr, port->membase + MCFUART_UIMR);  in mcf_start_tx()
119 	writeb(pp->imr, port->membase + MCFUART_UIMR);  in mcf_stop_tx()
129 	writeb(pp->imr, port->membase + MCFUART_UIMR);  in mcf_stop_rx()
140 		writeb(MCFUART_UCR_CMDBREAKSTART, port->membase + MCFUART_UCR);  in mcf_break_ctl()
142 		writeb(MCFUART_UCR_CMDBREAKSTOP, port->membase + MCFUART_UCR);  in mcf_break_ctl()
156 	writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);  in mcf_startup()
157 	writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);  in mcf_startup()
160 	writeb(MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE,  in mcf_startup()
165 	writeb(pp->imr, port->membase + MCFUART_UIMR);  in mcf_startup()
183 	writeb(pp->imr, port->membase + MCFUART_UIMR);  in mcf_shutdown()
186 	writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);  in mcf_shutdown()
187 	writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);  in mcf_shutdown()
262 	writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);  in mcf_set_termios()
263 	writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);  in mcf_set_termios()
264 	writeb(MCFUART_UCR_CMDRESETMRPTR, port->membase + MCFUART_UCR);  in mcf_set_termios()
265 	writeb(mr1, port->membase + MCFUART_UMR);  in mcf_set_termios()
266 	writeb(mr2, port->membase + MCFUART_UMR);  in mcf_set_termios()
267 	writeb((baudclk & 0xff00) >> 8, port->membase + MCFUART_UBG1);  in mcf_set_termios()
268 	writeb((baudclk & 0xff), port->membase + MCFUART_UBG2);  in mcf_set_termios()
270 	writeb((baudfr & 0x0f), port->membase + MCFUART_UFPD);  in mcf_set_termios()
272 	writeb(MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER,  in mcf_set_termios()
274 	writeb(MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE,  in mcf_set_termios()
292 			writeb(MCFUART_UCR_CMDRESETERR,  in mcf_rx_chars()
335 		writeb(ch, port->membase + MCFUART_UTB));  in mcf_tx_chars()
339 		writeb(MCFUART_UCR_TXDISABLE, port->membase + MCFUART_UCR);  in mcf_tx_chars()
375 	writeb(0, port->membase + MCFUART_UIMR);  in mcf_config_port()
432 	writeb(mr1, port->membase + MCFUART_UMR);  in mcf_config_rs485()
433 	writeb(mr2, port->membase + MCFUART_UMR);  in mcf_config_rs485()
482 	writeb(c, port->membase + MCFUART_UTB);  in mcf_console_putc()