167 		writeb(cached_slave_mask, rm200_pic_slave + PIC_IMR);  in sni_rm200_disable_8259A_irq()
169 		writeb(cached_master_mask, rm200_pic_master + PIC_IMR);  in sni_rm200_disable_8259A_irq()
182 		writeb(cached_slave_mask, rm200_pic_slave + PIC_IMR);  in sni_rm200_enable_8259A_irq()
184 		writeb(cached_master_mask, rm200_pic_master + PIC_IMR);  in sni_rm200_enable_8259A_irq()
194 		writeb(0x0B, rm200_pic_master + PIC_CMD);  in sni_rm200_i8259A_irq_real()
196 		writeb(0x0A, rm200_pic_master + PIC_CMD);  in sni_rm200_i8259A_irq_real()
199 	writeb(0x0B, rm200_pic_slave + PIC_CMD); /* ISR register */  in sni_rm200_i8259A_irq_real()
201 	writeb(0x0A, rm200_pic_slave + PIC_CMD);  in sni_rm200_i8259A_irq_real()
240 		writeb(cached_slave_mask, rm200_pic_slave + PIC_IMR);  in sni_rm200_mask_and_ack_8259A()
241 		writeb(0x60+(irq & 7), rm200_pic_slave + PIC_CMD);  in sni_rm200_mask_and_ack_8259A()
242 		writeb(0x60+PIC_CASCADE_IR, rm200_pic_master + PIC_CMD);  in sni_rm200_mask_and_ack_8259A()
245 		writeb(cached_master_mask, rm200_pic_master + PIC_IMR);  in sni_rm200_mask_and_ack_8259A()
246 		writeb(0x60+irq, rm200_pic_master + PIC_CMD);  in sni_rm200_mask_and_ack_8259A()
302 	writeb(0x0C, rm200_pic_master + PIC_CMD);	/* prepare for poll */  in sni_rm200_i8259_irq()
309 		writeb(0x0C, rm200_pic_slave + PIC_CMD); /* prepare for poll */  in sni_rm200_i8259_irq()
321 		writeb(0x0B, rm200_pic_master + PIC_ISR); /* ISR register */  in sni_rm200_i8259_irq()
337 	writeb(0xff, rm200_pic_master + PIC_IMR);  in sni_rm200_init_8259A()
338 	writeb(0xff, rm200_pic_slave + PIC_IMR);  in sni_rm200_init_8259A()
340 	writeb(0x11, rm200_pic_master + PIC_CMD);  in sni_rm200_init_8259A()
341 	writeb(0, rm200_pic_master + PIC_IMR);  in sni_rm200_init_8259A()
342 	writeb(1U << PIC_CASCADE_IR, rm200_pic_master + PIC_IMR);  in sni_rm200_init_8259A()
343 	writeb(MASTER_ICW4_DEFAULT, rm200_pic_master + PIC_IMR);  in sni_rm200_init_8259A()
344 	writeb(0x11, rm200_pic_slave + PIC_CMD);  in sni_rm200_init_8259A()
345 	writeb(8, rm200_pic_slave + PIC_IMR);  in sni_rm200_init_8259A()
346 	writeb(PIC_CASCADE_IR, rm200_pic_slave + PIC_IMR);  in sni_rm200_init_8259A()
347 	writeb(SLAVE_ICW4_DEFAULT, rm200_pic_slave + PIC_IMR);  in sni_rm200_init_8259A()
350 	writeb(cached_master_mask, rm200_pic_master + PIC_IMR);  in sni_rm200_init_8259A()
351 	writeb(cached_slave_mask, rm200_pic_slave + PIC_IMR);  in sni_rm200_init_8259A()