113 	writeb(CMD_SCSI_RESET, &regs->command);	/* assert RST */  in DEF_SCSI_QCMD()
115 	writeb(CMD_RESET, &regs->command);  in DEF_SCSI_QCMD()
118 	writeb(CMD_NOP, &regs->command);  in DEF_SCSI_QCMD()
129 	writeb(state->host->this_id | CF1_PAR_ENABLE, &regs->config1);  in mac53c94_init()
130 	writeb(TIMO_VAL(250), &regs->sel_timeout);	/* 250ms */  in mac53c94_init()
131 	writeb(CLKF_VAL(state->clk_freq), &regs->clk_factor);  in mac53c94_init()
132 	writeb(CF2_FEATURE_EN, &regs->config2);  in mac53c94_init()
133 	writeb(0, &regs->config3);  in mac53c94_init()
134 	writeb(0, &regs->sync_period);  in mac53c94_init()
135 	writeb(0, &regs->sync_offset);  in mac53c94_init()
158 	writeb(0, &regs->count_lo);  in mac53c94_start()
159 	writeb(0, &regs->count_mid);  in mac53c94_start()
160 	writeb(0, &regs->count_hi);  in mac53c94_start()
161 	writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);  in mac53c94_start()
163 	writeb(CMD_FLUSH, &regs->command);  in mac53c94_start()
165 	writeb(cmd->device->id, &regs->dest_id);  in mac53c94_start()
166 	writeb(0, &regs->sync_period);  in mac53c94_start()
167 	writeb(0, &regs->sync_offset);  in mac53c94_start()
171 		writeb(cmd->cmnd[i], &regs->fifo);  in mac53c94_start()
174 	writeb(CMD_SELECT, &regs->command);  in mac53c94_start()
217 		writeb(CMD_NOP, &regs->command);  in mac53c94_interrupt()
235 		writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);  in mac53c94_interrupt()
263 		writeb(CMD_NOP, &regs->command);  in mac53c94_interrupt()
271 			writeb(nb, &regs->count_lo);  in mac53c94_interrupt()
272 			writeb(nb >> 8, &regs->count_mid);  in mac53c94_interrupt()
273 			writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);  in mac53c94_interrupt()
276 			writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);  in mac53c94_interrupt()
281 			writeb(CMD_I_COMPLETE, &regs->command);  in mac53c94_interrupt()
304 			writeb(nb, &regs->count_lo);  in mac53c94_interrupt()
305 			writeb(nb >> 8, &regs->count_mid);  in mac53c94_interrupt()
306 			writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);  in mac53c94_interrupt()
307 			writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);  in mac53c94_interrupt()
316 		writeb(CMD_I_COMPLETE, &regs->command);  in mac53c94_interrupt()
327 		writeb(CMD_ACCEPT_MSG, &regs->command);  in mac53c94_interrupt()