Searched refs:ucode_array_offset_bytes (Results 1 – 21 of 21) sorted by relevance
165 uint32_t ucode_array_offset_bytes; /* payload offset from the start of the header */ member
42 le32_to_cpu(hdr->ucode_array_offset_bytes)); in radeon_ucode_print_common_hdr()
206 (rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in ci_load_smc_ucode()
231 (rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in si_load_smc_ucode()
481 (rdev->sdma_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in cik_sdma_load_microcode()490 (rdev->sdma_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in cik_sdma_load_microcode()
99 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in imu_v12_0_load_microcode()110 le32_to_cpu(hdr->header.ucode_array_offset_bytes) + in imu_v12_0_load_microcode()
382 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in amdgpu_cgs_get_firmware_info()
3509 le32_to_cpu(asd_hdr->header.ucode_array_offset_bytes); in psp_init_asd_microcode()3532 le32_to_cpu(toc_hdr->header.ucode_array_offset_bytes); in psp_init_toc_microcode()3550 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in parse_sos_bin_descriptor()3641 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in psp_init_sos_base_fw()3703 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in psp_init_sos_microcode()3833 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_bin_descriptor()3900 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_v1_microcode()3916 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_v1_microcode()
175 ucode_offset[0] = le32_to_cpu(vpe_hdr->header.ucode_array_offset_bytes); in vpe_v6_1_load_microcode()
307 (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gmc_v8_0_tonga_mc_load_microcode()376 (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gmc_v8_0_polaris_mc_load_microcode()
692 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in sdma_v6_0_load_microcode()726 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in sdma_v6_0_load_microcode()
197 (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gmc_v7_0_mc_load_microcode()
581 le32_to_cpu(toc_hdr->header.ucode_array_offset_bytes); in gfx_v12_0_init_toc_microcode()1218 le32_to_cpu(rlc_hdr->header.ucode_array_offset_bytes)); in gfx_v12_0_rlc_backdoor_autoload_copy_gfx_ucode()1986 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gfx_v12_0_load_rlcg_microcode()
2537 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in amdgpu_device_parse_gpu_info_fw()2566 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in amdgpu_device_parse_gpu_info_fw()2581 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in amdgpu_device_parse_gpu_info_fw()
903 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in sdma_v5_0_load_microcode()
750 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in sdma_v5_2_load_microcode()
121 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in smu_v15_0_load_microcode()
131 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in smu_v14_0_load_microcode()
152 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in smu_v11_0_load_microcode()
157 le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in smu_v13_0_load_microcode()
1298 le32_to_cpu(hdr->header.ucode_array_offset_bytes) + in dm_dmub_hw_init()1302 le32_to_cpu(hdr->header.ucode_array_offset_bytes) + in dm_dmub_hw_init()2555 le32_to_cpu(hdr->header.ucode_array_offset_bytes) + in dm_dmub_sw_init()2558 le32_to_cpu(hdr->header.ucode_array_offset_bytes) + in dm_dmub_sw_init()