| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/ |
| H A D | dml2_top_soc15.c | 149 l->uclk_pstate.init_params.instance = ¶ms->dml->pmo_instance; in dml2_top_optimization_init_function_uclk_pstate() 150 l->uclk_pstate.init_params.base_display_config = params->display_config; in dml2_top_optimization_init_function_uclk_pstate() 152 return params->dml->pmo_instance.init_for_uclk_pstate(&l->uclk_pstate.init_params); in dml2_top_optimization_init_function_uclk_pstate() 159 l->uclk_pstate.test_params.instance = ¶ms->dml->pmo_instance; in dml2_top_optimization_test_function_uclk_pstate() 160 l->uclk_pstate.test_params.base_display_config = params->display_config; in dml2_top_optimization_test_function_uclk_pstate() 162 return params->dml->pmo_instance.test_for_uclk_pstate(&l->uclk_pstate.test_params); in dml2_top_optimization_test_function_uclk_pstate() 169 l->uclk_pstate.optimize_params.instance = ¶ms->dml->pmo_instance; in dml2_top_optimization_optimize_function_uclk_pstate() 170 l->uclk_pstate.optimize_params.base_display_config = params->display_config; in dml2_top_optimization_optimize_function_uclk_pstate() 171 l->uclk_pstate.optimize_params.optimized_display_config = params->optimized_display_config; in dml2_top_optimization_optimize_function_uclk_pstate() 172 l->uclk_pstate in dml2_top_optimization_optimize_function_uclk_pstate() [all...] |
| /linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_6_ppt.c | 1219 pstate_table->uclk_pstate.min = SMU_DPM_TABLE_MIN(mem_table); in smu_v13_0_6_populate_umd_state_clk() 1220 pstate_table->uclk_pstate.peak = SMU_DPM_TABLE_MAX(mem_table); in smu_v13_0_6_populate_umd_state_clk() 1221 pstate_table->uclk_pstate.curr.min = SMU_DPM_TABLE_MIN(mem_table); in smu_v13_0_6_populate_umd_state_clk() 1222 pstate_table->uclk_pstate.curr.max = SMU_DPM_TABLE_MAX(mem_table); in smu_v13_0_6_populate_umd_state_clk() 1240 pstate_table->uclk_pstate.standard = in smu_v13_0_6_populate_umd_state_clk() 1247 pstate_table->uclk_pstate.standard = in smu_v13_0_6_populate_umd_state_clk() 1248 pstate_table->uclk_pstate.min; in smu_v13_0_6_populate_umd_state_clk() 1417 pstate_table->uclk_pstate.curr.min, in smu_v13_0_6_emit_clk_levels() 1418 pstate_table->uclk_pstate.curr.max); in smu_v13_0_6_emit_clk_levels() 2034 pstate_table->uclk_pstate in smu_v13_0_6_set_performance_level() [all...] |
| H A D | aldebaran_ppt.c | 598 pstate_table->uclk_pstate.min = SMU_DPM_TABLE_MIN(mem_table); in aldebaran_populate_umd_state_clk() 599 pstate_table->uclk_pstate.peak = SMU_DPM_TABLE_MAX(mem_table); in aldebaran_populate_umd_state_clk() 600 pstate_table->uclk_pstate.curr.min = SMU_DPM_TABLE_MIN(mem_table); in aldebaran_populate_umd_state_clk() 601 pstate_table->uclk_pstate.curr.max = SMU_DPM_TABLE_MAX(mem_table); in aldebaran_populate_umd_state_clk() 613 pstate_table->uclk_pstate.standard = in aldebaran_populate_umd_state_clk() 620 pstate_table->uclk_pstate.standard = in aldebaran_populate_umd_state_clk() 621 pstate_table->uclk_pstate.min; in aldebaran_populate_umd_state_clk() 818 pstate_table->uclk_pstate.curr.min, in aldebaran_emit_clk_levels() 819 pstate_table->uclk_pstate.curr.max); in aldebaran_emit_clk_levels()
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| H A D | smu_v13_0_7_ppt.c | 2292 pstate_table->uclk_pstate.min = SMU_DPM_TABLE_MIN(mem_table); in smu_v13_0_7_populate_umd_state_clk() 2293 pstate_table->uclk_pstate.peak = SMU_DPM_TABLE_MAX(mem_table); in smu_v13_0_7_populate_umd_state_clk() 2313 pstate_table->uclk_pstate.standard = SMU_DPM_TABLE_MAX(mem_table); in smu_v13_0_7_populate_umd_state_clk()
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| H A D | smu_v13_0_0_ppt.c | 2290 pstate_table->uclk_pstate.min = SMU_DPM_TABLE_MIN(mem_table); in smu_v13_0_0_populate_umd_state_clk() 2291 pstate_table->uclk_pstate.peak = SMU_DPM_TABLE_MAX(mem_table); in smu_v13_0_0_populate_umd_state_clk() 2311 pstate_table->uclk_pstate.standard = SMU_DPM_TABLE_MAX(mem_table); in smu_v13_0_0_populate_umd_state_clk()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/ |
| H A D | dml_top_display_cfg_types.h | 437 enum dml2_twait_budgeting_setting uclk_pstate; member
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu15/ |
| H A D | smu_v15_0.c | 1110 mclk_min = mclk_max = pstate_table->uclk_pstate.standard; in smu_v15_0_set_performance_level() 1120 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v15_0_set_performance_level() 1124 mclk_min = mclk_max = pstate_table->uclk_pstate.peak; in smu_v15_0_set_performance_level() 1160 pstate_table->uclk_pstate.curr.min = mclk_min; in smu_v15_0_set_performance_level() 1161 pstate_table->uclk_pstate.curr.max = mclk_max; in smu_v15_0_set_performance_level()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| H A D | smu_v14_0.c | 1240 mclk_min = mclk_max = pstate_table->uclk_pstate.standard; in smu_v14_0_set_performance_level() 1250 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v14_0_set_performance_level() 1254 mclk_min = mclk_max = pstate_table->uclk_pstate.peak; in smu_v14_0_set_performance_level() 1290 pstate_table->uclk_pstate.curr.min = mclk_min; in smu_v14_0_set_performance_level() 1291 pstate_table->uclk_pstate.curr.max = mclk_max; in smu_v14_0_set_performance_level()
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| H A D | smu_v14_0_2_ppt.c | 1530 pstate_table->uclk_pstate.min = SMU_DPM_TABLE_MIN(mem_table); in smu_v14_0_2_populate_umd_state_clk() 1531 pstate_table->uclk_pstate.peak = SMU_DPM_TABLE_MAX(mem_table); in smu_v14_0_2_populate_umd_state_clk() 1551 pstate_table->uclk_pstate.standard = SMU_DPM_TABLE_MAX(mem_table); in smu_v14_0_2_populate_umd_state_clk()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/ |
| H A D | dml2_dpmm_dcn4.c | 797 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_A].uclk_pstate = (int unsigned)(mode_lib->mp.Water… in dpmm_dcn4_map_watermarks() 813 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_B].uclk_pstate = (int unsigned)(mode_lib->mp.Water… in dpmm_dcn4_map_watermarks() 841 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_A].uclk_pstate = (int unsigned)(mode_lib->mp.Water… in dpmm_dcn42_map_watermarks()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/ |
| H A D | smu_cmn.c | 1375 pstate_table->uclk_pstate.custom.min = 0; in smu_cmn_print_dpm_clk_levels() 1376 pstate_table->uclk_pstate.custom.max = 0; in smu_cmn_print_dpm_clk_levels()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | smu_v11_0.c | 1820 mclk_min = mclk_max = pstate_table->uclk_pstate.standard; in smu_v11_0_set_performance_level() 1827 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v11_0_set_performance_level() 1831 mclk_min = mclk_max = pstate_table->uclk_pstate.peak; in smu_v11_0_set_performance_level()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| H A D | amdgpu_smu.h | 565 struct pstates_clk_freq uclk_pstate; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/ |
| H A D | dml21_translation_helper.c | 828 dml_dispcfg->stream_descriptors[disp_cfg_stream_location].overrides.hw.twait_budgeting.uclk_pstate = dml2_twait_budgeting_setting_if_needed; in dml21_map_dc_state_into_dml_display_cfg()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 12262 wm_regs->uclk_pstate = (unsigned int)(mode_lib->mp.Watermark.DRAMClockChangeWatermark * refclk_freq_in_mhz); in dml2_core_calcs_cursor_dlg_reg()
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