Searched refs:socclk (Results 1 – 15 of 15) sorted by relevance
132 dml_clk_table->socclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_socclk_levels; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()134 if (i < dml_clk_table->socclk.num_clk_values) { in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()135 dml_clk_table->socclk.clk_values_khz[i] = dc_clk_table->entries[i].socclk_mhz * 1000; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()137 dml_clk_table->socclk.clk_values_khz[i] = 0; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
306 smu->smu_table.boot_values.socclk = 0; in smu_v12_0_get_vbios_bootup_values()323 smu->smu_table.boot_values.socclk = 0; in smu_v12_0_get_vbios_bootup_values()340 &smu->smu_table.boot_values.socclk); in smu_v12_0_get_vbios_bootup_values()
105 .socclk = {
535 smu->smu_table.boot_values.socclk = 0; in smu_v14_0_get_vbios_bootup_values()549 smu->smu_table.boot_values.socclk = 0; in smu_v14_0_get_vbios_bootup_values()564 smu->smu_table.boot_values.socclk = 0; in smu_v14_0_get_vbios_bootup_values()586 smu->smu_table.boot_values.socclk = smu_info_v3_6->bootup_socclk_10khz; in smu_v14_0_get_vbios_bootup_values()595 smu->smu_table.boot_values.socclk = smu_info_v4_0->bootup_socclk_10khz; in smu_v14_0_get_vbios_bootup_values()1049 clock_limit = smu->smu_table.boot_values.socclk; in smu_v14_0_get_dpm_ultimate_freq()
481 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in smu_v14_0_2_set_default_dpm_table()
479 smu->smu_table.boot_values.socclk = 0; in smu_v11_0_get_vbios_bootup_values()496 smu->smu_table.boot_values.socclk = 0; in smu_v11_0_get_vbios_bootup_values()513 &smu->smu_table.boot_values.socclk); in smu_v11_0_get_vbios_bootup_values()762 max_sustainable_clocks->soc_clock = smu->smu_table.boot_values.socclk / 100; in smu_v11_0_init_max_sustainable_clocks()1657 clock_limit = smu->smu_table.boot_values.socclk; in smu_v11_0_get_dpm_ultimate_freq()
344 uint32_t socclk; member
982 …min_clocks->socclk_khz = in_ctx->v21.dml_init.soc_bb.clk_table.socclk.clk_values_khz[lowest_dpm_st… in dml21_init_min_clocks_for_dc_state()
414 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in aldebaran_set_default_dpm_table()
609 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in smu_v13_0_7_set_default_dpm_table()
581 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in smu_v13_0_0_set_default_dpm_table()
480 unsigned int socclk = context->bw_ctx.dml.vba.SOCCLKPerState[vlevel]; in dcn32_set_phantom_stream_timing() local508 pipes[0].clks_cfg.socclk_mhz = socclk; in dcn32_set_phantom_stream_timing()
526 uint16_t virtual_voltage_id, int32_t *socclk) in vega10_get_socclk_for_voltage_evv() argument548 *socclk = table_info->vdd_dep_on_socclk->entries[entry_id].clk; in vega10_get_socclk_for_voltage_evv()
1337 …clock_change_latency + v->write_back_latency + v->writeback_chunk_size * 1024.0 / 32.0 / v->socclk; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
7990 mode_lib->ms.SOCCLK = ((double)mode_lib->soc.clk_table.socclk.clk_values_khz[0] / 1000); in dml_core_mode_support()