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Searched refs:smum_send_msg_to_smc (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu10_hwmgr.c353 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableGfxOff, NULL); in smu10_disable_gfx_off()
373 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableGfxOff, NULL); in smu10_enable_gfx_off()
383 smum_send_msg_to_smc(hwmgr, in smu10_populate_umdpstate_clocks()
540 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &result); in smu10_populate_clock_table()
543 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency, &result); in smu10_populate_clock_table()
651 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &fine_grain_min_freq); in smu10_dpm_force_dpm_level()
652 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency, &fine_grain_max_freq); in smu10_dpm_force_dpm_level()
694 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &fine_grain_min_freq); in smu10_dpm_force_dpm_level()
695 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency, &fine_grain_max_freq); in smu10_dpm_force_dpm_level()
712 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &fine_grain_min_freq); in smu10_dpm_force_dpm_level()
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H A Dsmu7_clockpowergating.c30 return smum_send_msg_to_smc(hwmgr, enable ? in smu7_enable_disable_uvd_dpm()
38 return smum_send_msg_to_smc(hwmgr, enable ? in smu7_enable_disable_vce_dpm()
61 return smum_send_msg_to_smc(hwmgr, in smu7_powerdown_uvd()
86 return smum_send_msg_to_smc(hwmgr, in smu7_powerdown_vce()
95 return smum_send_msg_to_smc(hwmgr, in smu7_powerup_vce()
434 return smum_send_msg_to_smc(hwmgr, in smu7_powergate_gfx()
H A Dvega20_baco.c101 if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ExitBaco, NULL)) in vega20_baco_set_state()
119 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_BacoWorkAroundFlushVDCI, NULL); in vega20_baco_apply_vdci_flush_workaround()
H A Dsmu7_thermal.c182 result = smum_send_msg_to_smc(hwmgr, in smu7_fan_ctrl_start_smc_fan_control()
195 return smum_send_msg_to_smc(hwmgr, PPSMC_StopFanControl, NULL); in smu7_fan_ctrl_stop_smc_fan_control()
383 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Thermal_Cntl_Enable, NULL); in smu7_thermal_enable_alert()
401 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Thermal_Cntl_Disable, NULL); in smu7_thermal_disable_alert()
H A Dsmu7_powertune.c1016 result = smum_send_msg_to_smc(hwmgr, in smu7_enable_didt_config()
1024 result = smum_send_msg_to_smc(hwmgr, in smu7_enable_didt_config()
1032 result = smum_send_msg_to_smc(hwmgr, in smu7_enable_didt_config()
1038 result = smum_send_msg_to_smc(hwmgr, in smu7_enable_didt_config()
1075 result = smum_send_msg_to_smc(hwmgr, in smu7_disable_didt_config()
1097 smc_result = smum_send_msg_to_smc(hwmgr, in smu7_enable_smc_cac()
1114 int smc_result = smum_send_msg_to_smc(hwmgr, in smu7_disable_smc_cac()
1164 smc_result = smum_send_msg_to_smc(hwmgr, in smu7_enable_power_containment()
1175 smc_result = smum_send_msg_to_smc(hwmgr, in smu7_enable_power_containment()
1205 smc_result = smum_send_msg_to_smc(hwmgr, in smu7_disable_power_containment()
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H A Dsmu7_hwmgr.c254 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Voltage_Cntl_Enable, NULL); in smu7_enable_smc_voltage_controller()
561 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ResetToDefaults, NULL); in smu7_reset_to_default()
1093 return smum_send_msg_to_smc(hwmgr, in smu7_enable_vrhot_gpio_interrupt()
1112 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableULV, NULL); in smu7_enable_ulv()
1122 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableULV, NULL); in smu7_disable_ulv()
1131 if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MASTER_DeepSleep_ON, NULL)) in smu7_enable_deep_sleep_master_switch()
1136 if (smum_send_msg_to_smc(hwmgr, in smu7_enable_deep_sleep_master_switch()
1152 if (smum_send_msg_to_smc(hwmgr, in smu7_disable_deep_sleep_master_switch()
1208 (0 == smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DPM_Enable, NULL)), in smu7_enable_sclk_mclk_dpm()
1219 (0 == smum_send_msg_to_smc(hwmgr, in smu7_enable_sclk_mclk_dpm()
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H A Dsmu8_hwmgr.c165 smum_send_msg_to_smc(hwmgr, in smu8_get_max_sclk_level()
595 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxUvdLevel, &level); in smu8_init_uvd_limit()
625 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxEclkLevel, &level); in smu8_init_vce_limit()
655 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxAclkLevel, &level); in smu8_init_acp_limit()
679 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF, NULL); in smu8_init_power_gate_state()
1274 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UVDPowerOFF, NULL); in smu8_dpm_powerdown_uvd()
1328 return smum_send_msg_to_smc(hwmgr, in smu8_dpm_powerdown_vce()
1337 return smum_send_msg_to_smc(hwmgr, in smu8_dpm_powerup_vce()
1812 result = smum_send_msg_to_smc(hwmgr, in smu8_read_sensor()
1971 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF, NULL); in smu8_dpm_powergate_acp()
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H A Dvega10_baco.c97 if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnterBaco, NULL)) in vega10_baco_set_state()
H A Dvega10_hwmgr.c488 ret = smum_send_msg_to_smc(hwmgr, in vega10_init_dpm_defaults()
511 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); in vega10_init_dpm_defaults()
515 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); in vega10_init_dpm_defaults()
2371 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_InitializeAcg, NULL); in vega10_acg_enable()
2375 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc, &agc_btc_response); in vega10_acg_enable()
2381 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgInClosedLoop, NULL); in vega10_acg_enable()
2383 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgInOpenLoop, NULL); in vega10_acg_enable()
2500 result = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); in vega10_populate_and_upload_avfs_fuse_override()
2503 result = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); in vega10_populate_and_upload_avfs_fuse_override()
3937 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrPkgPwr, &value); in vega10_get_gpu_power()
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H A Dvega12_thermal.c34 PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr, in vega12_get_current_rpm()
H A Dvega12_hwmgr.c367 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); in vega12_init_dpm_defaults()
370 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); in vega12_init_dpm_defaults()
864 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc, &result) == 0, in vega12_run_acg_btc()
926 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAllSmuFeatures, NULL) == 0, in vega12_enable_all_smu_features()
952 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableAllSmuFeatures, NULL) == 0, in vega12_disable_all_smu_features()
2809 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_AllowGfxOff, NULL); in vega12_enable_gfx_off()
2821 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisallowGfxOff, NULL); in vega12_disable_gfx_off()
2858 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, msg, NULL)) == 0, in vega12_set_mp1_state()
H A Dvega20_thermal.c108 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, in vega20_get_current_rpm()
H A Dvega20_hwmgr.c99 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion, &hwmgr->smu_version); in vega20_set_default_registry_data()
407 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); in vega20_init_dpm_defaults()
411 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); in vega20_init_dpm_defaults()
960 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunBtc, NULL); in vega20_run_btc()
965 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAfllBtc, NULL); in vega20_run_btc_afll()
977 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, in vega20_enable_all_smu_features()
1035 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, in vega20_disable_all_smu_features()
1674 result = smum_send_msg_to_smc(hwmgr, in vega20_enable_mgpu_fan_boost()
3201 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, msg, NULL)) == 0, in vega20_set_mp1_state()
H A Dvega10_thermal.c34 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentRpm, current_rpm); in vega10_get_current_rpm()
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmu10_smumgr.c190 ret = smum_send_msg_to_smc(hwmgr, in smu10_verify_smc_interface()
228 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion, &hwmgr->smu_version); in smu10_start_smu()
H A Dvega10_smumgr.c138 ret = smum_send_msg_to_smc(hwmgr, in vega10_get_enabled_smc_features()
185 PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr, in vega10_verify_smc_interface()
H A Dsmu8_smumgr.c627 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ClkTableXferToDram, NULL); in smu8_download_pptable_settings()
657 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ClkTableXferToSmu, NULL); in smu8_upload_pptable_settings()
690 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_InitJobs, NULL); in smu8_request_smu_load_fw()
H A Dsmumgr.c130 int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp) in smum_send_msg_to_smc() function
H A Dvega20_smumgr.c358 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, in vega20_get_enabled_smc_features()
363 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, in vega20_get_enabled_smc_features()
H A Dpolaris10_smumgr.c2056 !smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UseNewGPIOScheme, NULL)) in polaris10_init_smc_table()
2156 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs, NULL); in polaris10_thermal_avfs_enable()
2162 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ApplyAvfsCksOffVoltage, NULL); in polaris10_thermal_avfs_enable()
2612 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel, NULL); in polaris10_update_dpm_settings()
2642 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel, NULL); in polaris10_update_dpm_settings()
2647 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel, NULL); in polaris10_update_dpm_settings()
2677 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel, NULL); in polaris10_update_dpm_settings()
H A Dfiji_smumgr.c2245 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs, NULL); in fiji_thermal_avfs_enable()
2574 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel, NULL); in fiji_update_dpm_settings()
2604 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel, NULL); in fiji_update_dpm_settings()
2609 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel, NULL); in fiji_update_dpm_settings()
2639 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel, NULL); in fiji_update_dpm_settings()
H A Dvegam_smumgr.c2066 !smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UseNewGPIOScheme, NULL)) in vegam_init_smc_table()
2256 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs, NULL); in vegam_thermal_avfs_enable()
2259 ret = smum_send_msg_to_smc(hwmgr, in vegam_thermal_avfs_enable()
H A Dci_smumgr.c2786 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel, NULL); in ci_update_dpm_settings()
2816 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel, NULL); in ci_update_dpm_settings()
2821 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel, NULL); in ci_update_dpm_settings()
2851 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel, NULL); in ci_update_dpm_settings()
H A Dtonga_smumgr.c3173 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel, NULL); in tonga_update_dpm_settings()
3203 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel, NULL); in tonga_update_dpm_settings()
3208 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel, NULL); in tonga_update_dpm_settings()
3238 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel, NULL); in tonga_update_dpm_settings()
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmumgr.h88 extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp);