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/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-cpus.dtsi51 i-cache-sets = <256>;
54 d-cache-sets = <256>;
67 i-cache-sets = <256>;
70 d-cache-sets = <256>;
82 i-cache-sets = <256>;
85 d-cache-sets = <256>;
97 i-cache-sets = <256>;
100 d-cache-sets = <256>;
112 i-cache-sets = <256>;
115 d-cache-sets = <256>;
[all …]
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2042-cpus.dtsi267 i-cache-sets = <512>;
270 d-cache-sets = <512>;
292 i-cache-sets = <512>;
295 d-cache-sets = <512>;
317 i-cache-sets = <512>;
320 d-cache-sets = <512>;
342 i-cache-sets = <512>;
345 d-cache-sets = <512>;
367 i-cache-sets = <512>;
370 d-cache-sets = <512>;
[all …]
/linux/arch/arm64/boot/dts/amazon/
H A Dalpine-v3.dtsi30 d-cache-sets = <256>;
33 i-cache-sets = <256>;
44 d-cache-sets = <256>;
47 i-cache-sets = <256>;
58 d-cache-sets = <256>;
61 i-cache-sets = <256>;
72 d-cache-sets = <256>;
75 i-cache-sets = <256>;
86 d-cache-sets = <256>;
89 i-cache-sets = <256>;
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/linux/arch/mips/mm/
H A Dc-octeon.c183 c->icache.sets = 64 << ((config1 >> 22) & 7); in probe_octeon()
187 c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon()
191 c->dcache.sets = 2; /* CN5XXX has two Dcache sets */ in probe_octeon()
193 c->dcache.sets = 1; /* CN3XXX has one Dcache set */ in probe_octeon()
196 c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon()
203 c->icache.sets = 8; in probe_octeon()
206 icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon()
210 c->dcache.sets = 8; in probe_octeon()
211 dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon()
217 c->icache.sets = 16; in probe_octeon()
[all …]
H A Dsc-mips.c153 unsigned long sets, line_sz, assoc; in mips_sc_probe_cm3() local
158 sets = cfg & CM_GCR_L2_CONFIG_SET_SIZE; in mips_sc_probe_cm3()
159 sets >>= __ffs(CM_GCR_L2_CONFIG_SET_SIZE); in mips_sc_probe_cm3()
160 if (sets) in mips_sc_probe_cm3()
161 c->scache.sets = 64 << sets; in mips_sc_probe_cm3()
171 c->scache.waysize = c->scache.sets * c->scache.linesz; in mips_sc_probe_cm3()
214 c->scache.sets = 64 << tmp; in mips_sc_probe()
241 c->scache.sets = 256; in mips_sc_probe()
247 c->scache.waysize = c->scache.sets * c->scache.linesz; in mips_sc_probe()
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap806-quad.dtsi27 i-cache-sets = <256>;
30 d-cache-sets = <256>;
42 i-cache-sets = <256>;
45 d-cache-sets = <256>;
57 i-cache-sets = <256>;
60 d-cache-sets = <256>;
72 i-cache-sets = <256>;
75 d-cache-sets = <256>;
83 cache-sets = <512>;
92 cache-sets = <512>;
H A Darmada-ap807-quad.dtsi27 i-cache-sets = <256>;
30 d-cache-sets = <256>;
42 i-cache-sets = <256>;
45 d-cache-sets = <256>;
57 i-cache-sets = <256>;
60 d-cache-sets = <256>;
72 i-cache-sets = <256>;
75 d-cache-sets = <256>;
83 cache-sets = <512>;
92 cache-sets = <512>;
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am654.dtsi43 i-cache-sets = <256>;
46 d-cache-sets = <128>;
57 i-cache-sets = <256>;
60 d-cache-sets = <128>;
71 i-cache-sets = <256>;
74 d-cache-sets = <128>;
85 i-cache-sets = <256>;
88 d-cache-sets = <128>;
99 cache-sets = <512>;
109 cache-sets = <512>;
H A Dk3-am62p5.dtsi45 i-cache-sets = <256>;
48 d-cache-sets = <128>;
60 i-cache-sets = <256>;
63 d-cache-sets = <128>;
75 i-cache-sets = <256>;
78 d-cache-sets = <128>;
90 i-cache-sets = <256>;
93 d-cache-sets = <128>;
105 cache-sets = <512>;
H A Dk3-am62a7.dtsi46 i-cache-sets = <256>;
49 d-cache-sets = <128>;
60 i-cache-sets = <256>;
63 d-cache-sets = <128>;
74 i-cache-sets = <256>;
77 d-cache-sets = <128>;
88 i-cache-sets = <256>;
91 d-cache-sets = <128>;
102 cache-sets = <512>;
H A Dk3-j784s4.dtsi72 i-cache-sets = <256>;
75 d-cache-sets = <256>;
86 i-cache-sets = <256>;
89 d-cache-sets = <256>;
100 i-cache-sets = <256>;
103 d-cache-sets = <256>;
114 i-cache-sets = <256>;
117 d-cache-sets = <256>;
128 i-cache-sets = <256>;
131 d-cache-sets = <256>;
[all …]
H A Dk3-am625.dtsi46 i-cache-sets = <256>;
49 d-cache-sets = <128>;
63 i-cache-sets = <256>;
66 d-cache-sets = <128>;
80 i-cache-sets = <256>;
83 d-cache-sets = <128>;
97 i-cache-sets = <256>;
100 d-cache-sets = <128>;
157 cache-sets = <512>;
H A Dk3-am642.dtsi36 i-cache-sets = <256>;
39 d-cache-sets = <128>;
50 i-cache-sets = <256>;
53 d-cache-sets = <128>;
64 cache-sets = <256>;
/linux/fs/nls/
H A DKconfig44 native language character sets. These character sets are stored
56 native language character sets. These character sets are stored
68 native language character sets. These character sets are stored
81 native language character sets. These character sets are stored in
97 native language character sets. These character sets are stored in
112 native language character sets. These character sets are stored in
123 native language character sets. These character sets are stored in
134 native language character sets. These character sets are stored in
145 native language character sets. These character sets are stored in
156 native language character sets. These character sets are stored in
[all …]
/linux/arch/arm64/boot/dts/arm/
H A Dfvp-base-revc.dts54 i-cache-sets = <256>;
57 d-cache-sets = <256>;
67 i-cache-sets = <256>;
70 d-cache-sets = <256>;
80 i-cache-sets = <256>;
83 d-cache-sets = <256>;
93 i-cache-sets = <256>;
96 d-cache-sets = <256>;
106 i-cache-sets = <256>;
109 d-cache-sets = <256>;
[all …]
H A Djuno-r1.dts95 i-cache-sets = <256>;
98 d-cache-sets = <256>;
112 i-cache-sets = <256>;
115 d-cache-sets = <256>;
129 i-cache-sets = <256>;
132 d-cache-sets = <128>;
146 i-cache-sets = <256>;
149 d-cache-sets = <128>;
163 i-cache-sets = <256>;
166 d-cache-sets = <128>;
[all …]
H A Djuno.dts94 i-cache-sets = <256>;
97 d-cache-sets = <256>;
112 i-cache-sets = <256>;
115 d-cache-sets = <256>;
130 i-cache-sets = <256>;
133 d-cache-sets = <128>;
148 i-cache-sets = <256>;
151 d-cache-sets = <128>;
166 i-cache-sets = <256>;
169 d-cache-sets = <128>;
[all …]
H A Djuno-r2.dts95 i-cache-sets = <256>;
98 d-cache-sets = <256>;
113 i-cache-sets = <256>;
116 d-cache-sets = <256>;
131 i-cache-sets = <256>;
134 d-cache-sets = <128>;
149 i-cache-sets = <256>;
152 d-cache-sets = <128>;
167 i-cache-sets = <256>;
170 d-cache-sets = <128>;
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/linux/arch/riscv/boot/dts/sifive/
H A Dfu540-c000.dtsi29 i-cache-sets = <128>;
46 d-cache-sets = <64>;
48 d-tlb-sets = <1>;
52 i-cache-sets = <64>;
54 i-tlb-sets = <1>;
73 d-cache-sets = <64>;
75 d-tlb-sets = <1>;
79 i-cache-sets = <64>;
81 i-tlb-sets = <1>;
100 d-cache-sets = <64>;
[all …]
H A Dfu740-c000.dtsi29 i-cache-sets = <128>;
47 d-cache-sets = <64>;
49 d-tlb-sets = <1>;
53 i-cache-sets = <128>;
55 i-tlb-sets = <1>;
74 d-cache-sets = <64>;
76 d-tlb-sets = <1>;
80 i-cache-sets = <128>;
82 i-tlb-sets = <1>;
101 d-cache-sets = <64>;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2836.dtsi43 /* Source for d/i-cache-line-size and d/i-cache-sets
58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
61 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
75 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
86 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
89 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
100 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
103 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
107 /* Source for cache-line-size + cache-sets
[all …]
H A Dbcm2837.dtsi42 /* Source for d/i-cache-line-size and d/i-cache-sets
57 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
60 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
75 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
87 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
90 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
102 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
105 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
109 /* Source for cache-line-size + cache-sets
[all …]
/linux/arch/arm64/boot/dts/broadcom/
H A Dbcm2712.dtsi47 /* Source for L1 d/i cache-line-size, cache-sets, cache-size
49 * Source for L2 cache-line-size and cache-sets:
61 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
64 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
71 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set
85 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
88 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
95 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set
109 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
112 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
[all …]
/linux/net/ethtool/
H A Dstrset.c121 struct strset_info sets[ETH_SS_COUNT]; member
153 per_dev = data->sets[id].per_dev; in strset_include()
154 if (!per_dev && !data->sets[id].strings) in strset_include()
228 if (data->sets[i].free_strings) { in strset_cleanup_data()
229 kfree(data->sets[i].strings); in strset_cleanup_data()
230 data->sets[i].strings = NULL; in strset_cleanup_data()
231 data->sets[i].free_strings = false; in strset_cleanup_data()
289 memcpy(&data->sets, &info_template, sizeof(data->sets)); in strset_prepare_data()
294 data->sets[i].per_dev) { in strset_prepare_data()
314 !data->sets[i].per_dev) in strset_prepare_data()
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/linux/arch/powerpc/kernel/
H A Dsetup_64.c551 u32 bsize, u32 sets) in init_cache_info() argument
554 info->sets = sets; in init_cache_info()
563 if (sets == 0) in init_cache_info()
566 info->assoc = size / (sets * lsize); in init_cache_info()
587 u32 size, lsize, bsize, sets; in parse_cache_info() local
591 sets = -1u; in parse_cache_info()
598 sets = be32_to_cpu(*setsp); in parse_cache_info()
618 if (sets == 1) in parse_cache_info()
619 sets = 0; in parse_cache_info()
620 else if (sets == 0) in parse_cache_info()
[all …]

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