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/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-cpus.dtsi51 i-cache-sets = <256>;
54 d-cache-sets = <256>;
67 i-cache-sets = <256>;
70 d-cache-sets = <256>;
82 i-cache-sets = <256>;
85 d-cache-sets = <256>;
97 i-cache-sets = <256>;
100 d-cache-sets = <256>;
112 i-cache-sets = <256>;
115 d-cache-sets = <256>;
[all …]
/linux/arch/mips/mm/
H A Dc-octeon.c183 c->icache.sets = 64 << ((config1 >> 22) & 7); in probe_octeon()
187 c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon()
191 c->dcache.sets = 2; /* CN5XXX has two Dcache sets */ in probe_octeon()
193 c->dcache.sets = 1; /* CN3XXX has one Dcache set */ in probe_octeon()
196 c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon()
203 c->icache.sets = 8; in probe_octeon()
206 icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon()
210 c->dcache.sets = 8; in probe_octeon()
211 dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon()
217 c->icache.sets = 16; in probe_octeon()
[all …]
H A Dsc-mips.c153 unsigned long sets, line_sz, assoc; in mips_sc_probe_cm3() local
158 sets = cfg & CM_GCR_L2_CONFIG_SET_SIZE; in mips_sc_probe_cm3()
159 sets >>= __ffs(CM_GCR_L2_CONFIG_SET_SIZE); in mips_sc_probe_cm3()
160 if (sets) in mips_sc_probe_cm3()
161 c->scache.sets = 64 << sets; in mips_sc_probe_cm3()
171 c->scache.waysize = c->scache.sets * c->scache.linesz; in mips_sc_probe_cm3()
214 c->scache.sets = 64 << tmp; in mips_sc_probe()
241 c->scache.sets = 256; in mips_sc_probe()
247 c->scache.waysize = c->scache.sets * c->scache.linesz; in mips_sc_probe()
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j784s4.dtsi65 i-cache-sets = <256>;
68 d-cache-sets = <256>;
79 i-cache-sets = <256>;
82 d-cache-sets = <256>;
93 i-cache-sets = <256>;
96 d-cache-sets = <256>;
107 i-cache-sets = <256>;
110 d-cache-sets = <256>;
121 i-cache-sets = <256>;
124 d-cache-sets = <256>;
[all …]
H A Dk3-am654.dtsi43 i-cache-sets = <256>;
46 d-cache-sets = <128>;
57 i-cache-sets = <256>;
60 d-cache-sets = <128>;
71 i-cache-sets = <256>;
74 d-cache-sets = <128>;
85 i-cache-sets = <256>;
88 d-cache-sets = <128>;
99 cache-sets = <512>;
109 cache-sets = <512>;
H A Dk3-am625.dtsi46 i-cache-sets = <256>;
49 d-cache-sets = <128>;
63 i-cache-sets = <256>;
66 d-cache-sets = <128>;
80 i-cache-sets = <256>;
83 d-cache-sets = <128>;
97 i-cache-sets = <256>;
100 d-cache-sets = <128>;
157 cache-sets = <512>;
H A Dk3-am62a7.dtsi46 i-cache-sets = <256>;
49 d-cache-sets = <128>;
63 i-cache-sets = <256>;
66 d-cache-sets = <128>;
80 i-cache-sets = <256>;
83 d-cache-sets = <128>;
97 i-cache-sets = <256>;
100 d-cache-sets = <128>;
157 cache-sets = <512>;
/linux/Documentation/ABI/stable/
H A Dconfigfs-nvmet13 addr_adrfam: Shows or sets the address family. Accepted
16 addr_portid: Shows or sets the port identifier (u16).
18 addr_traddr: Shows or sets the transport address string.
20 addr_trsvcid: Shows or sets the transport service identifier.
22 addr_trtype: Shows or sets the transport type. Accepted
26 addr_treq: Shows or sets the transport security requirements.
48 attribute shows or sets whether this referral is enabled
56 Shows or sets the inline data size for this port. Default
65 Shows or sets the ANA (Asymmetric Namespace Access) state
75 Shows or sets whether protection information (PI) is
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap806-quad.dtsi24 i-cache-sets = <256>;
27 d-cache-sets = <256>;
39 i-cache-sets = <256>;
42 d-cache-sets = <256>;
54 i-cache-sets = <256>;
57 d-cache-sets = <256>;
69 i-cache-sets = <256>;
72 d-cache-sets = <256>;
80 cache-sets = <512>;
89 cache-sets = <512>;
H A Darmada-ap807-quad.dtsi24 i-cache-sets = <256>;
27 d-cache-sets = <256>;
39 i-cache-sets = <256>;
42 d-cache-sets = <256>;
54 i-cache-sets = <256>;
57 d-cache-sets = <256>;
69 i-cache-sets = <256>;
72 d-cache-sets = <256>;
80 cache-sets = <512>;
89 cache-sets = <512>;
/linux/fs/nls/
H A DKconfig44 native language character sets. These character sets are stored
56 native language character sets. These character sets are stored
68 native language character sets. These character sets are stored
81 native language character sets. These character sets are stored in
97 native language character sets. These character sets are stored in
112 native language character sets. These character sets are stored in
123 native language character sets. These character sets are stored in
134 native language character sets. These character sets are stored in
145 native language character sets. These character sets are stored in
156 native language character sets. These character sets are stored in
[all …]
/linux/arch/arm64/boot/dts/arm/
H A Djuno-r1.dts95 i-cache-sets = <256>;
98 d-cache-sets = <256>;
112 i-cache-sets = <256>;
115 d-cache-sets = <256>;
129 i-cache-sets = <256>;
132 d-cache-sets = <128>;
146 i-cache-sets = <256>;
149 d-cache-sets = <128>;
163 i-cache-sets = <256>;
166 d-cache-sets = <128>;
[all …]
H A Djuno.dts94 i-cache-sets = <256>;
97 d-cache-sets = <256>;
112 i-cache-sets = <256>;
115 d-cache-sets = <256>;
130 i-cache-sets = <256>;
133 d-cache-sets = <128>;
148 i-cache-sets = <256>;
151 d-cache-sets = <128>;
166 i-cache-sets = <256>;
169 d-cache-sets = <128>;
[all …]
H A Djuno-r2.dts95 i-cache-sets = <256>;
98 d-cache-sets = <256>;
113 i-cache-sets = <256>;
116 d-cache-sets = <256>;
131 i-cache-sets = <256>;
134 d-cache-sets = <128>;
149 i-cache-sets = <256>;
152 d-cache-sets = <128>;
167 i-cache-sets = <256>;
170 d-cache-sets = <128>;
[all …]
H A Dfvp-base-revc.dts78 i-cache-sets = <256>;
81 d-cache-sets = <256>;
92 i-cache-sets = <256>;
95 d-cache-sets = <256>;
106 i-cache-sets = <256>;
109 d-cache-sets = <256>;
120 i-cache-sets = <256>;
123 d-cache-sets = <256>;
134 i-cache-sets = <256>;
137 d-cache-sets = <256>;
[all …]
H A Dmorello.dtsi40 i-cache-sets = <512>;
43 d-cache-sets = <512>;
53 cache-sets = <2048>;
67 i-cache-sets = <512>;
70 d-cache-sets = <512>;
80 cache-sets = <2048>;
94 i-cache-sets = <512>;
97 d-cache-sets = <512>;
107 cache-sets = <2048>;
121 i-cache-sets = <512>;
[all …]
/linux/arch/riscv/boot/dts/sifive/
H A Dfu540-c000.dtsi29 i-cache-sets = <128>;
46 d-cache-sets = <64>;
48 d-tlb-sets = <1>;
52 i-cache-sets = <64>;
54 i-tlb-sets = <1>;
73 d-cache-sets = <64>;
75 d-tlb-sets = <1>;
79 i-cache-sets = <64>;
81 i-tlb-sets = <1>;
100 d-cache-sets = <64>;
[all …]
H A Dfu740-c000.dtsi29 i-cache-sets = <128>;
47 d-cache-sets = <64>;
49 d-tlb-sets = <1>;
53 i-cache-sets = <128>;
55 i-tlb-sets = <1>;
74 d-cache-sets = <64>;
76 d-tlb-sets = <1>;
80 i-cache-sets = <128>;
82 i-tlb-sets = <1>;
101 d-cache-sets = <64>;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2836.dtsi43 /* Source for d/i-cache-line-size and d/i-cache-sets
58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
61 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
75 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
86 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
89 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
100 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
103 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
107 /* Source for cache-line-size + cache-sets
[all …]
H A Dbcm2837.dtsi42 /* Source for d/i-cache-line-size and d/i-cache-sets
57 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
60 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
75 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
87 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
90 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
102 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
105 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
109 /* Source for cache-line-size + cache-sets
[all …]
/linux/arch/openrisc/kernel/
H A Dcacheinfo.c23 this_leaf->number_of_sets = cache->sets; in ci_leaf_init()
46 cpuinfo->dcache.sets = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3); in init_cache_level()
49 cpuinfo->dcache.sets * cpuinfo->dcache.ways * cpuinfo->dcache.block_size; in init_cache_level()
54 cpuinfo->dcache.sets, cpuinfo->dcache.ways); in init_cache_level()
61 cpuinfo->icache.sets = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3); in init_cache_level()
64 cpuinfo->icache.sets * cpuinfo->icache.ways * cpuinfo->icache.block_size; in init_cache_level()
69 cpuinfo->icache.sets, cpuinfo->icache.ways); in init_cache_level()
/linux/net/ethtool/
H A Dstrset.c132 struct strset_info sets[ETH_SS_COUNT]; member
164 per_dev = data->sets[id].per_dev; in strset_include()
165 if (!per_dev && !data->sets[id].strings) in strset_include()
240 if (data->sets[i].free_strings) { in strset_cleanup_data()
241 kfree(data->sets[i].strings); in strset_cleanup_data()
242 data->sets[i].strings = NULL; in strset_cleanup_data()
243 data->sets[i].free_strings = false; in strset_cleanup_data()
301 memcpy(&data->sets, &info_template, sizeof(data->sets)); in strset_prepare_data()
306 data->sets[i].per_dev) { in strset_prepare_data()
326 !data->sets[i].per_dev) in strset_prepare_data()
[all …]
/linux/arch/powerpc/kernel/
H A Dsetup_64.c548 u32 bsize, u32 sets) in init_cache_info() argument
551 info->sets = sets; in init_cache_info()
560 if (sets == 0) in init_cache_info()
563 info->assoc = size / (sets * lsize); in init_cache_info()
584 u32 size, lsize, bsize, sets; in parse_cache_info() local
588 sets = -1u; in parse_cache_info()
595 sets = be32_to_cpu(*setsp); in parse_cache_info()
615 if (sets == 1) in parse_cache_info()
616 sets = 0; in parse_cache_info()
617 else if (sets == 0) in parse_cache_info()
[all …]
/linux/arch/powerpc/boot/dts/
H A Dmicrowatt.dts117 i-cache-sets = <2>;
122 i-tlb-sets = <1>;
126 d-cache-sets = <2>;
133 tlb-sets = <0>;
136 d-tlb-sets = <2>;
147 i-cache-sets = <2>;
152 i-tlb-sets = <1>;
156 d-cache-sets = <2>;
163 tlb-sets = <0>;
166 d-tlb-sets = <2>;
/linux/arch/riscv/boot/dts/andes/
H A Dqilai.dtsi30 i-cache-sets = <256>;
33 d-cache-sets = <128>;
55 i-cache-sets = <256>;
58 d-cache-sets = <128>;
81 i-cache-sets = <256>;
84 d-cache-sets = <128>;
107 i-cache-sets = <256>;
110 d-cache-sets = <128>;
146 cache-sets = <2048>;

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