Searched refs:pstate_table (Results 1 – 7 of 7) sorted by relevance
1262 struct smu_umd_pstate_table *pstate_table = in smu_v14_0_set_performance_level() local1263 &smu->pstate_table; in smu_v14_0_set_performance_level()1307 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v14_0_set_performance_level()1308 mclk_min = mclk_max = pstate_table->uclk_pstate.standard; in smu_v14_0_set_performance_level()1309 socclk_min = socclk_max = pstate_table->socclk_pstate.standard; in smu_v14_0_set_performance_level()1310 vclk_min = vclk_max = pstate_table->vclk_pstate.standard; in smu_v14_0_set_performance_level()1311 dclk_min = dclk_max = pstate_table->dclk_pstate.standard; in smu_v14_0_set_performance_level()1312 fclk_min = fclk_max = pstate_table->fclk_pstate.standard; in smu_v14_0_set_performance_level()1315 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v14_0_set_performance_level()1318 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v14_0_set_performance_level()[all …]
1598 struct smu_umd_pstate_table *pstate_table = in smu_v14_0_2_populate_umd_state_clk() local1599 &smu->pstate_table; in smu_v14_0_2_populate_umd_state_clk()1605 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v14_0_2_populate_umd_state_clk()1608 pstate_table->gfxclk_pstate.peak = driver_clocks.GameClockAc; in smu_v14_0_2_populate_umd_state_clk()1610 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v14_0_2_populate_umd_state_clk()1612 pstate_table->uclk_pstate.min = mem_table->min; in smu_v14_0_2_populate_umd_state_clk()1613 pstate_table->uclk_pstate.peak = mem_table->max; in smu_v14_0_2_populate_umd_state_clk()1615 pstate_table->socclk_pstate.min = soc_table->min; in smu_v14_0_2_populate_umd_state_clk()1616 pstate_table->socclk_pstate.peak = soc_table->max; in smu_v14_0_2_populate_umd_state_clk()1618 pstate_table->vclk_pstate.min = vclk_table->min; in smu_v14_0_2_populate_umd_state_clk()[all …]
1600 struct smu_umd_pstate_table *pstate_table = in smu_v13_0_set_performance_level() local1601 &smu->pstate_table; in smu_v13_0_set_performance_level()1645 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v13_0_set_performance_level()1646 mclk_min = mclk_max = pstate_table->uclk_pstate.standard; in smu_v13_0_set_performance_level()1647 socclk_min = socclk_max = pstate_table->socclk_pstate.standard; in smu_v13_0_set_performance_level()1648 vclk_min = vclk_max = pstate_table->vclk_pstate.standard; in smu_v13_0_set_performance_level()1649 dclk_min = dclk_max = pstate_table->dclk_pstate.standard; in smu_v13_0_set_performance_level()1650 fclk_min = fclk_max = pstate_table->fclk_pstate.standard; in smu_v13_0_set_performance_level()1653 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v13_0_set_performance_level()1656 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v13_0_set_performance_level()[all …]
2318 struct smu_umd_pstate_table *pstate_table = in smu_v13_0_0_populate_umd_state_clk() local2319 &smu->pstate_table; in smu_v13_0_0_populate_umd_state_clk()2325 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_0_populate_umd_state_clk()2328 pstate_table->gfxclk_pstate.peak = driver_clocks.GameClockAc; in smu_v13_0_0_populate_umd_state_clk()2330 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v13_0_0_populate_umd_state_clk()2332 pstate_table->uclk_pstate.min = mem_table->min; in smu_v13_0_0_populate_umd_state_clk()2333 pstate_table->uclk_pstate.peak = mem_table->max; in smu_v13_0_0_populate_umd_state_clk()2335 pstate_table->socclk_pstate.min = soc_table->min; in smu_v13_0_0_populate_umd_state_clk()2336 pstate_table->socclk_pstate.peak = soc_table->max; in smu_v13_0_0_populate_umd_state_clk()2338 pstate_table->vclk_pstate.min = vclk_table->min; in smu_v13_0_0_populate_umd_state_clk()[all …]
1868 struct smu_umd_pstate_table *pstate_table = in smu_v11_0_set_performance_level() local1869 &smu->pstate_table; in smu_v11_0_set_performance_level()1898 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v11_0_set_performance_level()1899 mclk_min = mclk_max = pstate_table->uclk_pstate.standard; in smu_v11_0_set_performance_level()1900 socclk_min = socclk_max = pstate_table->socclk_pstate.standard; in smu_v11_0_set_performance_level()1903 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v11_0_set_performance_level()1906 mclk_min = mclk_max = pstate_table->uclk_pstate.min; in smu_v11_0_set_performance_level()1909 sclk_min = sclk_max = pstate_table->gfxclk_pstate.peak; in smu_v11_0_set_performance_level()1910 mclk_min = mclk_max = pstate_table->uclk_pstate.peak; in smu_v11_0_set_performance_level()1911 socclk_min = socclk_max = pstate_table->socclk_pstate.peak; in smu_v11_0_set_performance_level()
1720 struct smu_umd_pstate_table *pstate_table = in navi10_populate_umd_state_clk() local1721 &smu->pstate_table; in navi10_populate_umd_state_clk()1725 pstate_table->gfxclk_pstate.min = gfx_table->min; in navi10_populate_umd_state_clk()1772 pstate_table->gfxclk_pstate.peak = sclk_freq; in navi10_populate_umd_state_clk()1774 pstate_table->uclk_pstate.min = mem_table->min; in navi10_populate_umd_state_clk()1775 pstate_table->uclk_pstate.peak = mem_table->max; in navi10_populate_umd_state_clk()1777 pstate_table->socclk_pstate.min = soc_table->min; in navi10_populate_umd_state_clk()1778 pstate_table->socclk_pstate.peak = soc_table->max; in navi10_populate_umd_state_clk()1783 pstate_table->gfxclk_pstate.standard = in navi10_populate_umd_state_clk()1785 pstate_table->uclk_pstate.standard = in navi10_populate_umd_state_clk()[all …]
3151 struct smu_umd_pstate_table *pstate_table = in smu_read_sensor() local3152 &smu->pstate_table; in smu_read_sensor()3171 *((uint32_t *)data) = pstate_table->gfxclk_pstate.standard * 100; in smu_read_sensor()3175 *((uint32_t *)data) = pstate_table->uclk_pstate.standard * 100; in smu_read_sensor()3179 *((uint32_t *)data) = pstate_table->gfxclk_pstate.peak * 100; in smu_read_sensor()3183 *((uint32_t *)data) = pstate_table->uclk_pstate.peak * 100; in smu_read_sensor()