| /linux/drivers/gpio/ |
| H A D | gpio-tangier.h | 54 unsigned int pin_base; member
61 .pin_base = (pstart), \
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| /linux/drivers/irqchip/ |
| H A D | qcom-pdc.c | 181 u32 pin_base; member
186 #define pin_to_hwirq(r, p) ((r)->parent_base + (p) - (r)->pin_base)
536 if (pin >= pdc->region[i].pin_base && in get_pin_region()
537 pin < pdc->region[i].pin_base + pdc->region[i].cnt) in get_pin_region()
631 &pdc->region[n].pin_base); in pdc_setup_pin_mapping()
644 if (pdc_pin_is_gpio(i + pdc->region[n].pin_base) && in pdc_setup_pin_mapping()
646 pdc->clear_gpio(i + pdc->region[n].pin_base); in pdc_setup_pin_mapping()
648 pdc->enable_intr(i + pdc->region[n].pin_base, false); in pdc_setup_pin_mapping()
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| /linux/drivers/pinctrl/intel/ |
| H A D | pinctrl-intel.h | 131 unsigned int pin_base; member
165 .pin_base = (s), \
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| H A D | pinctrl-intel-platform.c | 169 community->pin_base = pins.npins; in intel_platform_pinctrl_prepare_soc_data()
175 community->npins = pins.npins - community->pin_base; in intel_platform_pinctrl_prepare_soc_data()
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| H A D | pinctrl-intel.c | 125 #define pin_to_padno(c, p) ((p) - (c)->pin_base)
152 if (pin >= community->pin_base && in intel_get_community()
153 pin < community->pin_base + community->npins) in intel_get_community()
1495 gpps[i].base = community->pin_base + i * gpp_size; in intel_pinctrl_add_padgroups_by_size()
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| /linux/drivers/pinctrl/sunxi/ |
| H A D | pinctrl-sun50i-h616-r.c | 33 .pin_base = PL_BASE,
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| H A D | pinctrl-sun8i-h3-r.c | 83 .pin_base = PL_BASE,
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| H A D | pinctrl-sun8i-a23-r.c | 92 .pin_base = PL_BASE,
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| H A D | pinctrl-sun50i-a100-r.c | 82 .pin_base = PL_BASE,
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| H A D | pinctrl-sun8i-a83t-r.c | 104 .pin_base = PL_BASE,
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| H A D | pinctrl-sun50i-a64-r.c | 101 .pin_base = PL_BASE,
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| H A D | pinctrl-sun50i-h6-r.c | 106 .pin_base = PL_BASE,
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| H A D | pinctrl-sun6i-a31-r.c | 105 .pin_base = PL_BASE,
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| H A D | pinctrl-sunxi.h | 140 unsigned pin_base; member
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| /linux/drivers/pinctrl/starfive/ |
| H A D | pinctrl-starfive-jh7100.c | 218 return pin - sfp->gpios.pin_base; in starfive_pin_to_gpio()
224 return sfp->gpios.pin_base + gpio; in starfive_gpio_to_pin()
1278 sfp->gpios.pin_base = PAD_INVALID_GPIO; in starfive_probe()
1281 sfp->gpios.pin_base = PAD_GPIO(0); in starfive_probe()
1284 sfp->gpios.pin_base = PAD_FUNC_SHARE(72); in starfive_probe()
1287 sfp->gpios.pin_base = PAD_FUNC_SHARE(70); in starfive_probe()
1290 sfp->gpios.pin_base = PAD_FUNC_SHARE(0); in starfive_probe()
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| /linux/drivers/pinctrl/samsung/ |
| H A D | pinctrl-samsung.c | 362 while ((pin >= b->pin_base) && in pin_to_reg_bank()
363 ((b->pin_base + b->nr_pins - 1) < pin)) in pin_to_reg_bank()
367 *offset = pin - b->pin_base; in pin_to_reg_bank()
731 bank->grange.pin_base = bank->pin_base; in samsung_add_pin_ranges()
963 pdesc = pindesc + pin_bank->pin_base + pin; in samsung_pinctrl_register()
1243 bank->pin_base = d->nr_pins; in samsung_pinctrl_get_soc_data()
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| H A D | pinctrl-samsung.h | 215 u32 pin_base; member
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| /linux/drivers/pinctrl/ |
| H A D | pinctrl-rockchip.c | 339 while (pin >= (b->pin_base + b->nr_pins)) in pin_to_bank()
4019 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
4029 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
4046 return rockchip_set_mux(bank, offset - bank->pin_base, RK_FUNC_GPIO); in rockchip_pmx_gpio_request_enable()
4138 pin - bank->pin_base, in rockchip_pinconf_set()
4145 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
4160 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
4166 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
4171 rc = gpio->direction_output(gpio, pin - bank->pin_base, in rockchip_pinconf_set()
4177 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
[all …]
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| H A D | pinctrl-mlxbf3.c | 38 .pin_base = _pinbase, \
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| H A D | pinctrl-pistachio.c | 97 unsigned int pin_base; member
986 gpio_disable(gpiochip_get_data(range->gc), pg->pin - range->pin_base); in pistachio_pinmux_enable()
1323 .pin_base = _pin_base, \
1433 bank->pin_base, bank->npins); in pistachio_gpio_register()
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| H A D | pinctrl-amdisp.c | 159 grange->pin_base = 0; in amdisp_gpiochip_add()
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| H A D | pinctrl-rockchip.h | 335 u32 pin_base; member
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| /linux/drivers/pinctrl/meson/ |
| H A D | pinctrl-amlogic-a4.c | 95 unsigned int pin_base; member
213 shift = ((pin - range->pin_base) << 2) + *offset; in aml_pmx_calc_reg_and_offset()
334 *bit = (pin - range->pin_base) * aml_bit_strides[reg_type] in aml_calc_reg_and_bit()
1101 bank->pin_base = bank->bank_id << 8; in aml_gpiolib_register_bank()
1154 k = info->banks[bank].pin_base; in aml_pctl_probe_dt()
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| /linux/drivers/pinctrl/mvebu/ |
| H A D | pinctrl-mvebu.h | 188 .pin_base = _pinbase, \
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| /linux/drivers/pinctrl/renesas/ |
| H A D | pinctrl-rza2.c | 272 priv->gpio_range.pin_base = priv->gpio_range.base = 0; in rza2_gpio_register()
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