1*2874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 206763c74SThomas Petazzoni /* 306763c74SThomas Petazzoni * Marvell MVEBU pinctrl driver 406763c74SThomas Petazzoni * 506763c74SThomas Petazzoni * Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> 606763c74SThomas Petazzoni * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 706763c74SThomas Petazzoni */ 806763c74SThomas Petazzoni 906763c74SThomas Petazzoni #ifndef __PINCTRL_MVEBU_H__ 1006763c74SThomas Petazzoni #define __PINCTRL_MVEBU_H__ 1106763c74SThomas Petazzoni 1206763c74SThomas Petazzoni /** 1320955c5fSRussell King * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations 1420955c5fSRussell King * @base: base address of pinctrl hardware 15d068b098SRussell King * @regmap.map: regmap structure 16d068b098SRussell King * @regmap.offset: regmap offset 1720955c5fSRussell King */ 1820955c5fSRussell King struct mvebu_mpp_ctrl_data { 19d068b098SRussell King union { 2020955c5fSRussell King void __iomem *base; 21d068b098SRussell King struct { 22d068b098SRussell King struct regmap *map; 23d068b098SRussell King u32 offset; 24d068b098SRussell King } regmap; 25d068b098SRussell King }; 2620955c5fSRussell King }; 2720955c5fSRussell King 2820955c5fSRussell King /** 2906763c74SThomas Petazzoni * struct mvebu_mpp_ctrl - describe a mpp control 3006763c74SThomas Petazzoni * @name: name of the control group 3106763c74SThomas Petazzoni * @pid: first pin id handled by this control 3206763c74SThomas Petazzoni * @npins: number of pins controlled by this control 3306763c74SThomas Petazzoni * @mpp_get: (optional) special function to get mpp setting 3406763c74SThomas Petazzoni * @mpp_set: (optional) special function to set mpp setting 3506763c74SThomas Petazzoni * @mpp_gpio_req: (optional) special function to request gpio 3606763c74SThomas Petazzoni * @mpp_gpio_dir: (optional) special function to set gpio direction 3706763c74SThomas Petazzoni * 3806763c74SThomas Petazzoni * A mpp_ctrl describes a muxable unit, e.g. pin, group of pins, or 3906763c74SThomas Petazzoni * internal function, inside the SoC. Each muxable unit can be switched 4006763c74SThomas Petazzoni * between two or more different settings, e.g. assign mpp pin 13 to 4106763c74SThomas Petazzoni * uart1 or sata. 4206763c74SThomas Petazzoni * 43cffa7a6bSThomas Petazzoni * The mpp_get/_set functions are mandatory and are used to get/set a 44cffa7a6bSThomas Petazzoni * specific mode. The optional mpp_gpio_req/_dir functions can be used 45cffa7a6bSThomas Petazzoni * to allow pin settings with varying gpio pins. 4606763c74SThomas Petazzoni */ 4706763c74SThomas Petazzoni struct mvebu_mpp_ctrl { 4806763c74SThomas Petazzoni const char *name; 4906763c74SThomas Petazzoni u8 pid; 5006763c74SThomas Petazzoni u8 npins; 5106763c74SThomas Petazzoni unsigned *pins; 5220955c5fSRussell King int (*mpp_get)(struct mvebu_mpp_ctrl_data *data, unsigned pid, 5320955c5fSRussell King unsigned long *config); 5420955c5fSRussell King int (*mpp_set)(struct mvebu_mpp_ctrl_data *data, unsigned pid, 5520955c5fSRussell King unsigned long config); 5620955c5fSRussell King int (*mpp_gpio_req)(struct mvebu_mpp_ctrl_data *data, unsigned pid); 5720955c5fSRussell King int (*mpp_gpio_dir)(struct mvebu_mpp_ctrl_data *data, unsigned pid, 5820955c5fSRussell King bool input); 5906763c74SThomas Petazzoni }; 6006763c74SThomas Petazzoni 6106763c74SThomas Petazzoni /** 6206763c74SThomas Petazzoni * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting 6306763c74SThomas Petazzoni * @val: ctrl setting value 6406763c74SThomas Petazzoni * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode 6506763c74SThomas Petazzoni * @subname: (optional) additional ctrl setting name, e.g. rts, cts 6606763c74SThomas Petazzoni * @variant: (optional) variant identifier mask 6706763c74SThomas Petazzoni * @flags: (private) flags to store gpi/gpo/gpio capabilities 6806763c74SThomas Petazzoni * 6906763c74SThomas Petazzoni * A ctrl_setting describes a specific internal mux function that a mpp pin 7006763c74SThomas Petazzoni * can be switched to. The value (val) will be written in the corresponding 7106763c74SThomas Petazzoni * register for common mpp pin configuration registers on MVEBU. SoC specific 7206763c74SThomas Petazzoni * mpp_get/_set function may use val to distinguish between different settings. 7306763c74SThomas Petazzoni * 7406763c74SThomas Petazzoni * The name will be used to switch to this setting in DT description, e.g. 7506763c74SThomas Petazzoni * marvell,function = "uart2". subname is only for debugging purposes. 7606763c74SThomas Petazzoni * 7706763c74SThomas Petazzoni * If name is one of "gpi", "gpo", "gpio" gpio capabilities are 7806763c74SThomas Petazzoni * parsed during initialization and stored in flags. 7906763c74SThomas Petazzoni * 8006763c74SThomas Petazzoni * The variant can be used to combine different revisions of one SoC to a 8106763c74SThomas Petazzoni * common pinctrl driver. It is matched (AND) with variant of soc_info to 8206763c74SThomas Petazzoni * determine if a setting is available on the current SoC revision. 8306763c74SThomas Petazzoni */ 8406763c74SThomas Petazzoni struct mvebu_mpp_ctrl_setting { 8506763c74SThomas Petazzoni u8 val; 8606763c74SThomas Petazzoni const char *name; 8706763c74SThomas Petazzoni const char *subname; 8806763c74SThomas Petazzoni u8 variant; 8906763c74SThomas Petazzoni u8 flags; 9006763c74SThomas Petazzoni #define MVEBU_SETTING_GPO (1 << 0) 9106763c74SThomas Petazzoni #define MVEBU_SETTING_GPI (1 << 1) 9206763c74SThomas Petazzoni }; 9306763c74SThomas Petazzoni 9406763c74SThomas Petazzoni /** 9506763c74SThomas Petazzoni * struct mvebu_mpp_mode - link ctrl and settings 9606763c74SThomas Petazzoni * @pid: first pin id handled by this mode 9706763c74SThomas Petazzoni * @settings: list of settings available for this mode 9806763c74SThomas Petazzoni * 9906763c74SThomas Petazzoni * A mode connects all available settings with the corresponding mpp_ctrl 10006763c74SThomas Petazzoni * given by pid. 10106763c74SThomas Petazzoni */ 10206763c74SThomas Petazzoni struct mvebu_mpp_mode { 10306763c74SThomas Petazzoni u8 pid; 10406763c74SThomas Petazzoni struct mvebu_mpp_ctrl_setting *settings; 10506763c74SThomas Petazzoni }; 10606763c74SThomas Petazzoni 10706763c74SThomas Petazzoni /** 10806763c74SThomas Petazzoni * struct mvebu_pinctrl_soc_info - SoC specific info passed to pinctrl-mvebu 10906763c74SThomas Petazzoni * @variant: variant mask of soc_info 11006763c74SThomas Petazzoni * @controls: list of available mvebu_mpp_ctrls 11120955c5fSRussell King * @control_data: optional array, one entry for each control 11206763c74SThomas Petazzoni * @ncontrols: number of available mvebu_mpp_ctrls 11306763c74SThomas Petazzoni * @modes: list of available mvebu_mpp_modes 11406763c74SThomas Petazzoni * @nmodes: number of available mvebu_mpp_modes 11506763c74SThomas Petazzoni * @gpioranges: list of pinctrl_gpio_ranges 11606763c74SThomas Petazzoni * @ngpioranges: number of available pinctrl_gpio_ranges 11706763c74SThomas Petazzoni * 11806763c74SThomas Petazzoni * This struct describes all pinctrl related information for a specific SoC. 11906763c74SThomas Petazzoni * If variant is unequal 0 it will be matched (AND) with variant of each 12006763c74SThomas Petazzoni * setting and allows to distinguish between different revisions of one SoC. 12106763c74SThomas Petazzoni */ 12206763c74SThomas Petazzoni struct mvebu_pinctrl_soc_info { 12306763c74SThomas Petazzoni u8 variant; 12430be3fb9SRussell King const struct mvebu_mpp_ctrl *controls; 12520955c5fSRussell King struct mvebu_mpp_ctrl_data *control_data; 12606763c74SThomas Petazzoni int ncontrols; 12706763c74SThomas Petazzoni struct mvebu_mpp_mode *modes; 12806763c74SThomas Petazzoni int nmodes; 12906763c74SThomas Petazzoni struct pinctrl_gpio_range *gpioranges; 13006763c74SThomas Petazzoni int ngpioranges; 13106763c74SThomas Petazzoni }; 13206763c74SThomas Petazzoni 13306763c74SThomas Petazzoni #define MPP_FUNC_CTRL(_idl, _idh, _name, _func) \ 13406763c74SThomas Petazzoni { \ 13506763c74SThomas Petazzoni .name = _name, \ 13606763c74SThomas Petazzoni .pid = _idl, \ 13706763c74SThomas Petazzoni .npins = _idh - _idl + 1, \ 13806763c74SThomas Petazzoni .pins = (unsigned[_idh - _idl + 1]) { }, \ 13906763c74SThomas Petazzoni .mpp_get = _func ## _get, \ 14006763c74SThomas Petazzoni .mpp_set = _func ## _set, \ 14106763c74SThomas Petazzoni .mpp_gpio_req = NULL, \ 14206763c74SThomas Petazzoni .mpp_gpio_dir = NULL, \ 14306763c74SThomas Petazzoni } 14406763c74SThomas Petazzoni 14506763c74SThomas Petazzoni #define MPP_FUNC_GPIO_CTRL(_idl, _idh, _name, _func) \ 14606763c74SThomas Petazzoni { \ 14706763c74SThomas Petazzoni .name = _name, \ 14806763c74SThomas Petazzoni .pid = _idl, \ 14906763c74SThomas Petazzoni .npins = _idh - _idl + 1, \ 15006763c74SThomas Petazzoni .pins = (unsigned[_idh - _idl + 1]) { }, \ 15106763c74SThomas Petazzoni .mpp_get = _func ## _get, \ 15206763c74SThomas Petazzoni .mpp_set = _func ## _set, \ 15306763c74SThomas Petazzoni .mpp_gpio_req = _func ## _gpio_req, \ 15406763c74SThomas Petazzoni .mpp_gpio_dir = _func ## _gpio_dir, \ 15506763c74SThomas Petazzoni } 15606763c74SThomas Petazzoni 15706763c74SThomas Petazzoni #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ 15806763c74SThomas Petazzoni { \ 15906763c74SThomas Petazzoni .val = _val, \ 16006763c74SThomas Petazzoni .name = _name, \ 16106763c74SThomas Petazzoni .subname = _subname, \ 16206763c74SThomas Petazzoni .variant = _mask, \ 16306763c74SThomas Petazzoni .flags = 0, \ 16406763c74SThomas Petazzoni } 16506763c74SThomas Petazzoni 16606763c74SThomas Petazzoni #if defined(CONFIG_DEBUG_FS) 16706763c74SThomas Petazzoni #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ 16806763c74SThomas Petazzoni _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) 16906763c74SThomas Petazzoni #else 17006763c74SThomas Petazzoni #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ 17106763c74SThomas Petazzoni _MPP_VAR_FUNCTION(_val, _name, NULL, _mask) 17206763c74SThomas Petazzoni #endif 17306763c74SThomas Petazzoni 17406763c74SThomas Petazzoni #define MPP_FUNCTION(_val, _name, _subname) \ 17506763c74SThomas Petazzoni MPP_VAR_FUNCTION(_val, _name, _subname, (u8)-1) 17606763c74SThomas Petazzoni 17706763c74SThomas Petazzoni #define MPP_MODE(_id, ...) \ 17806763c74SThomas Petazzoni { \ 17906763c74SThomas Petazzoni .pid = _id, \ 18006763c74SThomas Petazzoni .settings = (struct mvebu_mpp_ctrl_setting[]){ \ 18106763c74SThomas Petazzoni __VA_ARGS__, { } }, \ 18206763c74SThomas Petazzoni } 18306763c74SThomas Petazzoni 18406763c74SThomas Petazzoni #define MPP_GPIO_RANGE(_id, _pinbase, _gpiobase, _npins) \ 18506763c74SThomas Petazzoni { \ 18606763c74SThomas Petazzoni .name = "mvebu-gpio", \ 18706763c74SThomas Petazzoni .id = _id, \ 18806763c74SThomas Petazzoni .pin_base = _pinbase, \ 18906763c74SThomas Petazzoni .base = _gpiobase, \ 19006763c74SThomas Petazzoni .npins = _npins, \ 19106763c74SThomas Petazzoni } 19206763c74SThomas Petazzoni 193f5b85e42SSebastian Hesselbarth #define MVEBU_MPPS_PER_REG 8 194f5b85e42SSebastian Hesselbarth #define MVEBU_MPP_BITS 4 195f5b85e42SSebastian Hesselbarth #define MVEBU_MPP_MASK 0xf 196f5b85e42SSebastian Hesselbarth 19744aa9d06SRussell King int mvebu_mmio_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid, 19844aa9d06SRussell King unsigned long *config); 19944aa9d06SRussell King int mvebu_mmio_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid, 20044aa9d06SRussell King unsigned long config); 201d068b098SRussell King int mvebu_regmap_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data, unsigned pid, 202d068b098SRussell King unsigned long *config); 203d068b098SRussell King int mvebu_regmap_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data, unsigned pid, 204d068b098SRussell King unsigned long config); 20544aa9d06SRussell King 20606763c74SThomas Petazzoni int mvebu_pinctrl_probe(struct platform_device *pdev); 20744aa9d06SRussell King int mvebu_pinctrl_simple_mmio_probe(struct platform_device *pdev); 208d068b098SRussell King int mvebu_pinctrl_simple_regmap_probe(struct platform_device *pdev, 209ef088187SGregory CLEMENT struct device *syscon_dev, u32 offset); 21006763c74SThomas Petazzoni 21106763c74SThomas Petazzoni #endif 212