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Searched refs:gfxclk_pstate (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Daldebaran_ppt.c592 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in aldebaran_populate_umd_state_clk()
593 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in aldebaran_populate_umd_state_clk()
594 pstate_table->gfxclk_pstate.curr.min = SMU_DPM_TABLE_MIN(gfx_table); in aldebaran_populate_umd_state_clk()
595 pstate_table->gfxclk_pstate.curr.max = SMU_DPM_TABLE_MAX(gfx_table); in aldebaran_populate_umd_state_clk()
610 pstate_table->gfxclk_pstate.standard = in aldebaran_populate_umd_state_clk()
617 pstate_table->gfxclk_pstate.standard = in aldebaran_populate_umd_state_clk()
618 pstate_table->gfxclk_pstate.min; in aldebaran_populate_umd_state_clk()
811 pstate_table->gfxclk_pstate.curr.min, in aldebaran_emit_clk_levels()
812 pstate_table->gfxclk_pstate.curr.max); in aldebaran_emit_clk_levels()
1206 pstate_table->gfxclk_pstate.curr.max = in aldebaran_set_performance_level()
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H A Dsmu_v13_0_6_ppt.c1201 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_6_populate_umd_state_clk()
1202 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_6_populate_umd_state_clk()
1203 pstate_table->gfxclk_pstate.curr.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_6_populate_umd_state_clk()
1204 pstate_table->gfxclk_pstate.curr.max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_6_populate_umd_state_clk()
1219 pstate_table->gfxclk_pstate.standard = in smu_v13_0_6_populate_umd_state_clk()
1226 pstate_table->gfxclk_pstate.standard = in smu_v13_0_6_populate_umd_state_clk()
1227 pstate_table->gfxclk_pstate.min; in smu_v13_0_6_populate_umd_state_clk()
1389 pstate_table->gfxclk_pstate.curr.min, in smu_v13_0_6_emit_clk_levels()
1390 pstate_table->gfxclk_pstate.curr.max); in smu_v13_0_6_emit_clk_levels()
1981 pstate_table->gfxclk_pstate.curr.max = in smu_v13_0_6_set_performance_level()
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H A Dsmu_v13_0.c1638 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v13_0_set_performance_level()
1646 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v13_0_set_performance_level()
1652 sclk_min = sclk_max = pstate_table->gfxclk_pstate.peak; in smu_v13_0_set_performance_level()
1689 pstate_table->gfxclk_pstate.curr.min = sclk_min; in smu_v13_0_set_performance_level()
1690 pstate_table->gfxclk_pstate.curr.max = sclk_max; in smu_v13_0_set_performance_level()
2509 pstate_table->gfxclk_pstate.custom.min = 0; in smu_v13_0_reset_custom_level()
2510 pstate_table->gfxclk_pstate.custom.max = 0; in smu_v13_0_reset_custom_level()
H A Dsmu_v13_0_7_ppt.c2285 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_7_populate_umd_state_clk()
2288 pstate_table->gfxclk_pstate.peak = driver_clocks.GameClockAc; in smu_v13_0_7_populate_umd_state_clk()
2290 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_7_populate_umd_state_clk()
2309 pstate_table->gfxclk_pstate.standard = driver_clocks.BaseClockAc; in smu_v13_0_7_populate_umd_state_clk()
2311 pstate_table->gfxclk_pstate.standard = in smu_v13_0_7_populate_umd_state_clk()
H A Dsmu_v13_0_0_ppt.c2283 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_0_populate_umd_state_clk()
2286 pstate_table->gfxclk_pstate.peak = driver_clocks.GameClockAc; in smu_v13_0_0_populate_umd_state_clk()
2288 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_0_populate_umd_state_clk()
2307 pstate_table->gfxclk_pstate.standard = driver_clocks.BaseClockAc; in smu_v13_0_0_populate_umd_state_clk()
2309 pstate_table->gfxclk_pstate.standard = in smu_v13_0_0_populate_umd_state_clk()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu15/
H A Dsmu_v15_0.c1189 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v15_0_set_performance_level()
1197 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v15_0_set_performance_level()
1203 sclk_min = sclk_max = pstate_table->gfxclk_pstate.peak; in smu_v15_0_set_performance_level()
1227 pstate_table->gfxclk_pstate.curr.min = sclk_min; in smu_v15_0_set_performance_level()
1228 pstate_table->gfxclk_pstate.curr.max = sclk_max; in smu_v15_0_set_performance_level()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Darcturus_ppt.c571 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in arcturus_populate_umd_state_clk()
572 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in arcturus_populate_umd_state_clk()
583 pstate_table->gfxclk_pstate.standard = in arcturus_populate_umd_state_clk()
590 pstate_table->gfxclk_pstate.standard = in arcturus_populate_umd_state_clk()
591 pstate_table->gfxclk_pstate.min; in arcturus_populate_umd_state_clk()
H A Dnavi10_ppt.c1469 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in navi10_populate_umd_state_clk()
1516 pstate_table->gfxclk_pstate.peak = sclk_freq; in navi10_populate_umd_state_clk()
1527 pstate_table->gfxclk_pstate.standard = in navi10_populate_umd_state_clk()
1534 pstate_table->gfxclk_pstate.standard = in navi10_populate_umd_state_clk()
1535 pstate_table->gfxclk_pstate.min; in navi10_populate_umd_state_clk()
H A Dsienna_cichlid_ppt.c1458 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in sienna_cichlid_populate_umd_state_clk()
1459 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in sienna_cichlid_populate_umd_state_clk()
1470 pstate_table->gfxclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK; in sienna_cichlid_populate_umd_state_clk()
1475 pstate_table->gfxclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_GFXCLK; in sienna_cichlid_populate_umd_state_clk()
1480 pstate_table->gfxclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_GFXCLK; in sienna_cichlid_populate_umd_state_clk()
H A Dsmu_v11_0.c1894 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v11_0_set_performance_level()
1899 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v11_0_set_performance_level()
1905 sclk_min = sclk_max = pstate_table->gfxclk_pstate.peak; in smu_v11_0_set_performance_level()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0.c1299 sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; in smu_v14_0_set_performance_level()
1307 sclk_min = sclk_max = pstate_table->gfxclk_pstate.min; in smu_v14_0_set_performance_level()
1313 sclk_min = sclk_max = pstate_table->gfxclk_pstate.peak; in smu_v14_0_set_performance_level()
1337 pstate_table->gfxclk_pstate.curr.min = sclk_min; in smu_v14_0_set_performance_level()
1338 pstate_table->gfxclk_pstate.curr.max = sclk_max; in smu_v14_0_set_performance_level()
H A Dsmu_v14_0_2_ppt.c1521 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v14_0_2_populate_umd_state_clk()
1524 pstate_table->gfxclk_pstate.peak = driver_clocks.GameClockAc; in smu_v14_0_2_populate_umd_state_clk()
1526 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v14_0_2_populate_umd_state_clk()
1545 pstate_table->gfxclk_pstate.standard = driver_clocks.BaseClockAc; in smu_v14_0_2_populate_umd_state_clk()
1547 pstate_table->gfxclk_pstate.standard = in smu_v14_0_2_populate_umd_state_clk()
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h562 struct pstates_clk_freq gfxclk_pstate; member
/linux/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c3139 *((uint32_t *)data) = pstate_table->gfxclk_pstate.standard * 100; in smu_read_sensor()
3147 *((uint32_t *)data) = pstate_table->gfxclk_pstate.peak * 100; in smu_read_sensor()