| /linux/drivers/cpufreq/ |
| H A D | s3c64xx-cpufreq.c | 60 struct s3c64xx_dvfs *dvfs; in s3c64xx_cpufreq_set_target() local
64 dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[index].driver_data]; in s3c64xx_cpufreq_set_target()
68 dvfs->vddarm_min, in s3c64xx_cpufreq_set_target()
69 dvfs->vddarm_max); in s3c64xx_cpufreq_set_target()
88 dvfs->vddarm_min, in s3c64xx_cpufreq_set_target()
89 dvfs->vddarm_max); in s3c64xx_cpufreq_set_target()
112 struct s3c64xx_dvfs *dvfs; in s3c64xx_cpufreq_config_regulator() local
123 dvfs = &s3c64xx_dvfs_table[freq->driver_data]; in s3c64xx_cpufreq_config_regulator()
128 if (v >= dvfs->vddarm_min && v <= dvfs->vddarm_max) in s3c64xx_cpufreq_config_regulator()
|
| /linux/drivers/memory/tegra/ |
| H A D | tegra186-emc.c | 26 struct tegra186_emc_dvfs *dvfs; member
69 if (rate == emc->dvfs[i].rate) in tegra186_emc_validate_rate()
83 seq_printf(s, "%s%lu", prefix, emc->dvfs[i].rate); in tegra186_emc_debug_available_rates_show()
182 emc->dvfs = devm_kmalloc_array(emc->dev, emc->num_dvfs, sizeof(*emc->dvfs), GFP_KERNEL); in tegra186_emc_get_emc_dvfs_latency()
183 if (!emc->dvfs) in tegra186_emc_get_emc_dvfs_latency()
189 emc->dvfs[i].rate = response.pairs[i].freq * 1000; in tegra186_emc_get_emc_dvfs_latency()
190 emc->dvfs[i].latency = response.pairs[i].latency; in tegra186_emc_get_emc_dvfs_latency()
192 if (emc->dvfs[i].rate < emc->debugfs.min_rate) in tegra186_emc_get_emc_dvfs_latency()
193 emc->debugfs.min_rate = emc->dvfs[i].rate; in tegra186_emc_get_emc_dvfs_latency()
195 if (emc->dvfs[i].rate > emc->debugfs.max_rate) in tegra186_emc_get_emc_dvfs_latency()
[all …]
|
| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | tps51632-regulator.txt | 8 - ti,enable-pwm-dvfs: Enable the DVFS voltage control through the PWM interface.
9 - ti,dvfs-step-20mV: The 20mV step voltage when PWM DVFS enabled. Missing this
25 ti,enable-pwm-dvfs;
26 ti,dvfs-step-20mV;
|
| /linux/drivers/soc/mediatek/ |
| H A D | mtk-dvfsrc.c | 84 static u32 dvfsrc_readl(struct mtk_dvfsrc *dvfs, u32 offset) in dvfsrc_readl() argument
86 return readl(dvfs->regs + dvfs->dvd->regs[offset]); in dvfsrc_readl()
89 static void dvfsrc_writel(struct mtk_dvfsrc *dvfs, u32 offset, u32 val) in dvfsrc_writel() argument
91 writel(val, dvfs->regs + dvfs->dvd->regs[offset]); in dvfsrc_writel()
|
| /linux/drivers/firmware/samsung/ |
| H A D | Makefile | 5 acpm-protocol-objs += exynos-acpm-dvfs.o
|
| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | ulcb.dtsi | 139 cpu-supply = <&dvfs>;
267 dvfs: dvfs { label
268 regulator-name = "dvfs";
|
| H A D | salvator-common.dtsi | 337 cpu-supply = <&dvfs>;
615 dvfs: dvfs { label
616 regulator-name = "dvfs";
|
| /linux/arch/arm64/boot/dts/allwinner/ |
| H A D | sun50i-a100-allwinner-perf1.dts | 115 * FIXME: update min and max before support dvfs.
|
| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6ul-var-som.dtsi | 24 reg_gpio_dvfs: reg-gpio-dvfs {
|
| /linux/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra210-p3450-0000.dts | 118 dvfs_pwm_active_state: pinmux-dvfs-pwm-active {
125 dvfs_pwm_inactive_state: pinmux-dvfs-pwm-inactive {
|
| H A D | tegra210-p2597.dtsi | 1299 dvfs_pwm_active_state: pinmux-dvfs-pwm-active {
1306 dvfs_pwm_inactive_state: pinmux-dvfs-pwm-inactive {
|
| /linux/arch/arm/boot/dts/nvidia/ |
| H A D | tegra30.dtsi | 1312 level1_trip: dvfs-alert {
1355 dvfs-alert {
|
| H A D | tegra124-apalis-v1.2.dtsi | 772 dvfs-pwm-px0 {
779 dvfs-clk-px2 {
|
| H A D | tegra124-apalis.dtsi | 769 dvfs-pwm-px0 {
776 dvfs-clk-px2 {
|
| H A D | tegra124-xiaomi-mocha.dts | 670 dvfs-pwm {
678 dvfs-clk {
|
| H A D | tegra114-asus-tf701t.dts | 710 dvfs-pin {
|
| /linux/arch/arm64/boot/dts/arm/ |
| H A D | juno-base.dtsi | 722 compatible = "arm,scpi-dvfs-clocks";
|
| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-axg.dtsi | 187 compatible = "arm,scpi-dvfs-clocks";
|
| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3308.dtsi | 868 /* reserved for ddr dvfs and system suspend/resume */
|