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Searched refs:display (Results 1 – 25 of 620) sorted by relevance

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/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_power_well.c45 static enum skl_power_gate pw_idx_to_pg(struct intel_display *display, int pw_idx) in pw_idx_to_pg() argument
47 int pw1_idx = DISPLAY_VER(display) >= 11 ? ICL_PW_CTL_IDX_PW_1 : SKL_PW_CTL_IDX_PW_1; in pw_idx_to_pg()
67 void (*sync_hw)(struct intel_display *display,
74 void (*enable)(struct intel_display *display,
80 void (*disable)(struct intel_display *display,
83 bool (*is_enabled)(struct intel_display *display,
94 lookup_power_well(struct intel_display *display, in lookup_power_well() argument
99 for_each_power_well(display, power_well) in lookup_power_well()
110 drm_WARN(display->drm, 1, in lookup_power_well()
113 return &display->power.domains.power_wells[0]; in lookup_power_well()
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H A Dintel_cdclk.c161 void (*get_cdclk)(struct intel_display *display,
163 void (*set_cdclk)(struct intel_display *display,
170 void intel_cdclk_get_cdclk(struct intel_display *display, in intel_cdclk_get_cdclk() argument
173 display->funcs.cdclk->get_cdclk(display, cdclk_config); in intel_cdclk_get_cdclk()
176 static void intel_cdclk_set_cdclk(struct intel_display *display, in intel_cdclk_set_cdclk() argument
180 display->funcs.cdclk->set_cdclk(display, cdclk_config, pipe); in intel_cdclk_set_cdclk()
185 struct intel_display *display = to_intel_display(state); in intel_cdclk_modeset_calc_cdclk() local
187 return display->funcs.cdclk->modeset_calc_cdclk(state); in intel_cdclk_modeset_calc_cdclk()
190 static u8 intel_cdclk_calc_voltage_level(struct intel_display *display, in intel_cdclk_calc_voltage_level() argument
193 return display->funcs.cdclk->calc_voltage_level(cdclk); in intel_cdclk_calc_voltage_level()
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H A Dintel_gmbus.c53 struct intel_display *display; member
154 static const struct gmbus_pin *get_gmbus_pin(struct intel_display *display, in get_gmbus_pin() argument
160 if (INTEL_PCH_TYPE(display) >= PCH_MTL) { in get_gmbus_pin()
163 } else if (INTEL_PCH_TYPE(display) >= PCH_DG2) { in get_gmbus_pin()
166 } else if (INTEL_PCH_TYPE(display) >= PCH_DG1) { in get_gmbus_pin()
169 } else if (INTEL_PCH_TYPE(display) >= PCH_ICP) { in get_gmbus_pin()
172 } else if (HAS_PCH_CNP(display)) { in get_gmbus_pin()
175 } else if (display->platform.geminilake || display->platform.broxton) { in get_gmbus_pin()
178 } else if (DISPLAY_VER(display) == 9) { in get_gmbus_pin()
181 } else if (display->platform.broadwell) { in get_gmbus_pin()
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H A Dintel_dmc.c63 struct intel_display *display; member
85 static struct intel_dmc *display_to_dmc(struct intel_display *display) in display_to_dmc() argument
87 return display->dmc.dmc; in display_to_dmc()
90 static const char *dmc_firmware_param(struct intel_display *display) in dmc_firmware_param() argument
92 const char *p = display->params.dmc_firmware_path; in dmc_firmware_param()
97 static bool dmc_firmware_param_disabled(struct intel_display *display) in dmc_firmware_param_disabled() argument
99 const char *p = dmc_firmware_param(display); in dmc_firmware_param_disabled()
186 static const char *dmc_firmware_default(struct intel_display *display, u32 *size) in dmc_firmware_default() argument
191 if (DISPLAY_VERx100(display) == 3500) { in dmc_firmware_default()
194 } else if (DISPLAY_VERx100(display) == 3002) { in dmc_firmware_default()
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H A Dintel_vrr.c36 struct intel_display *display = to_intel_display(connector); in intel_vrr_is_capable() local
40 if (!HAS_VRR(display)) in intel_vrr_is_capable()
99 static int intel_vrr_extra_vblank_delay(struct intel_display *display) in intel_vrr_extra_vblank_delay() argument
107 return DISPLAY_VER(display) < 13 ? 1 : 0; in intel_vrr_extra_vblank_delay()
110 static int intel_vrr_vmin_flipline_offset(struct intel_display *display) in intel_vrr_vmin_flipline_offset() argument
120 return DISPLAY_VER(display) < 13 ? 1 : 0; in intel_vrr_vmin_flipline_offset()
178 struct intel_display *display = to_intel_display(crtc_state); in is_cmrr_frac_required() local
183 if (!HAS_CMRR(display) || true) in is_cmrr_frac_required()
264 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_hw_value() local
270 if (DISPLAY_VER(display) >= 13) in intel_vrr_hw_value()
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H A Dvlv_dsi_regs.h14 #define _MIPI_MMIO_BASE(display) ((display)->dsi.mmio_base) argument
97 #define MIPI_DEVICE_READY(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DEVICE_R… argument
107 #define MIPI_INTR_STAT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INTR_STAT,… argument
110 #define MIPI_INTR_EN(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_INTR_EN, _MI… argument
146 #define MIPI_DSI_FUNC_PRG(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DSI_FUNC… argument
169 #define MIPI_HS_TX_TIMEOUT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_HS_TX_T… argument
174 #define MIPI_LP_RX_TIMEOUT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_LP_RX_T… argument
179 #define MIPI_TURN_AROUND_TIMEOUT(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_T… argument
184 #define MIPI_DEVICE_RESET_TIMER(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DE… argument
189 #define MIPI_DPI_RESOLUTION(display, port) _MMIO_MIPI(_MIPI_MMIO_BASE(display), port, _MIPIA_DPI_RE… argument
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H A Dintel_lpe_audio.c79 #define HAS_LPE_AUDIO(display) ((display)->audio.lpe.platdev) argument
82 lpe_audio_platdev_create(struct intel_display *display) in lpe_audio_platdev_create() argument
84 struct pci_dev *pdev = to_pci_dev(display->drm->dev); in lpe_audio_platdev_create()
100 rsc[0].start = display->audio.lpe.irq; in lpe_audio_platdev_create()
101 rsc[0].end = display->audio.lpe.irq; in lpe_audio_platdev_create()
112 pinfo.parent = display->drm->dev; in lpe_audio_platdev_create()
121 pdata->num_pipes = INTEL_NUM_PIPES(display); in lpe_audio_platdev_create()
122 pdata->num_ports = display->platform.cherryview ? 3 : 2; /* B,C,D or B,C */ in lpe_audio_platdev_create()
133 drm_err(display->drm, in lpe_audio_platdev_create()
143 static void lpe_audio_platdev_destroy(struct intel_display *display) in lpe_audio_platdev_destroy() argument
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H A Dintel_opregion.c259 struct intel_display *display; member
275 static int check_swsci_function(struct intel_display *display, u32 function) in check_swsci_function() argument
277 struct intel_opregion *opregion = display->opregion; in check_swsci_function()
307 static int swsci(struct intel_display *display, in swsci() argument
311 struct pci_dev *pdev = to_pci_dev(display->drm->dev); in swsci()
316 ret = check_swsci_function(display, function); in swsci()
320 swsci = display->opregion->swsci; in swsci()
338 drm_dbg(display->drm, "SWSCI request already in progress\n"); in swsci()
364 drm_dbg(display->drm, "SWSCI request timed out\n"); in swsci()
373 drm_dbg(display->drm, "SWSCI request error %u\n", scic); in swsci()
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H A Dintel_display.c150 skl_wa_827(struct intel_display *display, enum pipe pipe, bool enable) in skl_wa_827() argument
152 intel_de_rmw(display, CLKGATE_DIS_PSL(pipe), in skl_wa_827()
159 icl_wa_scalerclkgating(struct intel_display *display, enum pipe pipe, in icl_wa_scalerclkgating() argument
162 intel_de_rmw(display, CLKGATE_DIS_PSL(pipe), in icl_wa_scalerclkgating()
169 icl_wa_cursorclkgating(struct intel_display *display, enum pipe pipe, in icl_wa_cursorclkgating() argument
172 intel_de_rmw(display, CLKGATE_DIS_PSL(pipe), in icl_wa_cursorclkgating()
341 struct intel_display *display = to_intel_display(crtc_state); in intel_primary_crtc() local
344 return intel_crtc_for_pipe(display, joiner_primary_pipe(crtc_state)); in intel_primary_crtc()
352 struct intel_display *display = to_intel_display(old_crtc_state); in intel_wait_for_pipe_off() local
355 if (DISPLAY_VER(display) >= 4) { in intel_wait_for_pipe_off()
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H A Dintel_opregion.h37 int intel_opregion_setup(struct intel_display *display);
38 void intel_opregion_cleanup(struct intel_display *display);
40 void intel_opregion_register(struct intel_display *display);
41 void intel_opregion_unregister(struct intel_display *display);
43 void intel_opregion_resume(struct intel_display *display);
44 void intel_opregion_suspend(struct intel_display *display,
47 bool intel_opregion_asle_present(struct intel_display *display);
48 void intel_opregion_asle_intr(struct intel_display *display);
51 int intel_opregion_notify_adapter(struct intel_display *display,
53 int intel_opregion_get_panel_type(struct intel_display *display);
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H A Dintel_lvds.c87 bool intel_lvds_port_enabled(struct intel_display *display, in intel_lvds_port_enabled() argument
92 val = intel_de_read(display, lvds_reg); in intel_lvds_port_enabled()
95 if (HAS_PCH_CPT(display)) in intel_lvds_port_enabled()
106 struct intel_display *display = to_intel_display(encoder); in intel_lvds_get_hw_state() local
111 wakeref = intel_display_power_get_if_enabled(display, encoder->power_domain); in intel_lvds_get_hw_state()
115 ret = intel_lvds_port_enabled(display, lvds_encoder->reg, pipe); in intel_lvds_get_hw_state()
117 intel_display_power_put(display, encoder->power_domain, wakeref); in intel_lvds_get_hw_state()
125 struct intel_display *display = to_intel_display(encoder); in intel_lvds_get_config() local
131 tmp = intel_de_read(display, lvds_encoder->reg); in intel_lvds_get_config()
143 if (DISPLAY_VER(display) < 5) in intel_lvds_get_config()
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H A Dicl_dsi.c59 static int header_credits_available(struct intel_display *display, in header_credits_available() argument
62 return (intel_de_read(display, DSI_CMD_TXCTL(dsi_trans)) & FREE_HEADER_CREDIT_MASK) in header_credits_available()
66 static int payload_credits_available(struct intel_display *display, in payload_credits_available() argument
69 return (intel_de_read(display, DSI_CMD_TXCTL(dsi_trans)) & FREE_PLOAD_CREDIT_MASK) in payload_credits_available()
73 static bool wait_for_header_credits(struct intel_display *display, in wait_for_header_credits() argument
78 ret = poll_timeout_us(available = header_credits_available(display, dsi_trans), in wait_for_header_credits()
82 drm_err(display->drm, "DSI header credits not released\n"); in wait_for_header_credits()
89 static bool wait_for_payload_credits(struct intel_display *display, in wait_for_payload_credits() argument
94 ret = poll_timeout_us(available = payload_credits_available(display, dsi_trans), in wait_for_payload_credits()
98 drm_err(display->drm, "DSI payload credits not released\n"); in wait_for_payload_credits()
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H A Dintel_hdcp_gsc_message.c23 struct intel_display *display; in intel_hdcp_gsc_initiate_session() local
29 display = to_intel_display(dev); in intel_hdcp_gsc_initiate_session()
30 if (!display) { in intel_hdcp_gsc_initiate_session()
34 gsc_context = display->hdcp.gsc_context; in intel_hdcp_gsc_initiate_session()
47 byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, in intel_hdcp_gsc_initiate_session()
51 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); in intel_hdcp_gsc_initiate_session()
56 drm_dbg_kms(display->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n", in intel_hdcp_gsc_initiate_session()
81 struct intel_display *display; in intel_hdcp_gsc_verify_receiver_cert_prepare_km() local
87 display = to_intel_display(dev); in intel_hdcp_gsc_verify_receiver_cert_prepare_km()
88 if (!display) { in intel_hdcp_gsc_verify_receiver_cert_prepare_km()
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H A Dg4x_dp.c55 const struct dpll *vlv_get_dpll(struct intel_display *display) in vlv_get_dpll() argument
57 return display->platform.cherryview ? &chv_dpll[0] : &vlv_dpll[0]; in vlv_get_dpll()
63 struct intel_display *display = to_intel_display(encoder); in g4x_dp_set_clock() local
67 if (display->platform.g4x) { in g4x_dp_set_clock()
70 } else if (HAS_PCH_SPLIT(display)) { in g4x_dp_set_clock()
73 } else if (display->platform.cherryview) { in g4x_dp_set_clock()
76 } else if (display->platform.valleyview) { in g4x_dp_set_clock()
95 struct intel_display *display = to_intel_display(encoder); in intel_dp_prepare() local
124 intel_dp->DP = intel_de_read(display, intel_dp->output_reg) & DP_DETECTED; in intel_dp_prepare()
132 if (display->platform.ivybridge && port == PORT_A) { in intel_dp_prepare()
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H A Dintel_color.c228 struct intel_display *display = to_intel_display(crtc->base.dev); in ilk_update_pipe_csc() local
231 intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_HI(pipe), in ilk_update_pipe_csc()
233 intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_ME(pipe), in ilk_update_pipe_csc()
235 intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_LO(pipe), in ilk_update_pipe_csc()
238 intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_RY_GY(pipe), in ilk_update_pipe_csc()
240 intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_BY(pipe), in ilk_update_pipe_csc()
243 intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_RU_GU(pipe), in ilk_update_pipe_csc()
245 intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_BU(pipe), in ilk_update_pipe_csc()
248 intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_RV_GV(pipe), in ilk_update_pipe_csc()
250 intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_BV(pipe), in ilk_update_pipe_csc()
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H A Dintel_display_driver.h17 void intel_display_driver_init_hw(struct intel_display *display);
18 void intel_display_driver_early_probe(struct intel_display *display);
19 int intel_display_driver_probe_noirq(struct intel_display *display);
20 int intel_display_driver_probe_nogem(struct intel_display *display);
21 int intel_display_driver_probe(struct intel_display *display);
22 void intel_display_driver_register(struct intel_display *display);
23 void intel_display_driver_remove(struct intel_display *display);
24 void intel_display_driver_remove_noirq(struct intel_display *display);
25 void intel_display_driver_remove_nogem(struct intel_display *display);
26 void intel_display_driver_unregister(struct intel_display *display);
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H A Dintel_dbuf_bw.c31 struct intel_display *display = to_intel_display(state); in intel_atomic_get_old_dbuf_bw_state() local
34 dbuf_bw_state = intel_atomic_get_old_global_obj_state(state, &display->dbuf_bw.obj); in intel_atomic_get_old_dbuf_bw_state()
42 struct intel_display *display = to_intel_display(state); in intel_atomic_get_new_dbuf_bw_state() local
45 dbuf_bw_state = intel_atomic_get_new_global_obj_state(state, &display->dbuf_bw.obj); in intel_atomic_get_new_dbuf_bw_state()
53 struct intel_display *display = to_intel_display(state); in intel_atomic_get_dbuf_bw_state() local
56 dbuf_bw_state = intel_atomic_get_global_obj_state(state, &display->dbuf_bw.obj); in intel_atomic_get_dbuf_bw_state()
63 static bool intel_dbuf_bw_changed(struct intel_display *display, in intel_dbuf_bw_changed() argument
69 for_each_dbuf_slice(display, slice) { in intel_dbuf_bw_changed()
78 static bool intel_dbuf_bw_state_changed(struct intel_display *display, in intel_dbuf_bw_state_changed() argument
84 for_each_pipe(display, pipe) { in intel_dbuf_bw_state_changed()
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H A Dintel_encoder.c35 struct intel_display *display = to_intel_display(encoder); in intel_encoder_link_check_queue_work() local
37 mod_delayed_work(display->wq.unordered, in intel_encoder_link_check_queue_work()
41 void intel_encoder_unblock_all_hpds(struct intel_display *display) in intel_encoder_unblock_all_hpds() argument
45 if (!HAS_DISPLAY(display)) in intel_encoder_unblock_all_hpds()
48 for_each_intel_encoder(display->drm, encoder) in intel_encoder_unblock_all_hpds()
52 void intel_encoder_block_all_hpds(struct intel_display *display) in intel_encoder_block_all_hpds() argument
56 if (!HAS_DISPLAY(display)) in intel_encoder_block_all_hpds()
59 for_each_intel_encoder(display->drm, encoder) in intel_encoder_block_all_hpds()
63 void intel_encoder_suspend_all(struct intel_display *display) in intel_encoder_suspend_all() argument
67 if (!HAS_DISPLAY(display)) in intel_encoder_suspend_all()
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H A Dintel_vdsc.c26 struct intel_display *display = to_intel_display(crtc_state); in intel_dsc_source_support() local
29 if (!HAS_DSC(display)) in intel_dsc_source_support()
32 if (DISPLAY_VER(display) == 11 && cpu_transcoder == TRANSCODER_A) in intel_dsc_source_support()
43 bool intel_dsc_get_slice_config(struct intel_display *display, in intel_dsc_get_slice_config() argument
56 if (!HAS_DSC_3ENGINES(display) || pipes_per_line != 4) in intel_dsc_get_slice_config()
92 struct intel_display *display = to_intel_display(crtc); in is_pipe_dsc() local
94 if (DISPLAY_VER(display) >= 12) in is_pipe_dsc()
103 drm_WARN_ON(display->drm, crtc->pipe == PIPE_A); in is_pipe_dsc()
326 struct intel_display *display = to_intel_display(pipe_config); in intel_dsc_compute_params() local
340 drm_dbg_kms(display->drm, "Slice dimension requirements not met\n"); in intel_dsc_compute_params()
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H A Dintel_alpm.c122 struct intel_display *display = to_intel_display(intel_dp); in _lnl_compute_aux_less_alpm_params() local
139 if (display->params.psr_safest_params) in _lnl_compute_aux_less_alpm_params()
152 struct intel_display *display = to_intel_display(intel_dp); in _lnl_compute_alpm_params() local
155 if (DISPLAY_VER(display) < 20) in _lnl_compute_alpm_params()
168 if (display->params.psr_safest_params) in _lnl_compute_alpm_params()
193 struct intel_display *display = to_intel_display(crtc_state); in io_buffer_wake_time() local
195 if (DISPLAY_VER(display) >= 12) in io_buffer_wake_time()
204 struct intel_display *display = to_intel_display(intel_dp); in intel_alpm_compute_params() local
217 if (DISPLAY_VER(display) >= 20) in intel_alpm_compute_params()
219 else if (DISPLAY_VER(display) >= 12) in intel_alpm_compute_params()
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H A Dintel_tv.c918 struct intel_display *display = to_intel_display(encoder); in intel_tv_get_hw_state() local
919 u32 tmp = intel_de_read(display, TV_CTL); in intel_tv_get_hw_state()
932 struct intel_display *display = to_intel_display(encoder); in intel_enable_tv() local
937 intel_de_rmw(display, TV_CTL, 0, TV_ENC_ENABLE); in intel_enable_tv()
946 struct intel_display *display = to_intel_display(encoder); in intel_disable_tv() local
948 intel_de_rmw(display, TV_CTL, TV_ENC_ENABLE, 0); in intel_disable_tv()
962 struct intel_display *display = to_intel_display(connector->dev); in intel_tv_mode_valid() local
964 int max_dotclk = display->cdclk.max_dotclk_freq; in intel_tv_mode_valid()
967 status = intel_cpu_transcoder_mode_valid(display, mode); in intel_tv_mode_valid()
1094 struct intel_display *display = to_intel_display(encoder); in intel_tv_get_config() local
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H A Dintel_dvo.c133 struct intel_display *display = to_intel_display(connector); in intel_dvo_connector_get_hw_state() local
139 tmp = intel_de_read(display, DVO(port)); in intel_dvo_connector_get_hw_state()
150 struct intel_display *display = to_intel_display(encoder); in intel_dvo_get_hw_state() local
154 tmp = intel_de_read(display, DVO(port)); in intel_dvo_get_hw_state()
164 struct intel_display *display = to_intel_display(encoder); in intel_dvo_get_config() local
170 tmp = intel_de_read(display, DVO(port)); in intel_dvo_get_config()
190 struct intel_display *display = to_intel_display(encoder); in intel_disable_dvo() local
196 intel_de_rmw(display, DVO(port), DVO_ENABLE, 0); in intel_disable_dvo()
197 intel_de_posting_read(display, DVO(port)); in intel_disable_dvo()
205 struct intel_display *display = to_intel_display(encoder); in intel_enable_dvo() local
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/linux/drivers/gpu/drm/xe/
H A DMakefile206 -I$(srctree)/drivers/gpu/drm/i915/display/
209 $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
215 display/intel_fbdev_fb.o \
216 display/xe_display.o \
217 display/xe_display_bo.o \
218 display/xe_display_pcode.o \
219 display/xe_display_rpm.o \
220 display/xe_display_wa.o \
221 display/xe_dsb_buffer.o \
222 display/xe_fb_pin.o \
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/linux/drivers/gpu/drm/i915/
H A Di915_driver.c236 struct intel_display *display = dev_priv->display; in i915_driver_early_probe() local
247 intel_sbi_init(display); in i915_driver_early_probe()
273 intel_display_driver_early_probe(display); in i915_driver_early_probe()
297 struct intel_display *display = dev_priv->display; in i915_driver_late_release() local
300 intel_power_domains_cleanup(display); in i915_driver_late_release()
309 intel_sbi_fini(display); in i915_driver_late_release()
313 intel_display_device_remove(display); in i915_driver_late_release()
327 struct intel_display *display = dev_priv->display; in i915_driver_mmio_probe() local
350 intel_display_device_info_runtime_init(display); in i915_driver_mmio_probe()
472 struct intel_display *display = dev_priv->display; in i915_driver_hw_probe() local
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/linux/drivers/acpi/acpica/
H A Dutbuffer.c34 void acpi_ut_dump_buffer(u8 *buffer, u32 count, u32 display, u32 base_offset) in acpi_ut_dump_buffer() argument
40 u32 display_data_only = display & DB_DISPLAY_DATA_ONLY; in acpi_ut_dump_buffer()
42 display &= ~DB_DISPLAY_DATA_ONLY; in acpi_ut_dump_buffer()
49 display = DB_BYTE_DISPLAY; in acpi_ut_dump_buffer()
69 acpi_os_printf("%*s", ((display * 2) + 1), " "); in acpi_ut_dump_buffer()
70 j += display; in acpi_ut_dump_buffer()
74 switch (display) { in acpi_ut_dump_buffer()
109 j += display; in acpi_ut_dump_buffer()
170 acpi_ut_debug_dump_buffer(u8 *buffer, u32 count, u32 display, u32 component_id) in acpi_ut_debug_dump_buffer() argument
180 acpi_ut_dump_buffer(buffer, count, display, 0); in acpi_ut_debug_dump_buffer()
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