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Searched refs:csr_base_addr (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/dev/qat/include/
H A Dadf_gen4vf_hw_csr_data.h28 #define READ_CSR_RING_HEAD_GEN4VF(csr_base_addr, bank, ring) \ argument
29 ADF_CSR_RD((csr_base_addr), \
33 #define READ_CSR_RING_TAIL_GEN4VF(csr_base_addr, bank, ring) \ argument
34 ADF_CSR_RD((csr_base_addr), \
38 #define READ_CSR_E_STAT_GEN4VF(csr_base_addr, bank) \ argument
39 ADF_CSR_RD((csr_base_addr), \
43 #define WRITE_CSR_RING_CONFIG_GEN4VF(csr_base_addr, bank, ring, value) \ argument
44 ADF_CSR_WR((csr_base_addr), \
49 #define WRITE_CSR_RING_BASE_GEN4VF(csr_base_addr, bank, ring, value) \ argument
51 struct resource *_csr_base_addr = csr_base_addr; \
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/freebsd/sys/dev/qat/include/common/
H A Dadf_gen4_hw_data.h45 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
46 ADF_CSR_RD((csr_base_addr), \
49 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
50 ADF_CSR_RD((csr_base_addr), \
53 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
54 ADF_CSR_RD((csr_base_addr), \
57 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument
58 ADF_CSR_WR((csr_base_addr), \
62 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ argument
64 struct resource *_csr_base_addr = csr_base_addr; \
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H A Dadf_transport_access_macros.h79 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
80 ADF_CSR_RD(csr_base_addr, \
83 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
84 ADF_CSR_RD(csr_base_addr, \
87 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
88 ADF_CSR_RD(csr_base_addr, \
90 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument
91 ADF_CSR_WR(csr_base_addr, \
95 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ argument
100 ADF_CSR_WR(csr_base_addr, \
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H A Dadf_gen2_hw_data.h34 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
35 ADF_CSR_RD(csr_base_addr, \
38 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
39 ADF_CSR_RD(csr_base_addr, \
42 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
43 ADF_CSR_RD(csr_base_addr, \
45 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument
46 ADF_CSR_WR(csr_base_addr, \
52 read_base(struct resource *csr_base_addr, u32 bank, u32 ring) in read_base() argument
57 l_base = ADF_CSR_RD(csr_base_addr, in read_base()
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H A Dadf_accel_devices.h261 u32 (*read_csr_ring_head)(struct resource *csr_base_addr,
264 void (*write_csr_ring_head)(struct resource *csr_base_addr,
268 u32 (*read_csr_ring_tail)(struct resource *csr_base_addr,
271 void (*write_csr_ring_tail)(struct resource *csr_base_addr,
275 u32 (*read_csr_e_stat)(struct resource *csr_base_addr, u32 bank);
276 void (*write_csr_ring_config)(struct resource *csr_base_addr,
280 bus_addr_t (*read_csr_ring_base)(struct resource *csr_base_addr,
283 void (*write_csr_ring_base)(struct resource *csr_base_addr,
287 void (*write_csr_int_flag)(struct resource *csr_base_addr,
290 void (*write_csr_int_srcsel)(struct resource *csr_base_addr,
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/freebsd/sys/dev/qat/qat_common/
H A Dadf_gen2_hw_data.c13 read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_head() argument
15 return READ_CSR_RING_HEAD(csr_base_addr, bank, ring); in read_csr_ring_head()
19 write_csr_ring_head(struct resource *csr_base_addr, in write_csr_ring_head() argument
24 WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value); in write_csr_ring_head()
28 read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_tail() argument
30 return READ_CSR_RING_TAIL(csr_base_addr, bank, ring); in read_csr_ring_tail()
34 write_csr_ring_tail(struct resource *csr_base_addr, in write_csr_ring_tail() argument
39 WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value); in write_csr_ring_tail()
43 read_csr_e_stat(struct resource *csr_base_addr, u32 bank) in read_csr_e_stat() argument
45 return READ_CSR_E_STAT(csr_base_addr, bank); in read_csr_e_stat()
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H A Dadf_gen4vf_hw_csr_data.c13 read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_head() argument
15 return READ_CSR_RING_HEAD_GEN4VF(csr_base_addr, bank, ring); in read_csr_ring_head()
19 write_csr_ring_head(struct resource *csr_base_addr, in write_csr_ring_head() argument
24 WRITE_CSR_RING_HEAD_GEN4VF(csr_base_addr, bank, ring, value); in write_csr_ring_head()
28 read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_tail() argument
30 return READ_CSR_RING_TAIL_GEN4VF(csr_base_addr, bank, ring); in read_csr_ring_tail()
34 write_csr_ring_tail(struct resource *csr_base_addr, in write_csr_ring_tail() argument
39 WRITE_CSR_RING_TAIL_GEN4VF(csr_base_addr, bank, ring, value); in write_csr_ring_tail()
43 read_csr_e_stat(struct resource *csr_base_addr, u32 bank) in read_csr_e_stat() argument
45 return READ_CSR_E_STAT_GEN4VF(csr_base_addr, bank); in read_csr_e_stat()
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H A Dadf_gen4_hw_data.c17 read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_head() argument
19 return READ_CSR_RING_HEAD(csr_base_addr, bank, ring); in read_csr_ring_head()
23 write_csr_ring_head(struct resource *csr_base_addr, in write_csr_ring_head() argument
28 WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value); in write_csr_ring_head()
32 read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_tail() argument
34 return READ_CSR_RING_TAIL(csr_base_addr, bank, ring); in read_csr_ring_tail()
38 write_csr_ring_tail(struct resource *csr_base_addr, in write_csr_ring_tail() argument
43 WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value); in write_csr_ring_tail()
47 read_csr_e_stat(struct resource *csr_base_addr, u32 bank) in read_csr_e_stat() argument
49 return READ_CSR_E_STAT(csr_base_addr, bank); in read_csr_e_stat()
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/freebsd/sys/dev/qat/qat_hw/qat_c4xxx/
H A Dadf_c4xxx_inline.h158 #define ADF_C4XXX_WR_ICI_BB_FCHTHRESH(csr_base_addr, index, value) \ argument
159 ADF_CSR_WR(csr_base_addr, \
164 #define ADF_C4XXX_WR_ICE_BB_FCHTHRESH(csr_base_addr, index, value) \ argument
165 ADF_CSR_WR(csr_base_addr, \
179 #define ADF_C4XXX_WR_ICI_BB_FCLTHRESH(csr_base_addr, index, value) \ argument
180 ADF_CSR_WR(csr_base_addr, \
185 #define ADF_C4XXX_WR_ICE_BB_FCLTHRESH(csr_base_addr, index, value) \ argument
186 ADF_CSR_WR(csr_base_addr, \
243 #define ADF_C4XXX_WR_CSR_ICI_Q2MEMAP(csr_base_addr, index, value) \ argument
244 ADF_CSR_WR(csr_base_addr, \
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