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Searched refs:SME (Results 1 – 18 of 18) sorted by relevance

/linux/Documentation/arch/arm64/
H A Dsme.rst6 order to support use of the ARM Scalable Matrix Extension (SME).
11 included in SME.
13 This document does not aim to describe the SME architecture or programmer's
15 model features for SME is included in Appendix A.
24 * The presence of SME is reported to userspace via HWCAP2_SME in the aux vector
25 AT_HWCAP2 entry. Presence of this flag implies the presence of the SME
27 described in this document. SME is reported in /proc/cpuinfo as "sme".
34 * Support for the execution of SME instructions in userspace can also be
36 instruction, and checking that the value of the SME field is nonzero. [3]
42 * There are a number of optional SME features, presence of these is reported
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H A Delf_hwcaps.rst309 Functionality implied by ID_AA64PFR1_EL1.SME == 0b0001, as described
/linux/arch/arm64/tools/
H A Dcpucaps80 SME
/linux/Documentation/admin-guide/kdump/
H A Dvmcoreinfo.rst389 AMD-specific with SME support: it indicates the secure memory encryption
391 encrypted. If SME is enabled in the first kernel, the crash kernel's
393 mask. This is used to remove the SME mask and obtain the true physical
397 additional SME-relevant info can be placed in that variable.
401 [ misc ][ enc bit ][ other misc SME info ]
/linux/drivers/sbus/char/
H A DKconfig47 Kernel support for temperature and fan monitoring on Sun SME
/linux/tools/perf/Documentation/
H A Dperf-arm-spe.txt180 bit 17 - Partial or empty SME or SVE predicate (FEAT_SPEv1p1)
181 bit 18 - Empty SME or SVE predicate (FEAT_SPEv1p1)
201 their related feature is not present (e.g. SME). For example, if FEAT_SPEv1p2 is
/linux/drivers/i2c/busses/
H A Di2c-rcar.c95 #define SME BIT(0) /* SCL Mask Enable */ macro
248 u32 icccr2 = CDFD | HLSE | SME; in rcar_i2c_init()
/linux/arch/sh/boards/
H A DKconfig153 SME product line.
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dpkvm.c152 if (kvm_has_feat(kvm, ID_AA64PFR1_EL1, SME, IMP)) in pkvm_check_pvm_cpu_features()
/linux/arch/arm64/kernel/
H A Dcpufeature.c2960 ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, SME, IMP)
2977 ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, SME, SME2)
3322 HWCAP_CAP(ID_AA64PFR1_EL1, SME, IMP, CAP_HWCAP, KERNEL_HWCAP_SME),
/linux/arch/arm64/kvm/
H A Dconfig.c148 #define FEAT_SME ID_AA64PFR1_EL1, SME, IMP
H A Dsys_regs.c1948 if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SME, IMP)) in sme_visibility()
/linux/arch/x86/kvm/
H A Dcpuid.c1194 VENDOR_F(SME), in kvm_set_cpu_caps()
/linux/Documentation/virt/hyperv/
H A Dcoco.rst25 * AMD processor with SEV-SNP. Hyper-V does not run guest VMs with AMD SME,
/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv955 # AMD encrypted memory capabilities enumeration (SME/SEV)
/linux/arch/x86/
H A DKconfig1496 bool "AMD Secure Memory Encryption (SME) support"
1509 Encryption (SME).
/linux/arch/arm64/
H A DKconfig2266 The Scalable Matrix Extension (SME) is an extension to the AArch64
/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt3945 mem_encrypt= [X86-64] AMD Secure Memory Encryption (SME) control
3948 mem_encrypt=on: Activate SME
3949 mem_encrypt=off: Do not activate SME