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Searched refs:SME (Results 1 – 15 of 15) sorted by relevance

/linux/Documentation/arch/arm64/
H A Dsme.rst6 order to support use of the ARM Scalable Matrix Extension (SME).
11 included in SME.
13 This document does not aim to describe the SME architecture or programmer's
15 model features for SME is included in Appendix A.
24 * The presence of SME is reported to userspace via HWCAP2_SME in the aux vector
25 AT_HWCAP2 entry. Presence of this flag implies the presence of the SME
27 described in this document. SME is reported in /proc/cpuinfo as "sme".
34 * Support for the execution of SME instructions in userspace can also be
36 instruction, and checking that the value of the SME field is nonzero. [3]
42 * There are a number of optional SME features, presence of these is reported
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/linux/drivers/sbus/char/
H A DKconfig47 Kernel support for temperature and fan monitoring on Sun SME
/linux/tools/perf/Documentation/
H A Dperf-arm-spe.txt179 bit 17 - Partial or empty SME or SVE predicate (FEAT_SPEv1p1)
180 bit 18 - Empty SME or SVE predicate (FEAT_SPEv1p1)
200 their related feature is not present (e.g. SME). For example, if FEAT_SPEv1p2 is
/linux/drivers/i2c/busses/
H A Di2c-rcar.c95 #define SME BIT(0) /* SCL Mask Enable */ macro
248 u32 icccr2 = CDFD | HLSE | SME; in rcar_i2c_init()
/linux/arch/sh/boards/
H A DKconfig153 SME product line.
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dpkvm.c153 /* No SME support in KVM right now. Check to catch if it changes. */ in pkvm_check_pvm_cpu_features()
154 if (kvm_has_feat(kvm, ID_AA64PFR1_EL1, SME, IMP)) in pkvm_check_pvm_cpu_features()
/linux/arch/arm64/kernel/
H A Dcpufeature.c2987 ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, SME, IMP)
2989 /* FA64 should be sorted after the base SME capability */
3004 ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, SME, SME2)
3379 HWCAP_CAP(ID_AA64PFR1_EL1, SME, IMP, CAP_HWCAP, KERNEL_HWCAP_SME),
3751 pr_crit("CPU%d: SME: vector length support mismatch\n", in verify_hyp_capabilities()
/linux/arch/arm64/
H A DKconfig1145 bool "C1-Pro: 4193714: SME DVMSync early acknowledgement"
1150 the SME memory accesses are complete. This will cause TLB
1151 maintenance for processes using SME to also issue an IPI to
2317 The Scalable Matrix Extension (SME) is an extension to the AArch64
/linux/arch/arm64/kvm/
H A Dconfig.c152 #define FEAT_SME ID_AA64PFR1_EL1, SME, IMP
H A Dsys_regs.c2031 if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SME, IMP)) in sme_visibility()
3074 * These registers are now trapped as collateral damage from SME, and what
/linux/arch/x86/kvm/
H A Dcpuid.c1222 VENDOR_F(SME), in kvm_initialize_cpu_caps()
/linux/Documentation/virt/hyperv/
H A Dcoco.rst25 * AMD processor with SEV-SNP. Hyper-V does not run guest VMs with AMD SME,
/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv978 # AMD encrypted memory capabilities (SME/SEV)
/linux/arch/x86/
H A DKconfig1489 bool "AMD Secure Memory Encryption (SME) support"
1502 Encryption (SME).
/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt3990 mem_encrypt= [X86-64] AMD Secure Memory Encryption (SME) control
3993 mem_encrypt=on: Activate SME
3994 mem_encrypt=off: Do not activate SME