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Searched refs:SDRAM (Results 1 – 25 of 33) sorted by relevance

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/linux/arch/arm/mach-pxa/
H A Dsleep.S55 @ prepare SDRAM refresh settings
59 @ enable SDRAM self-refresh mode
96 @ prepare SDRAM refresh settings
100 @ enable SDRAM self-refresh mode
107 @ We keep the change-down close to the actual suspend on SDRAM
160 @ external accesses after SDRAM is put in self-refresh mode
166 @ put SDRAM into self-refresh
/linux/Documentation/driver-api/memory-devices/
H A Dti-emif.rst4 TI EMIF SDRAM Controller Driver
29 SoCs. EMIF is an SDRAM controller that, based on its revision,
30 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
/linux/Documentation/devicetree/bindings/arm/omap/
H A Ddmm.txt4 SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
5 accesses such as priority generation amongst initiators, configuration of SDRAM
/linux/Documentation/devicetree/bindings/memory-controllers/ti/
H A Demif.txt1 * EMIF family of TI SDRAM controllers
3 EMIF - External Memory Interface - is an SDRAM controller used in
57 has capability for generating SDRAM temperature alerts
/linux/drivers/video/fbdev/omap/
H A DKconfig42 bool "Set DMA SDRAM access priority high"
46 (SDRAM) this will speed up graphics DMA operations.
/linux/arch/arm/mach-lpc32xx/
H A Dsuspend.S50 @ Wait for SDRAM busy status to go busy and then idle
/linux/Documentation/arch/arm/stm32/
H A Dstm32f429-overview.rst13 - External memory support through FMC controller (PSRAM, SDRAM, NOR, NAND)
/linux/arch/arm/mach-omap1/
H A Dsleep.S86 @ prepare to put SDRAM into self-refresh manually
156 @ Prepare to put SDRAM into self-refresh manually
/linux/Documentation/admin-guide/perf/
H A Dalibaba_pmu.rst47 satisfying the SDRAM protocol timing requirements, transaction priorities, and
50 to and from the SDRAM. The driveway PMUs have hardware logic to gather
/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-welltech-epbx100.dts17 /* 64 MB SDRAM */
H A Dintel-ixp42x-gateway-7001.dts19 /* 32 MB SDRAM */
H A Dintel-ixp42x-adi-coyote.dts20 /* CHECKME: 16 MB SDRAM minimum, maybe the Coyote actually has more */
H A Dintel-ixp42x-iomega-nas100d.dts18 /* 64 MB SDRAM */
H A Dintel-ixp42x-netgear-wg302v1.dts20 /* 32 MB SDRAM according to boot arguments */
H A Dintel-ixp42x-ixdpg425.dts27 /* 32 MB SDRAM */
H A Dintel-ixp42x-dlink-dsm-g600.dts23 /* 64 MB SDRAM */
H A Dintel-ixp42x-linksys-nslu2.dts18 /* 32 MB SDRAM */
H A Dintel-ixp42x-arcom-vulcan.dts65 /* 256 KB SDRAM memory at CS2 */
H A Dintel-ixp43x-gateworks-gw2358.dts17 /* 128 MB SDRAM */
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca9.dts245 /* DDR2 SDRAM and Test Chip DDR2 I/O supply */
254 /* DDR2 SDRAM VTT termination voltage */
/linux/drivers/video/fbdev/aty/
H A Dmach64_ct.c354 else if (par->ram_type >= SDRAM) in aty_set_pll_ct()
469 case SDRAM: in aty_init_pll_ct()
557 if (M64_HAS(SDRAM_MAGIC_PLL) && (par->ram_type >= SDRAM)) in aty_init_pll_ct()
/linux/Documentation/fb/
H A Dmatroxfb.rst171 - 0 -> 2x512Kx16 SDRAM, 16/32MB
175 - 3 -> 4x512Kx32 SDRAM, 32MB
177 - 5 -> 2x1Mx32 SDRAM, 32MB
192 sdram tells to driver that you have Gxx0 with SDRAM memory.
316 - Gxx0 SGRAM/SDRAM is not autodetected.
H A Dep93xx-fb.rst135 In some cases it may be possible to reconfigure your SDRAM layout to
/linux/arch/arm/boot/dts/gemini/
H A Dgemini-dlink-dns-313.dts19 /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */
/linux/Documentation/driver-api/media/drivers/
H A Dcx2341x-devel.rst101 - 0x07F8: Encoder SDRAM refresh
102 - 0x07FC: Encoder SDRAM pre-charge
109 - 0x08F8: Decoder SDRAM refresh
110 - 0x08FC: Decoder SDRAM pre-charge
194 - Write 0x0000001A to register 0x07FC to init the Encoder SDRAM's pre-charge.
195 - Write 0x80000640 to register 0x07F8 to init the Encoder SDRAM's refresh to 1us.
196 - Write 0x0000001A to register 0x08FC to init the Decoder SDRAM's pre-charge.
197 - Write 0x80000640 to register 0x08F8 to init the Decoder SDRAM's refresh to 1us.

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