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Searched refs:PIPE_C (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dskl_watermark.c779 .active_pipes = BIT(PIPE_C),
781 [PIPE_C] = BIT(DBUF_S2),
785 .active_pipes = BIT(PIPE_A) | BIT(PIPE_C),
788 [PIPE_C] = BIT(DBUF_S2),
792 .active_pipes = BIT(PIPE_B) | BIT(PIPE_C),
795 [PIPE_C] = BIT(DBUF_S2),
799 .active_pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
803 [PIPE_C] = BIT(DBUF_S2),
842 .active_pipes = BIT(PIPE_C),
844 [PIPE_C] = BIT(DBUF_S2) | BIT(DBUF_S1),
[all …]
H A Dintel_display_device.c183 [PIPE_C] = CHV_CURSOR_C_OFFSET, \
190 [PIPE_C] = IVB_CURSOR_C_OFFSET, \
197 [PIPE_C] = IVB_CURSOR_C_OFFSET, \
504 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
581 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
634 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
654 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
678 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
828 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
903 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
[all …]
H A Dintel_display_limits.h19 PIPE_C, enumerator
36 TRANSCODER_C = PIPE_C,
H A Dintel_display_power_map.c150 .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
394 .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
473 .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
576 .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
789 .irq_pipe_mask = BIT(PIPE_C),
940 .irq_pipe_mask = BIT(PIPE_C),
1083 .irq_pipe_mask = BIT(PIPE_C),
1178 .irq_pipe_mask = BIT(PIPE_C),
1352 .irq_pipe_mask = BIT(PIPE_C),
1509 .irq_pipe_mask = BIT(PIPE_C),
[all …]
H A Dintel_dmc.c486 for (pipe = PIPE_C; pipe <= PIPE_D; pipe++) in adlp_pipedmc_clock_gating_wa()
726 return pipe >= PIPE_C; in need_pipedmc_load_mmio()
759 return pipe >= PIPE_C; in need_pipedmc_load_mmio()
933 PIPE_C_DMC_W2_PTS_CONFIG_SELECT(PIPE_C) | in intel_dmc_load_program()
H A Dintel_display_irq.c568 case PIPE_C: in i9xx_pipestat_irq_ack()
734 case PIPE_C: in ivb_err_int_pipe_fault_mask()
1357 pipe = PIPE_C; in gen11_dsi_te_interrupt_handler()
1837 case PIPE_C: in vlv_dpinvgtt_pipe_fault_mask()
H A Dicl_dsi.c839 case PIPE_C: in gen11_dsi_configure_transcoder()
1747 *pipe = PIPE_C; in gen11_dsi_get_hw_state()
H A Dintel_display_power_well.c1542 assert_pll_disabled(display, PIPE_C); in chv_dpio_cmn_power_well_disable()
H A Dintel_display.c2738 (pipe == PIPE_B || pipe == PIPE_C)) in intel_set_transcoder_timings()
3472 pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D); in joiner_pipes()
3474 pipes = BIT(PIPE_B) | BIT(PIPE_C); in joiner_pipes()
3793 trans_pipe = PIPE_C; in hsw_enabled_transcoders()
H A Dvlv_dsi.c992 if (drm_WARN_ON(display->drm, tmp > PIPE_C)) in intel_dsi_get_hw_state()
/linux/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c914 calc_index(offset, FDI_RX_CTL(PIPE_A), FDI_RX_CTL(PIPE_B), FDI_RX_CTL(PIPE_C))
917 calc_index(offset, FDI_TX_CTL(PIPE_A), FDI_TX_CTL(PIPE_B), FDI_TX_CTL(PIPE_C))
920 calc_index(offset, FDI_RX_IMR(PIPE_A), FDI_RX_IMR(PIPE_B), FDI_RX_IMR(PIPE_C))
1028 calc_index(offset, DSPSURF(display, PIPE_A), DSPSURF(display, PIPE_B), DSPSURF(display, PIPE_C))
1052 calc_index(offset, SPRSURF(PIPE_A), SPRSURF(PIPE_B), SPRSURF(PIPE_C))
2314 MMIO_DH(DSPSURF(display, PIPE_C), D_ALL, NULL, pri_surf_mmio_write); in init_generic_mmio_info()
2315 MMIO_DH(REG_50080(PIPE_C, PLANE_PRIMARY), D_ALL, NULL, in init_generic_mmio_info()
2323 MMIO_DH(SPRSURF(PIPE_C), D_ALL, NULL, spr_surf_mmio_write); in init_generic_mmio_info()
2324 MMIO_DH(REG_50080(PIPE_C, PLANE_SPRITE0), D_ALL, NULL, in init_generic_mmio_info()
2345 MMIO_DH(FDI_RX_IIR(PIPE_C), D_ALL, NULL, fdi_rx_iir_mmio_write); in init_generic_mmio_info()
[all …]
H A Dreg.h72 (((p) == PIPE_C) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x5008C)) : \
80 (((reg) == 0x5008C || (reg) == 0x5009C) ? (PIPE_C) : \
H A Ddisplay.c67 pipe = PIPE_C; in get_edp_pipe()
646 [PIPE_C] = PIPE_C_VBLANK, in emulate_vblank_on_pipe()
650 if (pipe < PIPE_A || pipe > PIPE_C) in emulate_vblank_on_pipe()
H A Dcmd_parser.c1301 [4] = {PIPE_C, PLANE_A, PRIMARY_C_FLIP_DONE}, in gen8_decode_mi_display_flip()
1302 [5] = {PIPE_C, PLANE_B, SPRITE_C_FLIP_DONE}, in gen8_decode_mi_display_flip()
1361 info->pipe = PIPE_C; in skl_decode_mi_display_flip()
1376 info->pipe = PIPE_C; in skl_decode_mi_display_flip()