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Searched refs:MPLL_SS2 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Drv740d.h113 #define MPLL_SS2 0x860 macro
H A Drv740_dpm.c314 pi->clk_regs.rv770.mpll_ss2 = RREG32(MPLL_SS2); in rv740_read_clock_registers()
H A Dnid.h690 #define MPLL_SS2 0x860 macro
H A Dsid.h633 #define MPLL_SS2 0x2bd0 macro
H A Dcikd.h756 #define MPLL_SS2 0x2bd0 macro
H A Devergreend.h228 #define MPLL_SS2 0x860 macro
H A Dni_dpm.c1196 ni_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in ni_read_clock_registers()
H A Dci_dpm.c1852 pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in ci_read_clock_registers()
H A Dsi_dpm.c3522 si_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); in si_read_clock_registers()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h634 #define MPLL_SS2 0xAF4 macro
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c1141 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); in iceland_calculate_mclk_params()
H A Dci_smumgr.c1093 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); in ci_calculate_mclk_params()
H A Dtonga_smumgr.c893 mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); in tonga_calculate_mclk_params()