/linux/drivers/gpu/drm/i915/gt/ |
H A D | intel_workarounds.c | 918 else if (IS_DG2(i915)) in __intel_engine_init_ctx_wa() 977 IS_DG2(rq->i915)) && rq->engine->class == RENDER_CLASS) in intel_engine_emit_ctx_wa() 1013 IS_DG2(rq->i915)) && rq->engine->class == RENDER_CLASS) { in intel_engine_emit_ctx_wa() 1382 if (IS_DG2(gt->i915)) in xehp_init_mcr() 1638 if (IS_DG2(gt->i915)) { in gt_tuning_settings() 1662 else if (IS_DG2(i915)) in gt_init_workarounds() 2107 else if (IS_DG2(i915)) in intel_engine_init_whitelist() 2215 IS_DG2(i915)) { in rcs_engine_wa_init() 2222 IS_DG2(i915)) { in rcs_engine_wa_init() 2228 if (IS_DG2(i915)) { in rcs_engine_wa_init() [all …]
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H A D | intel_gt_mcr.c | 155 } else if (IS_DG2(i915)) { in intel_gt_mcr_init() 619 *group = IS_DG2(gt->i915) ? 1 : 0; in get_nonterminated_steering()
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H A D | gen8_engine_cs.c | 227 IS_DG2(rq->i915)) { in mtl_dummy_pipe_control() 828 if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) || IS_DG2(i915)) in gen12_emit_fini_breadcrumb_rcs()
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H A D | intel_gsc.c | 178 } else if (IS_DG2(i915)) { in gsc_init_one()
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H A D | intel_mocs.c | 467 } else if (IS_DG2(i915)) { in get_mocs_settings()
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H A D | intel_reset.c | 649 if (IS_DG2(gt->i915) && engine_mask == ALL_ENGINES) in gen8_reset_engines()
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H A D | intel_engine_cs.c | 887 if (IS_DG2(gt->i915)) { in init_engine_mask()
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/linux/drivers/gpu/drm/xe/compat-i915-headers/ |
H A D | i915_drv.h | 66 #define IS_DG2(dev_priv) IS_PLATFORM(dev_priv, XE_DG2) macro
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/linux/drivers/gpu/drm/i915/gt/uc/ |
H A D | intel_huc.c | 309 if (IS_DG2(i915)) { in intel_huc_init_early() 357 if (IS_DG2(gt->i915)) { in check_huc_loading_mode()
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H A D | intel_guc.c | 302 IS_DG2(gt->i915)) in guc_ctl_wa_flags() 317 if (IS_DG2(gt->i915)) in guc_ctl_wa_flags()
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H A D | intel_guc_ads.c | 863 IS_DG2(gt->i915))) in guc_waklv_init()
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/linux/drivers/gpu/drm/i915/ |
H A D | i915_hwmon.c | 303 if (IS_DG1(i915) || IS_DG2(i915)) in hwm_pcode_read_i1() 354 return IS_DG1(i915) || IS_DG2(i915) ? 0444 : 0; in hwm_in_is_visible() 850 if (IS_DG1(i915) || IS_DG2(i915)) { in hwm_get_preregistration_info()
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H A D | i915_drv.h | 527 #define IS_DG2(i915) IS_PLATFORM(i915, INTEL_DG2) macro
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H A D | i915_perf.c | 2867 if (IS_DG2(i915)) { in gen12_enable_metric_set() 2946 if (IS_DG2(i915)) { in gen12_disable_metric_set() 3194 if (IS_DG2(i915) || IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) { in i915_perf_oa_timestamp_frequency()
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H A D | i915_driver.c | 432 if (IS_DG2(i915)) { in i915_enable_g8()
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/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_cdclk.c | 1668 if (IS_DG2(dev_priv)) in bxt_de_pll_readout() 2064 IS_DG2(dev_priv)) && in pll_enable_wa_needed() 2147 if (DISPLAY_VER(display) >= 14 || IS_DG2(dev_priv)) in bxt_set_cdclk() 2189 else if (DISPLAY_VER(display) >= 11 && !IS_DG2(dev_priv)) in bxt_set_cdclk() 2498 if (!IS_DG2(i915)) in intel_pcode_notify() 2697 if (IS_DG2(i915)) in intel_set_cdclk_pre_plane_update() 2750 if (IS_DG2(i915)) in intel_set_cdclk_post_plane_update() 3245 return cdclk_changed || (IS_DG2(i915) && power_well_cnt_changed); in intel_cdclk_need_serialize() 3760 } else if (IS_DG2(dev_priv)) { in intel_init_cdclk_hooks()
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H A D | intel_dmc.c | 186 } else if (IS_DG2(i915)) { in dmc_firmware_default()
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H A D | intel_ddi_buf_trans.c | 1719 } else if (IS_DG2(i915)) { in intel_ddi_buf_trans_init()
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H A D | intel_bw.c | 750 else if (IS_DG2(dev_priv)) in intel_bw_init_hw()
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H A D | intel_ddi.c | 221 } else if (IS_DG2(dev_priv)) { in intel_wait_ddi_buf_active() 5246 } else if (IS_DG2(dev_priv)) { in intel_ddi_init() 5308 } else if (IS_DG2(dev_priv)) { in intel_ddi_init()
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H A D | intel_fbc.c | 912 if (DISPLAY_VER(display) >= 11 && !IS_DG2(i915)) in intel_fbc_program_workarounds()
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H A D | intel_snps_phy.c | 2009 if (!IS_DG2(i915)) in intel_mpllb_state_verify()
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H A D | skl_watermark.c | 1372 if (IS_DG2(i915)) in skl_compute_dbuf_slices() 3249 int mult = IS_DG2(i915) ? 2 : 1; in skl_read_wm_latency()
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H A D | intel_dpll.c | 1809 else if (IS_DG2(dev_priv)) in intel_dpll_init_clock_hook()
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H A D | intel_display.c | 864 if (IS_DG2(dev_priv)) in icl_set_pipe_chicken() 870 if (IS_DG2(dev_priv)) in icl_set_pipe_chicken() 2043 return IS_DG2(dev_priv) && phy > PHY_NONE && phy <= PHY_E; in intel_phy_is_snps()
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