/linux/drivers/gpu/drm/radeon/ |
H A D | ni.c | 1069 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init() 1070 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init() 1089 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init() 1090 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init() 1098 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init() 1099 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init()
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H A D | evergreen.c | 3464 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init() 3465 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init() 3485 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init() 3486 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init() 3494 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in evergreen_gpu_init() 3495 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in evergreen_gpu_init()
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H A D | nid.h | 298 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
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H A D | sid.h | 1003 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
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H A D | cikd.h | 1632 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
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H A D | evergreend.h | 415 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
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H A D | si.c | 2930 u32 data = INSTANCE_BROADCAST_WRITES; in si_select_se_sh()
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H A D | cik.c | 3029 u32 data = INSTANCE_BROADCAST_WRITES; in cik_select_se_sh()
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/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_amdkfd_gfx_v12.c | 175 INSTANCE_BROADCAST_WRITES, 1); in wave_control_execute_v12()
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H A D | imu_v12_0.c | 291 REG_GET_FIELD(data, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES) << 20 | in imu_v12_0_grbm_gfx_index_remap()
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H A D | amdgpu_amdkfd_gfx_v8.c | 554 INSTANCE_BROADCAST_WRITES, 1); in kgd_wave_control_execute()
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H A D | amdgpu_amdkfd_gfx_v10_3.c | 601 INSTANCE_BROADCAST_WRITES, 1); in wave_control_execute_v10_3()
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H A D | amdgpu_amdkfd_gfx_v11.c | 586 INSTANCE_BROADCAST_WRITES, 1); in wave_control_execute_v11()
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H A D | amdgpu_amdkfd_gfx_v10.c | 689 INSTANCE_BROADCAST_WRITES, 1); in kgd_wave_control_execute()
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H A D | gfx_v9_4.c | 100 INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_4_select_se_sh()
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H A D | amdgpu_amdkfd_gfx_v9.c | 639 INSTANCE_BROADCAST_WRITES, 1); in kgd_gfx_v9_wave_control_execute()
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H A D | sid.h | 1001 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
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H A D | gfx_v9_4_2.c | 854 INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_4_2_select_se_sh()
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H A D | gfx_v7_0.c | 1556 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v7_0_select_se_sh()
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H A D | gfx_v12_0.c | 1554 INSTANCE_BROADCAST_WRITES, 1); in gfx_v12_0_select_se_sh()
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H A D | gfx_v8_0.c | 3400 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
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H A D | gfx_v11_0.c | 1829 INSTANCE_BROADCAST_WRITES, 1); in gfx_v11_0_select_se_sh()
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H A D | gfx_v9_0.c | 2472 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_0_select_se_sh()
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H A D | gfx_v10_0.c | 4932 INSTANCE_BROADCAST_WRITES, 1); in gfx_v10_0_select_se_sh()
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