Home
last modified time | relevance | path

Searched refs:CLK_CAN0 (Results 1 – 18 of 18) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmicrochip,mpfs-clock.h28 #define CLK_CAN0 17 macro
H A Drockchip,rk3506-cru.h145 #define CLK_CAN0 132 macro
H A Dspacemit,k1-syscon.h139 #define CLK_CAN0 50 macro
H A Drockchip,rv1126b-cru.h99 #define CLK_CAN0 86 macro
H A Drockchip,rk3528-cru.h251 #define CLK_CAN0 239 macro
H A Drockchip,rk3576-cru.h118 #define CLK_CAN0 100 macro
H A Drockchip,rk3588-cru.h117 #define CLK_CAN0 102 macro
H A Drk3568-cru.h385 #define CLK_CAN0 321 macro
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568.dtsi308 clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>;
/linux/drivers/clk/microchip/
H A Dclk-mpfs.c433 CLK_PERIPH(CLK_CAN0, "clk_periph_can0", PARENT_CLK(AHB), 14, 0),
/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi425 clocks = <&clkcfg CLK_CAN0>, <&clkcfg CLK_MSSPLL3>;
/linux/drivers/clk/rockchip/
H A Dclk-rk3506.c490 COMPOSITE(CLK_CAN0, "clk_can0", clk_can_parents_p, 0,
H A Dclk-rk3528.c695 COMPOSITE(CLK_CAN0, "clk_can0", mux_gpll_cpll_p, 0,
H A Dclk-rv1126b.c439 COMPOSITE(CLK_CAN0, "clk_can0", mux_gpll_cpll_24m_p, 0,
H A Dclk-rk3568.c1321 COMPOSITE(CLK_CAN0, "clk_can0", gpll_cpll_p, 0,
H A Dclk-rk3576.c573 COMPOSITE(CLK_CAN0, "clk_can0", gpll_cpll_24m_p, 0,
H A Dclk-rk3588.c1057 COMPOSITE(CLK_CAN0, "clk_can0", gpll_cpll_p, 0,
/linux/drivers/clk/spacemit/
H A Dccu-k1.c861 [CLK_CAN0] = &can0_clk.common.hw,