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Searched refs:uart_setreg (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/dev/uart/
H A Duart_dev_ns8250.c141 uart_setreg(bas, REG_LCR, lcr | LCR_DLAB); in ns8250_get_divisor()
145 uart_setreg(bas, REG_LCR, lcr); in ns8250_get_divisor()
257 uart_setreg(bas, REG_FCR, fcr); in ns8250_flush()
307 uart_setreg(bas, REG_LCR, lcr | LCR_DLAB); in ns8250_param()
309 uart_setreg(bas, REG_DLL, divisor & 0xff); in ns8250_param()
310 uart_setreg(bas, REG_DLH, (divisor >> 8) & 0xff); in ns8250_param()
315 uart_setreg(bas, REG_LCR, lcr); in ns8250_param()
374 uart_setreg(bas, REG_IER, ier); in ns8250_init()
402 uart_setreg(bas, REG_FCR, 0); in ns8250_init()
406 uart_setreg(bas, REG_MCR, MCR_IE | MCR_RTS | MCR_DTR); in ns8250_init()
[all …]
H A Duart_dev_mvebu.c176 uart_setreg(bas, UART_CTRL, ctrl | CTRL_TX_FIFO_RST | CTRL_RX_FIFO_RST | in uart_mvebu_param()
206 uart_setreg(bas, UART_CCR, ccr | divisor); in uart_mvebu_param()
214 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_param()
228 uart_setreg(bas, UART_CTRL, uart_getreg(bas, UART_CTRL) & in uart_mvebu_init()
240 uart_setreg(bas, UART_TSH, c & 0xff); in uart_mvebu_putc()
338 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_bus_attach()
365 uart_setreg(bas, UART_CTRL, ctrl | CTRL_RX_FIFO_RST); in uart_mvebu_bus_flush()
370 uart_setreg(bas, UART_CTRL, ctrl | CTRL_TX_FIFO_RST); in uart_mvebu_bus_flush()
381 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_bus_flush()
412 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_bus_ioctl()
[all …]
H A Duart_dev_msm.c121 uart_setreg(bas, UART_DM_MR2, ulcon); in msm_uart_param()
162 uart_setreg(bas, UART_DM_MR1, 0x0); in msm_init()
165 uart_setreg(bas, UART_DM_IMR, 0); in msm_init()
172 uart_setreg(bas, UART_DM_TFWR, UART_DM_TFW_VALUE); in msm_init()
175 uart_setreg(bas, UART_DM_RFWR, UART_DM_RFW_VALUE); in msm_init()
181 uart_setreg(bas, UART_DM_IPR, UART_DM_STALE_TIMEOUT_LSB); in msm_init()
184 uart_setreg(bas, UART_DM_IRDA, 0x0); in msm_init()
191 uart_setreg(bas, UART_DM_HCR, 0x0); in msm_init()
201 uart_setreg(bas, UART_DM_DMEN, UART_DM_DMEN_RX_SC_ENABLE); in msm_init()
204 uart_setreg(bas, UART_DM_CR, UART_DM_CR_RX_ENABLE); in msm_init()
[all …]
H A Duart_dev_ti8250.c82 uart_setreg(&sc->sc_bas, MDR1_REG, MDR1_MODE_DISABLE); in ti8250_bus_probe()
83 uart_setreg(&sc->sc_bas, SYSCC_REG, SYSCC_SOFTRESET); in ti8250_bus_probe()
86 uart_setreg(&sc->sc_bas, MDR1_REG, MDR1_MODE_UART); in ti8250_bus_probe()
H A Duart.h81 uart_setreg(struct uart_bas *bas, int reg, uint32_t value) in uart_setreg() function
/freebsd/sys/arm/freescale/vybrid/
H A Dvf_uart.c159 uart_setreg(bas, UART_D, c); in vf_uart_putc()
212 uart_setreg(bas, UART_MODEM, 0x00); in uart_reinit()
220 uart_setreg(bas, UART_C2, 0x00); in uart_reinit()
222 uart_setreg(bas, UART_C1, 0x00); in uart_reinit()
230 uart_setreg(bas, UART_BDH, reg); in uart_reinit()
233 uart_setreg(bas, UART_BDL, reg); in uart_reinit()
238 uart_setreg(bas, UART_C4, reg); in uart_reinit()
242 uart_setreg(bas, UART_C2, reg); in uart_reinit()
308 uart_setreg(bas, UART_C2, reg); in vf_uart_bus_attach()
379 uart_setreg(bas, UART_S2, usr2); in vf_uart_bus_ipend()
[all …]
/freebsd/sys/riscv/sifive/
H A Dsifive_uart.c102 uart_setreg(bas, SFUART_IRQ_ENABLE, 0); in sfuart_init()
108 uart_setreg(bas, SFUART_RXCTRL, reg); in sfuart_init()
117 uart_setreg(bas, SFUART_TXCTRL, reg); in sfuart_init()
131 uart_setreg(bas, SFUART_TXDATA, c); in sfuart_putc()
222 uart_setreg(bas, SFUART_RXCTRL, reg); in sfuart_bus_attach()
226 uart_setreg(bas, SFUART_TXCTRL, reg); in sfuart_bus_attach()
229 uart_setreg(bas, SFUART_IRQ_ENABLE, SFUART_IRQ_ENABLE_RXWM); in sfuart_bus_attach()
244 uart_setreg(bas, SFUART_RXCTRL, 0); in sfuart_bus_detach()
245 uart_setreg(bas, SFUART_TXCTRL, 0); in sfuart_bus_detach()
248 uart_setreg(bas, SFUART_IRQ_ENABLE, 0); in sfuart_bus_detach()
[all …]
/freebsd/sys/arm64/apple/
H A Dexynos_uart.c180 uart_setreg(bas, SSCOM_ULCON, ulcon); in exynos4210_uart_param()
185 uart_setreg(bas, SSCOM_UBRDIV, brd); in exynos4210_uart_param()
230 uart_setreg(bas, SSCOM_UTRSTAT, 0); in exynos4210_init_common()
232 uart_setreg(bas, SSCOM_UCON, 0); in exynos4210_init_common()
233 uart_setreg(bas, SSCOM_UFCON, in exynos4210_init_common()
243 uart_setreg(bas, SSCOM_UCON, uart_getreg(bas, SSCOM_UCON) | in exynos4210_init_common()
247 uart_setreg(bas, SSCOM_UCON, uart_getreg(bas, SSCOM_UCON) | in exynos4210_init_common()
249 uart_setreg(bas, SSCOM_UMCON, UMCON_RTS); in exynos4210_init_common()
288 uart_setreg(bas, SSCOM_UTXH, c); in exynos4210_putc()
413 uart_setreg(&sc->sc_bas, SSCOM_UTXH, sc->sc_txbuf[i]); in exynos4210_bus_transmit()
/freebsd/sys/arm/nvidia/
H A Dtegra_uart.c82 uart_setreg(bas, REG_IER, ns8250->ier); in tegra_uart_attach()
101 uart_setreg(bas, REG_IER, ier & ns8250->ier_mask); in tegra_uart_grab()
106 uart_setreg(bas, REG_FCR, 0); in tegra_uart_grab()
121 uart_setreg(bas, REG_FCR, ns8250->fcr); in tegra_uart_ungrab()
122 uart_setreg(bas, REG_IER, ns8250->ier); in tegra_uart_ungrab()