1098ca2bdSWarner Losh /*-
24d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause
3718cf2ccSPedro F. Giffuni *
427d5dc18SMarcel Moolenaar * Copyright (c) 2003 Marcel Moolenaar
527d5dc18SMarcel Moolenaar * All rights reserved.
627d5dc18SMarcel Moolenaar *
727d5dc18SMarcel Moolenaar * Redistribution and use in source and binary forms, with or without
827d5dc18SMarcel Moolenaar * modification, are permitted provided that the following conditions
927d5dc18SMarcel Moolenaar * are met:
1027d5dc18SMarcel Moolenaar *
1127d5dc18SMarcel Moolenaar * 1. Redistributions of source code must retain the above copyright
1227d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer.
1327d5dc18SMarcel Moolenaar * 2. Redistributions in binary form must reproduce the above copyright
1427d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer in the
1527d5dc18SMarcel Moolenaar * documentation and/or other materials provided with the distribution.
1627d5dc18SMarcel Moolenaar *
1727d5dc18SMarcel Moolenaar * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1827d5dc18SMarcel Moolenaar * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1927d5dc18SMarcel Moolenaar * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
2027d5dc18SMarcel Moolenaar * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2127d5dc18SMarcel Moolenaar * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2227d5dc18SMarcel Moolenaar * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2327d5dc18SMarcel Moolenaar * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2427d5dc18SMarcel Moolenaar * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2527d5dc18SMarcel Moolenaar * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2627d5dc18SMarcel Moolenaar * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2727d5dc18SMarcel Moolenaar */
2827d5dc18SMarcel Moolenaar
2927d5dc18SMarcel Moolenaar #ifndef _DEV_UART_H_
3027d5dc18SMarcel Moolenaar #define _DEV_UART_H_
3127d5dc18SMarcel Moolenaar
32949670f8SAndrew Turner #include <sys/linker_set.h>
33949670f8SAndrew Turner
3427d5dc18SMarcel Moolenaar /*
3527d5dc18SMarcel Moolenaar * Bus access structure. This structure holds the minimum information needed
3627d5dc18SMarcel Moolenaar * to access the UART. The rclk field, although not important to actually
3727d5dc18SMarcel Moolenaar * access the UART, is important for baudrate programming, delay loops and
3827d5dc18SMarcel Moolenaar * other timing related computations.
3927d5dc18SMarcel Moolenaar */
4027d5dc18SMarcel Moolenaar struct uart_bas {
4127d5dc18SMarcel Moolenaar bus_space_tag_t bst;
4227d5dc18SMarcel Moolenaar bus_space_handle_t bsh;
43875f70dbSMarcel Moolenaar u_int chan;
4427d5dc18SMarcel Moolenaar u_int rclk;
45875f70dbSMarcel Moolenaar u_int regshft;
46c214a270SRuslan Bukin u_int regiowidth;
47f30f0f2bSMatt Macy u_int busy_detect;
48*b2fd259eSWarner Losh u_int rclk_guess;/* if rclk == 0, use baud + divisor to compute rclk */
4927d5dc18SMarcel Moolenaar };
5027d5dc18SMarcel Moolenaar
5127d5dc18SMarcel Moolenaar #define uart_regofs(bas, reg) ((reg) << (bas)->regshft)
52c214a270SRuslan Bukin #define uart_regiowidth(bas) ((bas)->regiowidth)
5327d5dc18SMarcel Moolenaar
54c214a270SRuslan Bukin static inline uint32_t
uart_getreg(struct uart_bas * bas,int reg)55c214a270SRuslan Bukin uart_getreg(struct uart_bas *bas, int reg)
56c214a270SRuslan Bukin {
57c214a270SRuslan Bukin uint32_t ret;
58c214a270SRuslan Bukin
59c214a270SRuslan Bukin switch (uart_regiowidth(bas)) {
60a9fc9d6dSAndrew Turner #if !defined(__i386__)
61a9fc9d6dSAndrew Turner case 8:
62a9fc9d6dSAndrew Turner ret = bus_space_read_8(bas->bst, bas->bsh, uart_regofs(bas, reg));
63a9fc9d6dSAndrew Turner break;
64a9fc9d6dSAndrew Turner #endif
65c214a270SRuslan Bukin case 4:
66c214a270SRuslan Bukin ret = bus_space_read_4(bas->bst, bas->bsh, uart_regofs(bas, reg));
67c214a270SRuslan Bukin break;
68c214a270SRuslan Bukin case 2:
69c214a270SRuslan Bukin ret = bus_space_read_2(bas->bst, bas->bsh, uart_regofs(bas, reg));
70c214a270SRuslan Bukin break;
71c214a270SRuslan Bukin default:
72c214a270SRuslan Bukin ret = bus_space_read_1(bas->bst, bas->bsh, uart_regofs(bas, reg));
73c214a270SRuslan Bukin break;
74c214a270SRuslan Bukin }
75c214a270SRuslan Bukin
76c214a270SRuslan Bukin return (ret);
77c214a270SRuslan Bukin }
78c214a270SRuslan Bukin
79c214a270SRuslan Bukin static inline void
uart_setreg(struct uart_bas * bas,int reg,uint32_t value)80a9fc9d6dSAndrew Turner uart_setreg(struct uart_bas *bas, int reg, uint32_t value)
81c214a270SRuslan Bukin {
82c214a270SRuslan Bukin
83c214a270SRuslan Bukin switch (uart_regiowidth(bas)) {
84a9fc9d6dSAndrew Turner #if !defined(__i386__)
85a9fc9d6dSAndrew Turner case 8:
86a9fc9d6dSAndrew Turner bus_space_write_8(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
87a9fc9d6dSAndrew Turner break;
88a9fc9d6dSAndrew Turner #endif
89c214a270SRuslan Bukin case 4:
90c214a270SRuslan Bukin bus_space_write_4(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
91c214a270SRuslan Bukin break;
92c214a270SRuslan Bukin case 2:
93c214a270SRuslan Bukin bus_space_write_2(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
94c214a270SRuslan Bukin break;
95c214a270SRuslan Bukin default:
96c214a270SRuslan Bukin bus_space_write_1(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
97c214a270SRuslan Bukin break;
98c214a270SRuslan Bukin }
99c214a270SRuslan Bukin }
10027d5dc18SMarcel Moolenaar
10127d5dc18SMarcel Moolenaar /*
10227d5dc18SMarcel Moolenaar * XXX we don't know the length of the bus space address range in use by
10327d5dc18SMarcel Moolenaar * the UART. Since barriers don't use the length field currently, we put
10427d5dc18SMarcel Moolenaar * a zero there for now.
10527d5dc18SMarcel Moolenaar */
10627d5dc18SMarcel Moolenaar #define uart_barrier(bas) \
10727d5dc18SMarcel Moolenaar bus_space_barrier((bas)->bst, (bas)->bsh, 0, 0, \
10827d5dc18SMarcel Moolenaar BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
10927d5dc18SMarcel Moolenaar
11027d5dc18SMarcel Moolenaar /*
111f8100ce2SMarcel Moolenaar * UART device classes.
112f8100ce2SMarcel Moolenaar */
113f8100ce2SMarcel Moolenaar struct uart_class;
114f8100ce2SMarcel Moolenaar
115949670f8SAndrew Turner SET_DECLARE(uart_class_set, struct uart_class);
116949670f8SAndrew Turner
117f8100ce2SMarcel Moolenaar extern struct uart_class uart_ns8250_class __attribute__((weak));
1186b7ba544SRafal Jaworowski extern struct uart_class uart_quicc_class __attribute__((weak));
119f8100ce2SMarcel Moolenaar extern struct uart_class uart_z8530_class __attribute__((weak));
12064958185SIan Lepore
121f8100ce2SMarcel Moolenaar /*
12227d5dc18SMarcel Moolenaar * Device flags.
12327d5dc18SMarcel Moolenaar */
12427d5dc18SMarcel Moolenaar #define UART_FLAGS_CONSOLE(f) ((f) & 0x10)
12527d5dc18SMarcel Moolenaar #define UART_FLAGS_DBGPORT(f) ((f) & 0x80)
126823c77d7SSam Leffler #define UART_FLAGS_FCR_RX_LOW(f) ((f) & 0x100)
127823c77d7SSam Leffler #define UART_FLAGS_FCR_RX_MEDL(f) ((f) & 0x200)
128823c77d7SSam Leffler #define UART_FLAGS_FCR_RX_MEDH(f) ((f) & 0x400)
129823c77d7SSam Leffler #define UART_FLAGS_FCR_RX_HIGH(f) ((f) & 0x800)
13027d5dc18SMarcel Moolenaar
13127d5dc18SMarcel Moolenaar /*
13227d5dc18SMarcel Moolenaar * Data parity values (magical numbers related to ns8250).
13327d5dc18SMarcel Moolenaar */
13427d5dc18SMarcel Moolenaar #define UART_PARITY_NONE 0
13527d5dc18SMarcel Moolenaar #define UART_PARITY_ODD 1
13627d5dc18SMarcel Moolenaar #define UART_PARITY_EVEN 3
13727d5dc18SMarcel Moolenaar #define UART_PARITY_MARK 5
13827d5dc18SMarcel Moolenaar #define UART_PARITY_SPACE 7
13927d5dc18SMarcel Moolenaar
14027d5dc18SMarcel Moolenaar #endif /* _DEV_UART_H_ */
141