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/freebsd/contrib/dialog/
H A Drangebox.c106 int scaled; in draw_value() local
111 scaled = (offset + data->slide_inc) / data->slide_inc; in draw_value()
113 scaled = (offset + 1) * data->slide_inc; in draw_value()
115 scaled = offset; in draw_value()
131 for (n = 0; n < scaled; ++n) { in draw_value()
146 scaled, in draw_value()
/freebsd/crypto/openssh/openbsd-compat/
H A Dfmt_scaled.c76 scan_scaled(char *scaled, long long *result) in scan_scaled() argument
78 char *p = scaled; in scan_scaled()
/freebsd/usr.sbin/bsdconfig/dot/
H A DUSAGE55 NOTE: Image is scaled to fit window on launch.
68 NOTE: Image is scaled to fit window on launch.
90 Render dot(1) output as PostScript scaled to fit on a poster consisting
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Schedule.td48 def WriteLDIdx : SchedWrite; // Load from a register index (maybe scaled).
49 def WriteSTIdx : SchedWrite; // Store to a register index (maybe scaled).
H A DAArch64SchedPredNeoverse.td21 // Identify LDR/STR H/Q-form scaled (and potentially extended) FP instructions
H A DAArch64SchedPredExynos.td98 // with a scaled non-extended register.
H A DAArch64SchedCyclone.td241 // Load from base address plus an optionally scaled register offset.
245 SchedVar<ScaledIdxPred, [WriteIS, WriteLD]>, // Load from scaled register.
251 SchedVar<ScaledIdxPred, [WriteIS, WriteST]>, // Store to scaled register.
H A DAArch64SchedPredicates.td255 // with an extended or scaled register.
H A DAArch64SVEInstrInfo.td1168 // Gathers using scaled 32-bit offsets, e.g.
1177 // Gathers using 32-bit pointers with scaled offset, e.g.
1190 // Gathers using 64-bit pointers with scaled offset, e.g.
1227 // Gathers using scaled 64-bit offsets, e.g.
1257 // Gathers using scaled 32-bit offsets unpacked in 64-bits elements, e.g.
1271 // base + vector of scaled offsets
1274 // base + vector of signed 32bit scaled offsets
1277 // base + vector of unsigned 32bit scaled offsets
1464 // Scatters using packed, scaled 32-bit offsets, e.g.
1469 // Scatters using unpacked, scaled 32-bit offsets, e.g.
[all …]
H A DAArch64SchedA510.td1258 // Gather load, 32-bit scaled offset
1337 // Scatter store, 32-bit scaled offset
1345 // Scatter store, 32-bit unpacked scaled offset
1353 // Scatter store, 64-bit scaled offset
H A DAArch64SchedNeoverseV1.td1774 // Gather load, 32-bit scaled offset
1834 // Scatter store, 32-bit scaled offset
1843 // Scatter store, 32-bit unpacked scaled offset
1850 // Scatter store, 64-bit scaled offset
H A DAArch64SchedAmpere1.td626 } // Load from a register index (maybe scaled).
630 } // Store to a register index (maybe scaled).
H A DAArch64SchedAmpere1B.td582 } // Load from a register index (maybe scaled).
586 } // Store to a register index (maybe scaled).
H A DAArch64SchedNeoverseV2.td2686 // Gather load, 32-bit scaled offset
2691 // Gather load, 64-bit scaled offset
2768 // Scatter store, 32-bit scaled offset
2776 // Scatter store, 32-bit unpacked scaled offset
2784 // Scatter store, 64-bit scaled offset
/freebsd/sys/contrib/device-tree/Bindings/iio/afe/
H A Dvoltage-divider.txt29 is scaled by the Rout / (R + Rout) quotient.
/freebsd/crypto/openssl/crypto/ec/curve448/
H A Dpoint_448.h273 ossl_curve448_precomputed_scalarmul(curve448_point_t scaled,
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dcpu-capacity.txt62 The capacities-dmips-mhz or DMIPS/MHz values (scaled to 1024)
197 capacities-dmips-mhz are scaled w.r.t. 2 (cpu@0 and cpu@1), this means that first
/freebsd/sys/contrib/device-tree/Bindings/cpu/
H A Dcpu-capacity.txt62 The capacities-dmips-mhz or DMIPS/MHz values (scaled to 1024)
197 capacities-dmips-mhz are scaled w.r.t. 2 (cpu@0 and cpu@1), this means that first
/freebsd/contrib/mandoc/
H A Droff.c2438 int myres, scaled, n, p; in roff_getnum() local
2464 scaled = *res * 65536; in roff_getnum()
2467 scaled = *res * 240; in roff_getnum()
2470 scaled = *res * 240 / 2.54; in roff_getnum()
2474 scaled = *res * 40; in roff_getnum()
2478 scaled = *res * 24; in roff_getnum()
2481 scaled = *res * 10 / 3; in roff_getnum()
2484 scaled = *res; in roff_getnum()
2487 scaled = *res * 6 / 25; in roff_getnum()
2490 scaled = *res; in roff_getnum()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleA57.td44 // Load, scaled register offset, not plus LSL2
424 // (5 cyc load result for not-lsl2 scaled)
479 // 4(3) "I0/I1,L,M" for scaled register, otherwise 4(2) "I0/I1,L"
501 // 5cyc "I0/I1,L" for minus reg or scaled not plus lsl2
604 // For minus or for not plus lsl2 scaled we need 3cyc "I0/I1, S",
633 // 1(2) "S, M" for scaled plus lsl2
634 // 3(2) "I0/I1, S" for other scaled
677 // 1(2) "S, M" for STR/STRB register post-indexed (both scaled or not)
/freebsd/sys/contrib/device-tree/Bindings/net/can/
H A Drcar_canfd.txt39 and CAN FD controller at the same time. It needs to be scaled to maximum
H A Drcar_can.txt47 scaled to maximum frequency if any of these controllers use it. This is done
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsAArch64.td1663 // Scalar + 32-bit scaled offset vector, zero extend, packed and
1670 // Scalar + 32-bit scaled offset vector, sign extend, packed and
1677 // Scalar + 64-bit scaled offset vector.
2228 // 64 bit scaled offsets
2235 // 32 bit scaled offsets, sign (sxtw) or zero (zxtw) extended to 64 bits
2239 // 128-bit loads, scaled offsets (indices)
2261 // 64 bit scaled offsets
2268 // 32 bit scaled offsets, sign (sxtw) or zero (uxtw) extended to 64 bits
2305 // 64 bit scaled offsets
2316 // 32 bit scaled offsets, sign (sxtw) or zero (zxtw) extended to 64 bits
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/fuzzer/
H A DFuzzerFlags.def198 "the Entropic power schedule gets scaled based on the input execution "
/freebsd/sys/contrib/zlib/doc/
H A Dalgorithm.txt131 Here is an example, scaled down:

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