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Searched refs:mac_idx (Results 1 – 19 of 19) sorted by relevance

/freebsd/sys/contrib/dev/rtw89/
H A Dmac.c60 static int rtw89_mac_check_mac_en_ax(struct rtw89_dev *rtwdev, u8 mac_idx, in rtw89_mac_check_mac_en()
68 } else if (sel == RTW89_CMAC_SEL && mac_idx == 0) { in rtw89_mac_check_mac_en()
71 } else if (sel == RTW89_CMAC_SEL && mac_idx == 1) { in rtw89_mac_check_mac_en()
1498 static int cmac_func_en_ax(struct rtw89_dev *rtwdev, u8 mac_idx, bool en)
1520 if (mac_idx == RTW89_MAC_1) {
1527 rtw89_write32_set(rtwdev, addrl_ck_en[mac_idx], ck_en); in get_dle_mem_cfg()
1528 rtw89_write32_set(rtwdev, addrl_func_en[mac_idx], func_en); in get_dle_mem_cfg()
1530 rtw89_write32_clr(rtwdev, addrl_func_en[mac_idx], func_en); in get_dle_mem_cfg()
1531 rtw89_write32_clr(rtwdev, addrl_ck_en[mac_idx], ck_en); in get_dle_mem_cfg()
1532 if (mac_idx in get_dle_mem_cfg()
57 rtw89_mac_check_mac_en(struct rtw89_dev * rtwdev,u8 mac_idx,enum rtw89_mac_hwmod_sel sel) rtw89_mac_check_mac_en() argument
1351 cmac_func_en(struct rtw89_dev * rtwdev,u8 mac_idx,bool en) cmac_func_en() argument
1875 preload_init_set(struct rtw89_dev * rtwdev,enum rtw89_mac_idx mac_idx,enum rtw89_qta_mode mode) preload_init_set() argument
1901 preload_init(struct rtw89_dev * rtwdev,enum rtw89_mac_idx mac_idx,enum rtw89_qta_mode mode) preload_init() argument
2032 dmac_init(struct rtw89_dev * rtwdev,u8 mac_idx) dmac_init() argument
2075 addr_cam_init(struct rtw89_dev * rtwdev,u8 mac_idx) addr_cam_init() argument
2102 scheduler_init(struct rtw89_dev * rtwdev,u8 mac_idx) scheduler_init() argument
2146 rtw89_mac_typ_fltr_opt(struct rtw89_dev * rtwdev,enum rtw89_machdr_frame_type type,enum rtw89_mac_fwd_target fwd_target,u8 mac_idx) rtw89_mac_typ_fltr_opt() argument
2185 rx_fltr_init(struct rtw89_dev * rtwdev,u8 mac_idx) rx_fltr_init() argument
2213 _patch_dis_resp_chk(struct rtw89_dev * rtwdev,u8 mac_idx) _patch_dis_resp_chk() argument
2247 cca_ctrl_init(struct rtw89_dev * rtwdev,u8 mac_idx) cca_ctrl_init() argument
2289 spatial_reuse_init(struct rtw89_dev * rtwdev,u8 mac_idx) spatial_reuse_init() argument
2303 tmac_init(struct rtw89_dev * rtwdev,u8 mac_idx) tmac_init() argument
2325 trxptcl_init(struct rtw89_dev * rtwdev,u8 mac_idx) trxptcl_init() argument
2382 rmac_init(struct rtw89_dev * rtwdev,u8 mac_idx) rmac_init() argument
2440 cmac_com_init(struct rtw89_dev * rtwdev,u8 mac_idx) cmac_com_init() argument
2478 ptcl_init(struct rtw89_dev * rtwdev,u8 mac_idx) ptcl_init() argument
2521 cmac_dma_init(struct rtw89_dev * rtwdev,u8 mac_idx) cmac_dma_init() argument
2540 cmac_init(struct rtw89_dev * rtwdev,u8 mac_idx) cmac_init() argument
2725 rtw89_set_hw_sch_tx_en(struct rtw89_dev * rtwdev,u8 mac_idx,u16 tx_en,u16 tx_en_mask) rtw89_set_hw_sch_tx_en() argument
2747 rtw89_set_hw_sch_tx_en_v1(struct rtw89_dev * rtwdev,u8 mac_idx,u32 tx_en,u32 tx_en_mask) rtw89_set_hw_sch_tx_en_v1() argument
2765 rtw89_mac_stop_sch_tx(struct rtw89_dev * rtwdev,u8 mac_idx,u32 * tx_en,enum rtw89_sch_tx_sel sel) rtw89_mac_stop_sch_tx() argument
2806 rtw89_mac_stop_sch_tx_v1(struct rtw89_dev * rtwdev,u8 mac_idx,u32 * tx_en,enum rtw89_sch_tx_sel sel) rtw89_mac_stop_sch_tx_v1() argument
2847 rtw89_mac_resume_sch_tx(struct rtw89_dev * rtwdev,u8 mac_idx,u32 tx_en) rtw89_mac_resume_sch_tx() argument
2859 rtw89_mac_resume_sch_tx_v1(struct rtw89_dev * rtwdev,u8 mac_idx,u32 tx_en) rtw89_mac_resume_sch_tx_v1() argument
3009 band_idle_ck_b(struct rtw89_dev * rtwdev,u8 mac_idx) band_idle_ck_b() argument
3223 rtw89_scheduler_imr_enable(struct rtw89_dev * rtwdev,u8 mac_idx) rtw89_scheduler_imr_enable() argument
3233 rtw89_ptcl_imr_enable(struct rtw89_dev * rtwdev,u8 mac_idx) rtw89_ptcl_imr_enable() argument
3243 rtw89_cdma_imr_enable(struct rtw89_dev * rtwdev,u8 mac_idx) rtw89_cdma_imr_enable() argument
3260 rtw89_phy_intf_imr_enable(struct rtw89_dev * rtwdev,u8 mac_idx) rtw89_phy_intf_imr_enable() argument
3270 rtw89_rmac_imr_enable(struct rtw89_dev * rtwdev,u8 mac_idx) rtw89_rmac_imr_enable() argument
3280 rtw89_tmac_imr_enable(struct rtw89_dev * rtwdev,u8 mac_idx) rtw89_tmac_imr_enable() argument
3290 rtw89_mac_enable_imr(struct rtw89_dev * rtwdev,u8 mac_idx,enum rtw89_mac_hwmod_sel sel) rtw89_mac_enable_imr() argument
4772 rtw89_mac_cfg_ppdu_status(struct rtw89_dev * rtwdev,u8 mac_idx,bool enable) rtw89_mac_cfg_ppdu_status() argument
4797 rtw89_mac_update_rts_threshold(struct rtw89_dev * rtwdev,u8 mac_idx) rtw89_mac_update_rts_threshold() argument
5154 rtw89_mac_bfee_standby_timer(struct rtw89_dev * rtwdev,u8 mac_idx,bool keep) rtw89_mac_bfee_standby_timer() argument
5172 rtw89_mac_bfee_ctrl(struct rtw89_dev * rtwdev,u8 mac_idx,bool en) rtw89_mac_bfee_ctrl() argument
5189 rtw89_mac_init_bfee(struct rtw89_dev * rtwdev,u8 mac_idx) rtw89_mac_init_bfee() argument
5236 u8 mac_idx = rtwvif->mac_idx; rtw89_mac_set_csi_para_reg() local
5296 u8 mac_idx = rtwvif->mac_idx; rtw89_mac_csi_rrsc() local
5354 u8 mac_idx = rtwvif->mac_idx; rtw89_mac_bf_set_gid_table() local
5448 u8 mac_idx = rtwsta->rtwvif->mac_idx; __rtw89_mac_set_tx_time() local
5490 u8 mac_idx = rtwsta->rtwvif->mac_idx; rtw89_mac_get_tx_time() local
5532 u8 mac_idx = rtwsta->rtwvif->mac_idx; rtw89_mac_get_tx_retry_limit() local
5555 u8 mac_idx = rtwvif->mac_idx; rtw89_mac_set_hw_muedca_ctrl() local
[all...]
H A Dmac.h955 u8 mac_idx);
956 int (*cfg_ppdu_status)(struct rtw89_dev *rtwdev, u8 mac_idx, bool enable);
1022 u32 rtw89_mac_reg_by_port(struct rtw89_dev *rtwdev, u32 base, u8 port, u8 mac_idx) in rtw89_mac_txpwr_read32()
1024 return rtw89_mac_reg_by_idx(rtwdev, base + port * 0x40, mac_idx); in rtw89_mac_txpwr_read32()
1032 reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx); in rtw89_mac_txpwr_write32()
1042 reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx); in rtw89_mac_txpwr_write32_mask()
1052 reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx); in rtw89_mac_ctrl_hci_dma_tx()
1062 reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx); in rtw89_mac_ctrl_hci_dma_tx()
1072 reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx); in rtw89_mac_ctrl_hci_dma_rx()
1082 reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx); in rtw89_mac_ctrl_hci_dma_trx()
834 rtw89_mac_reg_by_port(u32 base,u8 port,u8 mac_idx) rtw89_mac_reg_by_port() argument
[all...]
H A Drtw8852a.c728 u8 mac_idx) in rtw8852a_set_channel_mac()
730 u32 rf_mod = rtw89_mac_reg_by_idx(rtwdev, R_AX_WMAC_RFMOD, mac_idx); in rtw8852a_set_channel_mac()
731 u32 sub_carr = rtw89_mac_reg_by_idx(rtwdev, R_AX_TX_SUB_CARRIER_VALUE, mac_idx); in rtw8852a_set_channel_mac()
732 u32 chk_rate = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXRATE_CHK, mac_idx); in rtw8852a_set_channel_mac()
1224 enum rtw89_mac_idx mac_idx, in rtw8852a_tssi_cont_en()
1227 rtw8852a_set_channel_mac(rtwdev, chan, mac_idx); in rtw8852a_tssi_cont_en()
1281 enum rtw89_mac_idx mac_idx, in rtw8852a_fem_setup()
1285 rtw89_chip_stop_sch_tx(rtwdev, mac_idx, &p->tx_en, in rtw8852a_fem_setup()
1287 rtw89_mac_cfg_ppdu_status(rtwdev, mac_idx, false); in rtw8852a_fem_setup()
1294 rtw89_mac_cfg_ppdu_status(rtwdev, mac_idx, tru in rtw8852a_fem_setup()
705 rtw8852a_set_channel_mac(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan,u8 mac_idx) rtw8852a_set_channel_mac() argument
1202 rtw8852a_set_channel(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx) rtw8852a_set_channel() argument
1259 rtw8852a_set_channel_help(struct rtw89_dev * rtwdev,bool enter,struct rtw89_channel_help_params * p,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx) rtw8852a_set_channel_help() argument
1372 rtw8852a_set_txpwr_ul_tb_offset(struct rtw89_dev * rtwdev,s8 pw_ofst,enum rtw89_mac_idx mac_idx) rtw8852a_set_txpwr_ul_tb_offset() argument
[all...]
H A Drtw8852c.c192 enum rtw89_mac_idx mac_idx); in rtw8852c_pwr_on_func()
664 u8 mac_idx) in rtw8852c_set_channel_mac()
666 u32 rf_mod = rtw89_mac_reg_by_idx(rtwdev, R_AX_WMAC_RFMOD, mac_idx); in rtw8852c_set_channel_mac()
667 u32 sub_carr = rtw89_mac_reg_by_idx(rtwdev, R_AX_TX_SUB_CARRIER_VALUE, mac_idx); in rtw8852c_set_channel_mac()
668 u32 chk_rate = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXRATE_CHK, mac_idx); in rtw8852c_set_channel_mac()
1774 enum rtw89_mac_idx mac_idx, in rtw8852c_rfk_init()
1777 rtw8852c_set_channel_mac(rtwdev, chan, mac_idx); in rtw8852c_rfk_init()
1803 enum rtw89_mac_idx mac_idx, in rtw8852c_rfk_scan()
1807 rtw89_chip_stop_sch_tx(rtwdev, mac_idx, &p->tx_en, in rtw8852c_rfk_track()
1809 rtw89_mac_cfg_ppdu_status(rtwdev, mac_idx, fals in rtw8852c_rfk_track()
607 rtw8852c_set_channel_mac(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan,u8 mac_idx) rtw8852c_set_channel_mac() argument
1718 rtw8852c_set_channel(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx) rtw8852c_set_channel() argument
1747 rtw8852c_set_channel_help(struct rtw89_dev * rtwdev,bool enter,struct rtw89_channel_help_params * p,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx) rtw8852c_set_channel_help() argument
1841 rtw8852c_set_txpwr_ul_tb_offset(struct rtw89_dev * rtwdev,s8 pw_ofst,enum rtw89_mac_idx mac_idx) rtw8852c_set_txpwr_ul_tb_offset() argument
2164 rtw8852c_ctrl_tx_path_tmac(struct rtw89_dev * rtwdev,u8 tx_path,enum rtw89_mac_idx mac_idx) rtw8852c_ctrl_tx_path_tmac() argument
[all...]
H A Drtw8851b.c780 u8 mac_idx) in rtw8851b_set_channel_mac()
782 u32 sub_carr = rtw89_mac_reg_by_idx(rtwdev, R_AX_TX_SUB_CARRIER_VALUE, mac_idx); in rtw8851b_set_channel_mac()
783 u32 chk_rate = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXRATE_CHK, mac_idx); in rtw8851b_set_channel_mac()
784 u32 rf_mod = rtw89_mac_reg_by_idx(rtwdev, R_AX_WMAC_RFMOD, mac_idx); in rtw8851b_set_channel_mac()
1515 enum rtw89_mac_idx mac_idx, in rtw8851b_tssi_cont_en_phyidx()
1518 rtw8851b_set_channel_mac(rtwdev, chan, mac_idx); in rtw8851b_adc_en()
1552 enum rtw89_mac_idx mac_idx, in rtw8851b_rfk_init()
1764 s8 pw_ofst, enum rtw89_mac_idx mac_idx) in rtw8851b_init_txpwr_unit()
1773 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_CTRL, mac_idx); in rtw8851b_init_txpwr_unit()
1776 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, mac_idx); in rtw8851b_init_txpwr_unit()
757 rtw8851b_set_channel_mac(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan,u8 mac_idx) rtw8851b_set_channel_mac() argument
1492 rtw8851b_set_channel(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx) rtw8851b_set_channel() argument
1529 rtw8851b_set_channel_help(struct rtw89_dev * rtwdev,bool enter,struct rtw89_channel_help_params * p,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx) rtw8851b_set_channel_help() argument
1740 rtw8851b_set_txpwr_ul_tb_offset(struct rtw89_dev * rtwdev,s8 pw_ofst,enum rtw89_mac_idx mac_idx) rtw8851b_set_txpwr_ul_tb_offset() argument
[all...]
H A Drtw8852b.c478 enum rtw89_mac_idx mac_idx, in rtw8852b_pwr_on_func()
481 rtw8852bx_set_channel_mac(rtwdev, chan, mac_idx); in rtw8852b_pwr_on_func()
526 enum rtw89_mac_idx mac_idx, in rtw8852b_pwr_off_func()
844 rtw8852b_set_channel_mac(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan,u8 mac_idx) rtw8852b_set_channel_mac() argument
1469 rtw8852b_set_channel(struct rtw89_dev * rtwdev,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx) rtw8852b_set_channel() argument
1517 rtw8852b_set_channel_help(struct rtw89_dev * rtwdev,bool enter,struct rtw89_channel_help_params * p,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx) rtw8852b_set_channel_help() argument
1725 rtw8852b_set_txpwr_ul_tb_offset(struct rtw89_dev * rtwdev,s8 pw_ofst,enum rtw89_mac_idx mac_idx) rtw8852b_set_txpwr_ul_tb_offset() argument
H A Dcore.h3422 u8 mac_idx;
3531 enum rtw89_mac_idx mac_idx,
3536 enum rtw89_mac_idx mac_idx,
3568 s8 pw_ofst, enum rtw89_mac_idx mac_idx);
3583 int (*stop_sch_tx)(struct rtw89_dev *rtwdev, u8 mac_idx,
3585 int (*resume_sch_tx)(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en);
6028 enum rtw89_mac_idx mac_idx,
6032 mac_idx, phy_idx);
6039 enum rtw89_mac_idx mac_idx,
6043 mac_idx, phy_id
2906 u8 mac_idx; global() member
4860 rtw89_chip_set_channel_prepare(struct rtw89_dev * rtwdev,struct rtw89_channel_help_params * p,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx) rtw89_chip_set_channel_prepare() argument
4871 rtw89_chip_set_channel_done(struct rtw89_dev * rtwdev,struct rtw89_channel_help_params * p,const struct rtw89_chan * chan,enum rtw89_mac_idx mac_idx,enum rtw89_phy_idx phy_idx) rtw89_chip_set_channel_done() argument
5119 rtw89_chip_stop_sch_tx(struct rtw89_dev * rtwdev,u8 mac_idx,u32 * tx_en,enum rtw89_sch_tx_sel sel) rtw89_chip_stop_sch_tx() argument
5128 rtw89_chip_resume_sch_tx(struct rtw89_dev * rtwdev,u8 mac_idx,u32 tx_en) rtw89_chip_resume_sch_tx() argument
[all...]
H A Dphy.h952 enum rtw89_mac_idx mac_idx,
H A Dmac80211.c145 rtwvif->mac_idx = RTW89_MAC_0; in rtw89_ops_add_interface()
377 reg = rtw89_mac_reg_by_idx(rtwdev, ac_to_mu_edca_param[ac][gen], rtwvif->mac_idx);
H A Dphy.c4387 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, rtwvif->mac_idx); in rtw89_phy_antdiv_training_state()
4391 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_2T, rtwvif->mac_idx); in rtw89_phy_antdiv_training_state()
4395 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM1, rtwvif->mac_idx); in rtw89_phy_antdiv_training_state()
4399 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM2, rtwvif->mac_idx); in rtw89_phy_antdiv_training_state()
6177 enum rtw89_mac_idx mac_idx,
6191 reg = rtw89_mac_reg_by_idx(rtwdev, regs[i].addr, mac_idx);
6233 enum rtw89_mac_idx mac_idx,
6253 reg = rtw89_mac_reg_by_idx(rtwdev, regs[i].addr, mac_idx);
6257 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BANDEDGE_CFG, mac_idx);
6260 rtw89_phy_tssi_ctrl_set_fast_mode_cfg(rtwdev, mac_idx, bandedge_cf
4569 rtw89_phy_tssi_ctrl_set_fast_mode_cfg(struct rtw89_dev * rtwdev,enum rtw89_mac_idx mac_idx,enum rtw89_tssi_bandedge_cfg bandedge_cfg,u32 val) rtw89_phy_tssi_ctrl_set_fast_mode_cfg() argument
4625 rtw89_phy_tssi_ctrl_set_bandedge_cfg(struct rtw89_dev * rtwdev,enum rtw89_mac_idx mac_idx,enum rtw89_tssi_bandedge_cfg bandedge_cfg) rtw89_phy_tssi_ctrl_set_bandedge_cfg() argument
[all...]
H A Dfw.c1995 le32_encode_bits(rtwvif->mac_idx, RTW89_H2C_BA_CAM_W1_BAND); in rtw89_fw_h2c_update_beacon()
2127 le32_encode_bits(!!rtwvif->mac_idx, RTW89_H2C_BA_CAM_V1_W1_BAND_SEL); in rtw89_fw_h2c_macid_pause()
2150 u8 offset, u8 mac_idx) in rtw89_fw_h2c_macid_pause()
2167 le32_encode_bits(mac_idx, RTW89_H2C_BA_CAM_INIT_BAND_SEL); in rtw89_fw_h2c_set_edca()
3297 le32_encode_bits(rtwvif->mac_idx, RTW89_H2C_BCN_UPD_W0_BAND) | in rtw89_fw_h2c_raw()
3376 le32_encode_bits(rtwvif->mac_idx, RTW89_H2C_BCN_UPD_BE_W0_BAND) | in rtw89_fw_c2h_irqsafe()
3515 le32_encode_bits(rtwvif->mac_idx, RTW89_H2C_JOININFO_W0_BAND) | in rtw89_fw_msg_reg()
3666 RTW89_SET_EDCA_BAND(skb->data, rtwvif->mac_idx); in rtw89_hw_scan_update_probe_req()
3706 RTW89_SET_FWCMD_TSF32_TOGL_BAND(cmd, rtwvif->mac_idx); in rtw89_update_6ghz_rnr_chan()
H A Dcore.c410 enum rtw89_mac_idx mac_idx; in rtw89_set_channel() local
436 mac_idx = RTW89_MAC_0; in rtw89_set_channel()
442 rtw89_chip_set_channel_prepare(rtwdev, &bak, chan, mac_idx, phy_idx); in rtw89_set_channel()
444 chip->ops->set_channel(rtwdev, chan, mac_idx, phy_idx); in rtw89_set_channel()
448 rtw89_chip_set_channel_done(rtwdev, &bak, chan, mac_idx, phy_idx); in rtw89_set_channel()
/freebsd/sys/contrib/dev/mediatek/mt76/mt7603/
H A Dmt7603.h233 void mt7603_filter_tx(struct mt7603_dev *dev, int mac_idx, int idx, bool abort);
H A Dmac.c181 void mt7603_filter_tx(struct mt7603_dev *dev, int mac_idx, int idx, bool abort) in mt7603_filter_tx() argument
203 flush_mask <<= mac_idx; in mt7603_filter_tx()
/freebsd/sys/dev/mlx4/mlx4_core/
H A Dmlx4_cmd.c2047 vp_oper->mac_idx = __mlx4_register_mac(&priv->dev, in mlx4_master_activate_admin_state()
2050 if (0 > vp_oper->mac_idx) { in mlx4_master_activate_admin_state()
2051 err = vp_oper->mac_idx; in mlx4_master_activate_admin_state()
2052 vp_oper->mac_idx = NO_INDX; in mlx4_master_activate_admin_state()
2059 (unsigned long long) vp_oper->state.mac, vp_oper->mac_idx, slave, port); in mlx4_master_activate_admin_state()
2088 if (NO_INDX != vp_oper->mac_idx) { in mlx4_master_deactivate_admin_state()
2090 vp_oper->mac_idx = NO_INDX; in mlx4_master_deactivate_admin_state()
2418 vf_oper->vport[port].mac_idx = NO_INDX; in mlx4_multi_func_init()
H A Dmlx4.h518 int mac_idx; member
H A Dmlx4_resource_tracker.c828 qpc->pri_path.grh_mylmc = (0x80 & qpc->pri_path.grh_mylmc) + vp_oper->mac_idx; in update_vport_qp_param()
/freebsd/sys/dev/cxgb/
H A Dcxgb_main.c287 u32 mac_idx:4; member
3035 p->mac_idx = f->mac_addr_idx; in cxgb_extension_ioctl()
3111 f->mac_addr_idx = p->mac_vld ? p->mac_idx : 0xffff; in cxgb_extension_ioctl()
3258 V_MAC_MATCH(f->mac_idx | (f->mac_hit << 4))); in set_filter()
/freebsd/sys/dev/cxgbe/common/
H A Dt4_msg.h674 __be16 mac_idx; member
914 __be16 mac_idx; member