| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 403 bool isSub = Opc == sub; variable
404 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
434 bool isSub = Opc == sub; variable
435 return ((int)isSub << 8) | Offset | (IdxMode << 9);
477 bool isSub = Opc == sub; in getAM5Opc() local
478 return ((int)isSub << 8) | Offset; in getAM5Opc()
498 bool isSub = Opc == sub; in getAM5FP16Opc() local
499 return ((int)isSub << 8) | Offset; in getAM5FP16Opc()
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| H A D | ARMInstPrinter.cpp | 408 bool isSub = OffImm < 0; in printThumbLdrLabelOperand() local
413 if (isSub) { in printThumbLdrLabelOperand()
1237 bool isSub = OffImm < 0; in printAddrModeImm12Operand() local
1241 if (isSub) { in printAddrModeImm12Operand()
1264 bool isSub = OffImm < 0; in printT2AddrModeImm8Operand() local
1268 if (isSub) { in printT2AddrModeImm8Operand()
1296 bool isSub = OffImm < 0; in printT2AddrModeImm8s4Operand() local
1303 if (isSub) { in printT2AddrModeImm8s4Operand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.cpp | 323 bool isSub = NumBytes < 0; in emitT2RegPlusImmediate() local
324 if (isSub) NumBytes = -NumBytes; in emitT2RegPlusImmediate()
348 if (isSub) { in emitT2RegPlusImmediate()
391 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitT2RegPlusImmediate()
406 Opc = isSub ? t2SUB : t2ADD; in emitT2RegPlusImmediate()
413 Opc = isSub ? t2SUBi12 : t2ADDi12; in emitT2RegPlusImmediate()
559 bool isSub = false; in rewriteT2FrameIndex() local
591 isSub = true; in rewriteT2FrameIndex()
610 unsigned NewOpc = isSub ? IsSP ? ARM::t2SUBspImm12 : ARM::t2SUBri12 in rewriteT2FrameIndex()
668 isSub = true; in rewriteT2FrameIndex()
[all …]
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| H A D | ThumbRegisterInfo.cpp | 146 bool isSub = false; in emitThumbRegPlusImmInReg()
152 isSub = true; in emitThumbRegPlusImmInReg()
235 int Opc = (isSub) ? ARM::tSUBrr in emitThumbRegPlusImmediate()
240 if (DestReg == ARM::SP || isSub) in emitThumbRegPlusImmediate()
258 bool isSub = NumBytes < 0; in emitThumbRegPlusImmediate()
260 if (isSub) Bytes = -NumBytes; in emitThumbRegPlusImmediate()
293 ExtraOpc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitThumbRegPlusImmediate()
299 assert(!isSub && "Thumb1 does not have tSUBrSPi"); in emitThumbRegPlusImmediate()
308 CopyOpc = isSub ? ARM::tSUBi3 : ARM::tADDi3; in emitThumbRegPlusImmediate()
316 ExtraOpc = isSub in emitThumbRegPlusImmediate()
133 bool isSub = false; emitThumbRegPlusImmInReg() local
194 bool isSub = NumBytes < 0; emitThumbRegPlusImmediate() local
[all...] |
| H A D | ARMBaseInstrInfo.cpp | 222 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() local
230 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) in convertToThreeAddress()
239 get(isSub ? ARM::SUBrsi : ARM::ADDrsi), WBReg) in convertToThreeAddress()
248 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress()
256 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() local
261 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) in convertToThreeAddress()
268 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress()
2484 bool isSub = NumBytes < 0; in emitARMRegPlusImmediate() local
2485 if (isSub) NumBytes = -NumBytes; in emitARMRegPlusImmediate()
2498 unsigned Opc = isSub ? ARM::SUBri : ARM::ADDri; in emitARMRegPlusImmediate()
[all …]
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| H A D | ARMISelLowering.cpp | 12121 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub; in EmitInstrWithCustomInserter() local
12123 if (isSub) in EmitInstrWithCustomInserter()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 233 bool isSub = NumBytes < 0; in emitSPUpdate() local
234 uint64_t Offset = isSub ? -NumBytes : NumBytes; in emitSPUpdate()
236 isSub ? MachineInstr::FrameSetup : MachineInstr::FrameDestroy; in emitSPUpdate()
259 if (isSub && !isEAXLiveIn(MBB)) in emitSPUpdate()
265 isSub ? getSUBrrOpcode(Is64Bit) : getADDrrOpcode(Is64Bit); in emitSPUpdate()
289 if (isSub) in emitSPUpdate()
316 unsigned Reg = isSub ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX) in emitSPUpdate()
319 unsigned Opc = isSub ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r) in emitSPUpdate()
322 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)) in emitSPUpdate()
329 BuildStackAdjustment(MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue) in emitSPUpdate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 2473 class BaseBaseAddSubCarry<bit isSub, RegisterClass regtype, string asm,
2482 let Inst{30} = isSub;
2490 class BaseAddSubCarry<bit isSub, RegisterClass regtype, string asm,
2492 : BaseBaseAddSubCarry<isSub, regtype, asm,
2495 class BaseAddSubCarrySetFlags<bit isSub, RegisterClass regtype, string asm,
2497 : BaseBaseAddSubCarry<isSub, regtype, asm,
2503 multiclass AddSubCarry<bit isSub, string asm, string asm_setflags,
2505 def Wr : BaseAddSubCarry<isSub, GPR32, asm, OpNode> {
2509 def Xr : BaseAddSubCarry<isSub, GPR64, asm, OpNode> {
2515 def SWr : BaseAddSubCarrySetFlags<isSub, GPR32, asm_setflags,
[all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GenericMachineInstrs.h | 440 bool isSub() const { return !isAdd(); } in isSub() function
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 4061 bool isSub=false) { in tryEmitFMulAdd() argument
4103 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, NegLHS, isSub); in tryEmitFMulAdd()
4112 return buildFMulAdd(RHSBinOp, op.LHS, CGF, Builder, isSub ^ NegRHS, false); in tryEmitFMulAdd()
4123 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, NegLHS, isSub); in tryEmitFMulAdd()
4133 return buildFMulAdd(RHSBinOp, op.LHS, CGF, Builder, isSub ^ NegRHS, false); in tryEmitFMulAdd()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4588 bool ProducesNegatedCarry = CarrySrcMI->isSub(); in emitCarryIn()
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