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Searched refs:getSimpleVT (Results 1 – 25 of 82) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h96 return getSimpleVT().changeVectorElementTypeToInteger(); in changeVectorElementTypeToInteger()
106 return getSimpleVT().changeVectorElementType(EltVT.getSimpleVT()); in changeVectorElementType()
126 return getSimpleVT().changeTypeToInteger(); in changeTypeToInteger()
311 MVT getSimpleVT() const { in getSimpleVT() function
H A DTargetLowering.h1109 (unsigned)VT.getSimpleVT().SimpleTy < std::size(RegClassForVT)); in isTypeLegal()
1110 return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != nullptr; in isTypeLegal()
1291 return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op]; in getOperationAction()
1472 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getLoadExtAction()
1473 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy; in getLoadExtAction()
1496 unsigned ValI = (unsigned)ValVT.getSimpleVT().SimpleTy; in getAtomicLoadExtAction()
1497 unsigned MemI = (unsigned)MemVT.getSimpleVT().SimpleTy; in getAtomicLoadExtAction()
1519 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getTruncStoreAction()
1520 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy; in getTruncStoreAction()
1558 (getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Legal || in isIndexedLoadLegal()
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H A DTargetCallingConv.h219 VT = vt.getSimpleVT(); in InputArg()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp248 MVT VT = RealVT.getSimpleVT(); in getRegForValue()
252 VT = TLI.getTypeToTransformTo(V->getContext(), VT).getSimpleVT(); in getRegForValue()
311 Reg = fastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, in materializeConstant()
393 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN); in getRegForGEPIndex()
396 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN); in getRegForGEPIndex()
472 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, CI->getZExtValue(), in selectBinaryOp()
473 VT.getSimpleVT()); in selectBinaryOp()
504 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, in selectBinaryOp()
505 VT.getSimpleVT()); in selectBinaryOp()
519 Register ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp()
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H A DSelectionDAGISel.cpp2458 LLT Ty = VT.isSimple() ? getLLTForMVT(VT.getSimpleVT()) : LLT(); in Select_READ_REGISTER()
2489 LLT Ty = VT.isSimple() ? getLLTForMVT(VT.getSimpleVT()) : LLT(); in Select_WRITE_REGISTER()
2674 getSimpleVT(const unsigned char *MatcherTable, unsigned &MatcherIndex) { in getSimpleVT() function
2960 MVT::SimpleValueType VT = getSimpleVT(MatcherTable, MatcherIndex); in CheckValueType()
3090 VT = getSimpleVT(Table, Index); in IsPredicateKnownToFail()
3098 Result = !::CheckType(getSimpleVT(Table, Index), N.getValue(Res), in IsPredicateKnownToFail()
3137 VT = getSimpleVT(Table, Index); in IsPredicateKnownToFail()
3645 VT = getSimpleVT(MatcherTable, MatcherIndex); in SelectCodeCommon()
3654 if (!::CheckType(getSimpleVT(MatcherTable, MatcherIndex), N.getValue(Res), in SelectCodeCommon()
3702 MVT CaseVT = getSimpleVT(MatcherTable, MatcherIndex); in SelectCodeCommon()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVVPISelLowering.cpp61 auto Packing = getTypePacking(LegalVecVT.getSimpleVT()); in lowerToVVP()
153 Packing, DataVT.getVectorElementType().getSimpleVT()); in lowerVVP_LOAD_STORE()
187 MVT DataVT = getIdiomaticVectorType(Op.getNode())->getSimpleVT(); in splitPackedLoadStore()
274 getLegalVectorType(Packing, DataVT.getVectorElementType().getSimpleVT()); in lowerVVP_GATHER_SCATTER()
320 MVT DataVT = getIdiomaticVectorType(Op.getNode())->getSimpleVT(); in legalizeInternalLoadStoreOp()
416 MVT IdiomVT = getIdiomaticVectorType(Op.getNode())->getSimpleVT(); in legalizePackedAVL()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp557 LoadConversionTbl, ISD, DstTy.getSimpleVT(), SrcTy.getSimpleVT())) in getCastInstrCost()
580 DstTy.getSimpleVT(), SrcTy.getSimpleVT())) in getCastInstrCost()
592 DstTy.getSimpleVT(), SrcTy.getSimpleVT())) in getCastInstrCost()
609 SrcTy.getSimpleVT(), DstTy.getSimpleVT())) in getCastInstrCost()
620 SrcTy.getSimpleVT(), DstTy.getSimpleVT())) in getCastInstrCost()
646 DstTy.getSimpleVT(), in getCastInstrCost()
647 SrcTy.getSimpleVT())) { in getCastInstrCost()
757 DstTy.getSimpleVT(), in getCastInstrCost()
758 SrcTy.getSimpleVT())) in getCastInstrCost()
787 DstTy.getSimpleVT(), in getCastInstrCost()
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H A DARMFastISel.cpp659 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant()
708 VT = evt.getSimpleVT(); in isTypeLegal()
1386 MVT SrcVT = SrcEVT.getSimpleVT(); in ARMEmitCmp()
1587 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP()
1839 MVT VT = FPVT.getSimpleVT(); in SelectBinaryFPOp()
2189 MVT RVVT = RVEVT.getSimpleVT(); in SelectRet()
2256 return ARMMaterializeGV(GV, LCREVT.getSimpleVT()); in getLibcallReg()
2828 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt()
2829 MVT DestVT = DestEVT.getSimpleVT(); in SelectIntExt()
3117 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp311 switch (VT.getSimpleVT().SimpleTy) { in isValidIndexedLoad()
334 MVT VT = LD->getMemoryVT().getSimpleVT(); in tryIndexedLoad()
363 MVT VT = LD->getMemoryVT().getSimpleVT(); in tryIndexedBinOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVISelLowering.h72 return ConditionVT.getSimpleVT(); in getPreferredSwitchConditionType()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyTargetTransformInfo.cpp97 auto DstVT = DstTy.getSimpleVT(); in getCastInstrCost()
98 auto SrcVT = SrcTy.getSimpleVT(); in getCastInstrCost()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp1025 const MVT LoadedVT = LoadedEVT.getSimpleVT(); in tryLoad()
1097 const MVT MemVT = MemEVT.getSimpleVT(); in tryLoadVector()
1176 const MVT LoadedVT = LoadedEVT.getSimpleVT(); in tryLDG()
1323 const unsigned ToTypeWidth = StoreVT.getSimpleVT().getSizeInBits(); in tryStore()
1378 const unsigned TotalWidth = StoreVT.getSimpleVT().getSizeInBits(); in tryStoreVector()
1461 Opcode = pickOpcodeForVT(MemVT.getSimpleVT().SimpleTy, in tryLoadParam()
1467 pickOpcodeForVT(MemVT.getSimpleVT().SimpleTy, NVPTX::LoadParamMemV2I8, in tryLoadParam()
1472 Opcode = pickOpcodeForVT(MemVT.getSimpleVT().SimpleTy, in tryLoadParam()
1634 MVT::SimpleValueType MemTy = Mem->getMemoryVT().getSimpleVT().SimpleTy; in tryStoreParam()
1654 Opcode = pickOpcodeForVT(Mem->getMemoryVT().getSimpleVT().SimpleTy, in tryStoreParam()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp91 switch (LoadedVT.getSimpleVT().SimpleTy) { in INITIALIZE_PASS()
488 switch (StoredVT.getSimpleVT().SimpleTy) { in SelectIndexedStore()
710 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectExtractSubvector()
713 [[maybe_unused]] MVT InpTy = Inp.getValueType().getSimpleVT(); in SelectExtractSubvector()
802 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectVAlign()
865 MVT OpTy = Op.getValueType().getSimpleVT(); in SelectTypecast()
872 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectP2D()
880 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectD2P()
889 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectV2Q()
891 MVT OpTy = N->getOperand(0).getValueType().getSimpleVT(); (void)OpTy; in SelectV2Q()
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H A DHexagonISelLowering.h438 return Op.getValueType().getSimpleVT(); in ty()
441 return { Ops.first.getValueType().getSimpleVT(), in ty()
442 Ops.second.getValueType().getSimpleVT() }; in ty()
H A DHexagonSubtarget.cpp187 MVT ElemTy = VecTy.getSimpleVT().getVectorElementType(); in isHVXVectorType()
233 MVT ElemTy = Ty.getVectorElementType().getSimpleVT(); in isTypeForHVX()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp123 MVT VT = cast<MemSDNode>(Op)->getMemoryVT().getSimpleVT(); in SelectAddr()
145 MVT VT = LD->getMemoryVT().getSimpleVT(); in selectIndexedLoad()
386 MVT VT = LD->getMemoryVT().getSimpleVT(); in select()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp446 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant()
594 VT = evt.getSimpleVT(); in isTypeLegal()
1377 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments()
1746 MVT RVVT = RVEVT.getSimpleVT(); in selectRet()
1825 MVT SrcVT = SrcEVT.getSimpleVT(); in selectIntExt()
1826 MVT DestVT = DestEVT.getSimpleVT(); in selectIntExt()
1926 MVT DestVT = DestEVT.getSimpleVT(); in selectDivRem()
1990 MVT Op0MVT = TLI.getValueType(DL, Op0->getType(), true).getSimpleVT(); in selectShift()
2106 MVT VMVT = TLI.getValueType(DL, V->getType(), true).getSimpleVT(); in getRegEnsuringSimpleIntegerWidening()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.h306 if (VT.getSimpleVT().getScalarType() == MVT::i1) in isShuffleMaskLegal()
309 return isTypeLegal(VT.getSimpleVT()); in isShuffleMaskLegal()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp297 VT = evt.getSimpleVT(); in isTypeLegal()
492 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore()
664 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore()
702 Register RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, Src); in X86FastEmitExtend()
905 MVT PtrVT = TLI.getValueType(DL, U->getType()).getSimpleVT(); in X86SelectAddress()
1264 fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op, SrcReg); in X86SelectRet()
1363 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpOpcode()
1385 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpImmediateOpcode()
1582 ResultReg = fastEmit_r(MVT::i8, DstVT.getSimpleVT(), ISD::ZERO_EXTEND, in X86SelectZExt()
1626 ResultReg = fastEmit_r(MVT::i8, DstVT.getSimpleVT(), ISD::SIGN_EXTEND, in X86SelectSExt()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp267 TLI->getAsmOperandValueType(DL, OpTy, true).getSimpleVT(); in lowerInlineAsm()
277 TLI->getAsmOperandValueType(DL, Call.getType()).getSimpleVT(); in lowerInlineAsm()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp262 VT = Evt.getSimpleVT(); in isTypeLegal()
812 MVT SrcVT = SrcEVT.getSimpleVT(); in PPCEmitCmp()
1064 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP()
1740 MVT RVVT = RVEVT.getSimpleVT(); in SelectRet()
1904 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt()
1905 MVT DestVT = DestEVT.getSimpleVT(); in SelectIntExt()
2246 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1026 MVT SVT = VT.getSimpleVT(); in getTypeConversion()
1115 MVT NVT = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts); in getTypeConversion()
1138 MVT LargerVector = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts); in getTypeConversion()
1633 RegisterVT = RegisterEVT.getSimpleVT(); in getVectorTypeBreakdown()
2313 MVT LoadMVT = LoadVT.getSimpleVT(); in isLoadBitCastBeneficial()
2318 getTypeToPromoteTo(ISD::LOAD, LoadMVT) == BitcastVT.getSimpleVT()) in isLoadBitCastBeneficial()
H A DValueTypes.cpp331 return getScalarType().getSimpleVT().getFltSemantics(); in getFltSemantics()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInterleavedAccess.cpp39 MVT ContainerVT = VT.getSimpleVT(); in isLegalInterleavedAccessType()
49 ContainerVT = getContainerForFixedLengthVector(VT.getSimpleVT()); in isLegalInterleavedAccessType()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp240 MVT MT1 = VT1.getSimpleVT().SimpleTy; in isZExtFree()
241 MVT MT2 = VT2.getSimpleVT().SimpleTy; in isZExtFree()
368 MVT::SimpleValueType SimpleTy = RegVT.getSimpleVT().SimpleTy; in LowerFormalArguments()

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