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Searched refs:getMRI (Results 1 – 25 of 47) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp139 assert(Res.getLLTTy(*getMRI()).isPointer() && "expected ptr dst type"); in buildDynStackAlloc()
141 Res.addDefToMIB(*getMRI(), MIB); in buildDynStackAlloc()
149 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); in buildFrameIndex()
151 Res.addDefToMIB(*getMRI(), MIB); in buildFrameIndex()
158 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); in buildGlobalValue()
159 assert(Res.getLLTTy(*getMRI()).getAddressSpace() == in buildGlobalValue()
164 Res.addDefToMIB(*getMRI(), MIB); in buildGlobalValue()
171 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); in buildConstantPool()
173 Res.addDefToMIB(*getMRI(), MIB); in buildConstantPool()
204 assert(Res.getLLTTy(*getMRI()).isPointerOrPointerVector() && in buildPtrAdd()
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H A DCSEMIRBuilder.cpp84 B.addNodeIDRegType(Op.getLLTTy(*getMRI())); in profileDstOp()
189 LLT SrcTy = SrcOps[1].getLLTTy(*getMRI()); in buildInstr()
190 LLT DstTy = DstOps[0].getLLTTy(*getMRI()); in buildInstr()
195 DstTy.getScalarSizeInBits(), BoolExtOp, *getMRI())) { in buildInstr()
223 LLT SrcTy = SrcOps[0].getLLTTy(*getMRI()); in buildInstr()
232 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI()); in buildInstr()
239 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI())) in buildInstr()
259 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI())) in buildInstr()
270 ConstantFoldExtOp(Opc, Src0.getReg(), Src1.getImm(), *getMRI())) in buildInstr()
280 Opc, DstOps[0].getLLTTy(*getMRI()), SrcOps[0].getReg(), *getMRI())) in buildInstr()
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H A DInlineAsmLowering.cpp186 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildAnyextOrCopy()
229 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in lowerInlineAsm()
H A DCallLowering.cpp328 MachineRegisterInfo &MRI = *B.getMRI(); in mergeVectorRegsToResultRegs()
375 MachineRegisterInfo &MRI = *B.getMRI(); in buildCopyFromRegs()
609 MachineRegisterInfo &MRI = *B.getMRI(); in buildCopyToRegs()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVBuiltins.cpp459 MIRBuilder.getMRI()->createGenericVirtualRegister(Type); in buildBoolRegister()
460 MIRBuilder.getMRI()->setRegClass(ResultRegister, GR->getRegClass(ResultType)); in buildBoolRegister()
510 MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::pIDRegClass); in buildBuiltinVariableLoad()
511 MIRBuilder.getMRI()->setType( in buildBuiltinVariableLoad()
529 MIRBuilder.getMRI()->setType(LoadedRegister, LLType); in buildBuiltinVariableLoad()
616 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildMemSemanticsReg()
726 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildAtomicCompareExchangeInst()
827 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildAtomicRMWInst()
907 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildAtomicFlagInst()
953 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildBarrierInst()
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H A DSPIRVCallLowering.cpp421 auto MRI = MIRBuilder.getMRI(); in lowerFormalArguments()
578 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in lowerCall()
711 ResVReg = MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::iIDRegClass); in lowerCall()
H A DSPIRVUtils.cpp787 GR, MIRBuilder.getMRI(), MIRBuilder.getMF(), Force); in setRegClassType()
805 return createVirtualRegister(SpvType, GR, MIRBuilder.getMRI(), in createVirtualRegister()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUGlobalISelUtils.cpp136 LLT Ty = B.getMRI()->getType(VgprSrc); in buildReadAnyLane()
151 LLT Ty = B.getMRI()->getType(VgprSrc); in buildReadAnyLane()
H A DAMDGPURegBankSelect.cpp93 : B(B), MRI(*B.getMRI()), ILMA(ILMA), MUI(MUI), TRI(TRI), in RegBankSelectHelper()
222 MachineRegisterInfo &MRI = *B.getMRI(); in runOnMachineFunction()
H A DAMDGPULegalizerInfo.cpp639 MachineRegisterInfo &MRI = *B.getMRI(); in castBufferRsrcToV4I32()
661 const LLT PointerTy = B.getMRI()->getType(MO.getReg()); in castBufferRsrcArgToV4I32()
2137 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeCustom()
2933 B.getMRI()->createGenericVirtualRegister(ConstPtrTy); in buildPCRelGlobalAddress()
2944 if (!B.getMRI()->getRegClassOrNull(PCReg)) in buildPCRelGlobalAddress()
2945 B.getMRI()->setRegClass(PCReg, &AMDGPU::SReg_64RegClass); in buildPCRelGlobalAddress()
3125 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeLoad()
3214 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeStore()
3353 LLT Ty = B.getMRI()->getType(Dst); in legalizeFlog2()
3404 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeFlogCommon()
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H A DSIPeepholeSDWA.cpp120 MachineRegisterInfo *getMRI() const { in getMRI() function in __anon5b8513100111::SDWAOperand
395 for (MachineInstr &UseMI : getMRI()->use_nodbg_instructions(Reg->getReg())) in potentialToConvert()
403 for (MachineOperand &UseMO : getMRI()->use_nodbg_operands(Reg->getReg())) { in potentialToConvert()
416 MachineOperand *PotentialMO = findSingleRegUse(getReplacedOperand(), getMRI()); in potentialToConvert()
570 MachineRegisterInfo *MRI = getMRI(); in potentialToConvert()
636 getMRI()->clearKillFlags(MO.getReg()); in convertToSDWA()
H A DAMDGPURegisterBankInfo.cpp665 MachineRegisterInfo *MRI = B.getMRI(); in split64BitValueForMapping()
802 MachineRegisterInfo &MRI = *B.getMRI(); in executeInWaterfallLoop()
1006 if (!collectWaterfallOperands(SGPROperandRegs, MI, *B.getMRI(), OpIndices)) in executeInWaterfallLoop()
1018 MachineRegisterInfo &MRI = *B.getMRI(); in constrainOpWithReadfirstlane()
1058 MachineRegisterInfo &MRI = *B.getMRI(); in applyMappingLoad()
1176 MachineRegisterInfo &MRI = *B.getMRI(); in applyMappingDynStackAlloc()
1260 MachineRegisterInfo *MRI = B.getMRI(); in setBufferOffsets()
1270 B.getMRI()->setRegBank(VOffsetReg, AMDGPU::VGPRRegBank); in setBufferOffsets()
1271 B.getMRI()->setRegBank(SOffsetReg, AMDGPU::SGPRRegBank); in setBufferOffsets()
1288 B.getMRI()->setRegBank(SOffsetReg, AMDGPU::SGPRRegBank); in setBufferOffsets()
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H A DAMDGPURegBankLegalize.cpp113 : B(B), MRI(*B.getMRI()), TRI(TRI), in AMDGPURegBankLegalizeCombiner()
H A DSIMachineScheduler.h452 MachineRegisterInfo *getMRI() { return &MRI; } in getMRI() function
H A DSIMachineScheduler.cpp305 MachineRegisterInfo *MRI = DAG->getMRI(); in initRegPressure()
1692 PSetIterator PSetI = DAG->getMRI()->getPressureSets(Reg); in checkRegUsageImpact()
1702 PSetIterator PSetI = DAG->getMRI()->getPressureSets(Reg); in checkRegUsageImpact()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVLegalizerInfo.cpp710 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeIntrinsic()
742 LLT AddrTy = MIRBuilder.getMRI()->getType(MI.getOperand(0).getReg()); in legalizeVAStart()
753 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeBRJT()
893 MachineRegisterInfo &MRI = *MIB.getMRI(); in legalizeExt()
914 MachineRegisterInfo &MRI = *MIB.getMRI(); in legalizeLoadStore()
1013 MachineRegisterInfo &MRI = *MIB.getMRI(); in legalizeSplatVector()
1073 MachineRegisterInfo &MRI = *MIB.getMRI(); in legalizeExtractSubvector()
1164 MachineRegisterInfo &MRI = *MIB.getMRI(); in legalizeInsertSubvector()
1322 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64GlobalISelUtils.cpp65 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in tryEmitBZero()
H A DAArch64InstructionSelector.cpp1185 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitSelect()
1601 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitTestBit()
1654 AndInst.getOperand(2).getReg(), *MIB.getMRI()); in tryOptAndIntoCompareBranch()
1674 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitCBZ()
1721 MachineRegisterInfo &MRI = *MIB.getMRI(); in tryOptCompareBranchFedByICmp()
4021 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in emitExtractVectorElt()
4479 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in emitADCS()
4490 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in emitSBCS()
4554 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in emitCSetForFCmp()
4581 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in emitFPCompare()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.cpp182 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterBankInfo.h336 MachineRegisterInfo &getMRI() const { return MRI; } in getMRI() function
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h310 MachineRegisterInfo *getMRI() { return State.MRI; } in getMRI() function
311 const MachineRegisterInfo *getMRI() const { return State.MRI; } in getMRI() function
1990 auto NegOne = buildConstant(Dst.getLLTTy(*getMRI()), -1); in buildNot()
1998 auto Zero = buildConstant(Dst.getLLTTy(*getMRI()), 0); in buildNeg()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp152 MIRBuilder.getMRI()->addLiveIn(PhysReg); in assignValueToReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp239 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp1616 const MCRegisterInfo *getMRI() const { in getMRI() function in __anon6862249c0111::AMDGPUAsmParser
2222 return isRegKind() && AsmParser->getMRI()->getRegClass(RCID).contains(getReg()); in isRegClass()
4137 unsigned VDataSize = AMDGPU::getRegOperandSize(getMRI(), Desc, VDataIdx); in validateMIMGDataSize()
4203 : AMDGPU::getRegOperandSize(getMRI(), Desc, VAddr0Idx) / 4; in validateMIMGAddrSize()
4214 AMDGPU::getRegOperandSize(getMRI(), Desc, VAddrLastIdx) / 4; in validateMIMGAddrSize()
4893 const MCRegisterInfo *MRI = getMRI(); in validateTrue16OpSel()
5109 const MCRegisterInfo *MRI = getMRI(); in validateAGPRLdSt()
5137 const MCRegisterInfo *MRI = getMRI(); in validateVGPRAlign()
5257 const MCRegisterInfo *MRI = getMRI(); in validateGWS()
8988 cvtVOP3DstOpSelOnly(Inst, *getMRI()); in cvtVOP3OpSel()
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