/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.cpp | 139 assert(Res.getLLTTy(*getMRI()).isPointer() && "expected ptr dst type"); in buildDynStackAlloc() 141 Res.addDefToMIB(*getMRI(), MIB); in buildDynStackAlloc() 149 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); in buildFrameIndex() 151 Res.addDefToMIB(*getMRI(), MIB); in buildFrameIndex() 158 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); in buildGlobalValue() 159 assert(Res.getLLTTy(*getMRI()).getAddressSpace() == in buildGlobalValue() 164 Res.addDefToMIB(*getMRI(), MIB); in buildGlobalValue() 171 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); in buildConstantPool() 173 Res.addDefToMIB(*getMRI(), MIB); in buildConstantPool() 204 assert(Res.getLLTTy(*getMRI()).isPointerOrPointerVector() && in buildPtrAdd() [all …]
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H A D | CSEMIRBuilder.cpp | 85 B.addNodeIDRegType(Op.getLLTTy(*getMRI())); in profileDstOp() 185 LLT SrcTy = SrcOps[1].getLLTTy(*getMRI()); in buildInstr() 189 SrcOps[2].getReg(), *getMRI())) { in buildInstr() 217 LLT SrcTy = SrcOps[0].getLLTTy(*getMRI()); in buildInstr() 226 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI()); in buildInstr() 233 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI())) in buildInstr() 253 Opc, SrcOps[0].getReg(), SrcOps[1].getReg(), *getMRI())) in buildInstr() 264 ConstantFoldExtOp(Opc, Src0.getReg(), Src1.getImm(), *getMRI())) in buildInstr() 274 Opc, DstOps[0].getLLTTy(*getMRI()), SrcOps[0].getReg(), *getMRI())) in buildInstr() 287 auto MaybeCsts = ConstantFoldCountZeros(SrcOps[0].getReg(), *getMRI(), CB); in buildInstr() [all …]
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H A D | InlineAsmLowering.cpp | 186 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildAnyextOrCopy() 229 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in lowerInlineAsm()
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H A D | CallLowering.cpp | 329 MachineRegisterInfo &MRI = *B.getMRI(); in mergeVectorRegsToResultRegs() 376 MachineRegisterInfo &MRI = *B.getMRI(); in buildCopyFromRegs() 610 MachineRegisterInfo &MRI = *B.getMRI(); in buildCopyToRegs()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
H A D | SPIRVBuiltins.cpp | 410 MIRBuilder.getMRI()->createGenericVirtualRegister(Type); in buildBoolRegister() 411 MIRBuilder.getMRI()->setRegClass(ResultRegister, &SPIRV::IDRegClass); in buildBoolRegister() 443 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildLoadInst() 463 MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::IDRegClass); in buildBuiltinVariableLoad() 464 MIRBuilder.getMRI()->setType(NewRegister, in buildBuiltinVariableLoad() 480 MIRBuilder.getMRI()->setType(LoadedRegister, LLType); in buildBuiltinVariableLoad() 559 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildMemSemanticsReg() 578 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); 602 MIRBuilder.getMRI()->setRegClass(Call->Arguments[0], &SPIRV::IDRegClass); in buildAtomicInitInst() 603 MIRBuilder.getMRI()->setRegClass(Call->Arguments[1], &SPIRV::IDRegClass); in buildAtomicInitInst() [all …]
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H A D | SPIRVCallLowering.cpp | 373 auto MRI = MIRBuilder.getMRI(); in lowerFormalArguments() 519 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in lowerCall() 599 ResVReg = MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::IDRegClass); in lowerCall()
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H A D | SPIRVPreLegalizer.cpp | 198 if (MachineInstr *AssignMI = findAssignTypeInstr(Def, MIB.getMRI())) in insertBitcasts() 200 MIB.getMRI()->replaceRegWith(Def, Source); in insertBitcasts()
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H A D | SPIRVInstructionSelector.cpp | 2244 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in selectGlobalValue() 2364 MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::IDRegClass); in selectSpvThreadId() 2365 MIRBuilder.getMRI()->setType(NewRegister, LLT::pointer(0, 32)); in selectSpvThreadId() 2376 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in selectSpvThreadId() 2378 MIRBuilder.getMRI()->setType(LoadedRegister, LLT::pointer(0, 32)); in selectSpvThreadId()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIPeepholeSDWA.cpp | 106 MachineRegisterInfo *getMRI() const { in getMRI() function in __anon5b8513100111::SDWAOperand 346 for (MachineInstr &UseMI : getMRI()->use_nodbg_instructions(Reg->getReg())) in potentialToConvert() 353 for (MachineOperand &UseMO : getMRI()->use_nodbg_operands(Reg->getReg())) { in potentialToConvert() 366 MachineOperand *PotentialMO = findSingleRegUse(getReplacedOperand(), getMRI()); in potentialToConvert() 461 MachineRegisterInfo *MRI = getMRI(); in potentialToConvert() 515 getMRI()->clearKillFlags(MO.getReg()); in convertToSDWA()
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H A D | AMDGPURegisterBankInfo.cpp | 665 MachineRegisterInfo *MRI = B.getMRI(); in split64BitValueForMapping() 802 MachineRegisterInfo &MRI = *B.getMRI(); in executeInWaterfallLoop() 1006 if (!collectWaterfallOperands(SGPROperandRegs, MI, *B.getMRI(), OpIndices)) in executeInWaterfallLoop() 1018 MachineRegisterInfo &MRI = *B.getMRI(); in constrainOpWithReadfirstlane() 1058 MachineRegisterInfo &MRI = *B.getMRI(); in applyMappingLoad() 1173 MachineRegisterInfo &MRI = *B.getMRI(); in applyMappingDynStackAlloc() 1250 MachineRegisterInfo *MRI = B.getMRI(); in setBufferOffsets() 1260 B.getMRI()->setRegBank(VOffsetReg, AMDGPU::VGPRRegBank); in setBufferOffsets() 1261 B.getMRI()->setRegBank(SOffsetReg, AMDGPU::SGPRRegBank); in setBufferOffsets() 1278 B.getMRI()->setRegBank(SOffsetReg, AMDGPU::SGPRRegBank); in setBufferOffsets() [all …]
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H A D | AMDGPULegalizerInfo.cpp | 626 MachineRegisterInfo &MRI = *B.getMRI(); in castBufferRsrcToV4I32() 648 const LLT PointerTy = B.getMRI()->getType(MO.getReg()); in castBufferRsrcArgToV4I32() 2089 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeCustom() 2875 B.getMRI()->createGenericVirtualRegister(ConstPtrTy); in buildPCRelGlobalAddress() 2886 if (!B.getMRI()->getRegClassOrNull(PCReg)) in buildPCRelGlobalAddress() 2887 B.getMRI()->setRegClass(PCReg, &AMDGPU::SReg_64RegClass); in buildPCRelGlobalAddress() 3067 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeLoad() 3156 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeStore() 3295 LLT Ty = B.getMRI()->getType(Dst); in legalizeFlog2() 3346 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeFlogCommon() [all …]
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H A D | SIMachineScheduler.h | 452 MachineRegisterInfo *getMRI() { return &MRI; } in getMRI() function
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H A D | SIMachineScheduler.cpp | 309 MachineRegisterInfo *MRI = DAG->getMRI(); in initRegPressure() 1704 PSetIterator PSetI = DAG->getMRI()->getPressureSets(Reg); in checkRegUsageImpact() 1714 PSetIterator PSetI = DAG->getMRI()->getPressureSets(Reg); in checkRegUsageImpact()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVLegalizerInfo.cpp | 486 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeIntrinsic() 517 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeShlAshrLshr() 542 LLT AddrTy = MIRBuilder.getMRI()->getType(MI.getOperand(0).getReg()); in legalizeVAStart() 638 MachineRegisterInfo &MRI = *MIB.getMRI(); in legalizeExt() 718 MachineRegisterInfo &MRI = *MIB.getMRI(); in legalizeSplatVector()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64GlobalISelUtils.cpp | 67 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in tryEmitBZero()
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H A D | AArch64InstructionSelector.cpp | 1177 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitSelect() 1593 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitTestBit() 1646 AndInst.getOperand(2).getReg(), *MIB.getMRI()); in tryOptAndIntoCompareBranch() 1666 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitCBZ() 1713 MachineRegisterInfo &MRI = *MIB.getMRI(); in tryOptCompareBranchFedByICmp() 3886 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in emitExtractVectorElt() 4344 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in emitADCS() 4355 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in emitSBCS() 4419 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in emitCSetForFCmp() 4446 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in emitFPCompare() [all …]
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H A D | AArch64LegalizerInfo.cpp | 1301 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom() 1578 MachineRegisterInfo &MRI = *MIB.getMRI(); in legalizeIntrinsic() 1616 MachineRegisterInfo &MRI = *MIB.getMRI(); in legalizeIntrinsic() 2114 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCTTZ() 2155 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeDynStackAlloc()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCCallLowering.cpp | 185 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | RegisterBankInfo.h | 336 MachineRegisterInfo &getMRI() const { return MRI; } in getMRI() function
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 298 MachineRegisterInfo *getMRI() { return State.MRI; } in getMRI() function 299 const MachineRegisterInfo *getMRI() const { return State.MRI; } in getMRI() function 1821 auto NegOne = buildConstant(Dst.getLLTTy(*getMRI()), -1); in buildNot() 1829 auto Zero = buildConstant(Dst.getLLTTy(*getMRI()), 0); in buildNeg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
H A D | M68kCallLowering.cpp | 152 MIRBuilder.getMRI()->addLiveIn(PhysReg); in assignValueToReg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86CallLowering.cpp |
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86CallLowering.cpp | 240 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMCallLowering.cpp | 365 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 1552 const MCRegisterInfo *getMRI() const { in getMRI() function in __anon6862249c0111::AMDGPUAsmParser 2145 return isRegKind() && AsmParser->getMRI()->getRegClass(RCID).contains(getReg()); in isRegClass() 3877 unsigned VDataSize = AMDGPU::getRegOperandSize(getMRI(), Desc, VDataIdx); in validateMIMGDataSize() 3942 : AMDGPU::getRegOperandSize(getMRI(), Desc, VAddr0Idx) / 4; in validateMIMGAddrSize() 3953 AMDGPU::getRegOperandSize(getMRI(), Desc, VAddrLastIdx) / 4; in validateMIMGAddrSize() 4742 const MCRegisterInfo *MRI = getMRI(); in validateAGPRLdSt() 4767 const MCRegisterInfo *MRI = getMRI(); in validateVGPRAlign() 4887 const MCRegisterInfo *MRI = getMRI(); in validateGWS() 8516 cvtVOP3DstOpSelOnly(Inst, *getMRI()); in cvtVOP3OpSel() 8522 cvtVOP3DstOpSelOnly(Inst, *getMRI()); in cvtVOP3OpSel() [all …]
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