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Searched refs:SVT (Results 1 – 25 of 30) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizePointerCast.cpp119 auto *SVT = dyn_cast<FixedVectorType>(FromTy); in transformLoad() local
134 else if (!DVT && SVT && SVT->getElementType() == ToTy) { in transformLoad()
135 Output = loadFirstValueFromAggregate(B, SVT->getElementType(), in transformLoad()
140 else if (SVT && DVT) in transformLoad()
141 Output = loadVectorFromVector(B, SVT, DVT, OriginalOperand); in transformLoad()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCSymbolXCOFF.h57 void setVisibilityType(XCOFF::VisibilityType SVT) { VisibilityType = SVT; }; in setVisibilityType() argument
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1026 MVT SVT = VT.getSimpleVT(); in getTypeConversion() local
1027 assert((unsigned)SVT.SimpleTy < std::size(TransformToType)); in getTypeConversion()
1028 MVT NVT = TransformToType[SVT.SimpleTy]; in getTypeConversion()
1029 LegalizeTypeAction LA = ValueTypeActions.getTypeAction(SVT); in getTypeConversion()
1038 return LegalizeKind(LA, EVT(SVT).getHalfNumVectorElementsVT(Context)); in getTypeConversion()
1040 return LegalizeKind(LA, SVT.getVectorElementType()); in getTypeConversion()
1496 MVT SVT = (MVT::SimpleValueType) nVT; in computeRegisterProperties() local
1499 if (SVT.getScalarSizeInBits() > EltVT.getFixedSizeInBits() && in computeRegisterProperties()
1500 SVT.getVectorElementCount() == EC && isTypeLegal(SVT)) { in computeRegisterProperties()
1501 TransformToType[i] = SVT; in computeRegisterProperties()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp1079 EVT SVT = N->getOperand(IsStrict ? 1 : 0).getValueType(); in SoftenFloatRes_XINT_TO_FP() local
1092 if (NVT.bitsGE(SVT)) in SoftenFloatRes_XINT_TO_FP()
1103 CallOptions.setTypeListBeforeSoften(SVT, RVT, true); in SoftenFloatRes_XINT_TO_FP()
1209 EVT SVT = Op.getValueType(); in SoftenFloatOp_FP_ROUND() local
1219 RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, FloatRVT); in SoftenFloatOp_FP_ROUND()
1225 CallOptions.setTypeListBeforeSoften(SVT, RVT, true); in SoftenFloatOp_FP_ROUND()
1285 EVT SVT = Op.getValueType(); in SoftenFloatOp_FP_TO_XINT() local
1294 RTLIB::Libcall LC = findFPToIntLibcall(SVT, RVT, NVT, Signed); in SoftenFloatOp_FP_TO_XINT()
1301 CallOptions.setTypeListBeforeSoften(SVT, RVT, true); in SoftenFloatOp_FP_TO_XINT()
3559 EVT SVT = Op.getValueType(); in SoftPromoteHalfRes_FP_ROUND() local
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H A DSelectionDAG.cpp364 EVT SVT = Op.getValueType().getScalarType(); in matchUnaryPredicateImpl() local
373 if (!Cst || (!AllowTruncation && Cst->getValueType(0) != SVT) || in matchUnaryPredicateImpl()
403 EVT SVT = LHS.getValueType().getScalarType(); in matchBinaryPredicate() local
413 if (!AllowTypeMismatch && (LHSOp.getValueType() != SVT || in matchBinaryPredicate()
3246 EVT SVT = SrcVector.getValueType().getScalarType(); in getSplatValue() local
3247 EVT LegalSVT = SVT; in getSplatValue()
3248 if (LegalTypes && !TLI->isTypeLegal(SVT)) { in getSplatValue()
3249 if (!SVT.isInteger()) in getSplatValue()
3252 if (LegalSVT.bitsLT(SVT)) in getSplatValue()
6244 EVT SVT = VT.getScalarType(); in foldCONCAT_VECTORS() local
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H A DLegalizeDAG.cpp341 EVT SVT = VT; in ExpandConstantFP() local
346 while (SVT != MVT::f32 && SVT != MVT::f16 && SVT != MVT::bf16) { in ExpandConstantFP()
347 SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1); in ExpandConstantFP()
348 if (ConstantFPSDNode::isValueValidForType(SVT, APF) && in ExpandConstantFP()
351 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP()
353 Type *SType = SVT.getTypeForEVT(*DAG.getContext()); in ExpandConstantFP()
356 VT = SVT; in ExpandConstantFP()
912 EVT SVT = SrcVT.getScalarType(); in LegalizeLoadOps() local
913 if (SVT == MVT::f16 || SVT == MVT::bf16) { in LegalizeLoadOps()
921 DAG.getNode(SVT == MVT::f16 ? ISD::FP16_TO_FP : ISD::BF16_TO_FP, in LegalizeLoadOps()
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H A DLegalizeIntegerTypes.cpp432 EVT SVT = getSetCCResultType(N->getOperand(2).getValueType()); in PromoteIntRes_AtomicCmpSwap() local
437 if (!TLI.isTypeLegal(SVT)) in PromoteIntRes_AtomicCmpSwap()
438 SVT = NVT; in PromoteIntRes_AtomicCmpSwap()
440 SDVTList VTs = DAG.getVTList(N->getValueType(0), SVT, MVT::Other); in PromoteIntRes_AtomicCmpSwap()
842 EVT SVT = In.getValueType().getScalarType(); in PromoteIntRes_EXTRACT_VECTOR_ELT() local
843 if (SVT.bitsGE(NVT)) { in PromoteIntRes_EXTRACT_VECTOR_ELT()
844 SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SVT, In, Op1); in PromoteIntRes_EXTRACT_VECTOR_ELT()
1053 EVT SVT = getSetCCResultType(VT); in PromoteIntRes_Overflow() local
1061 SDValue Res = DAG.getNode(N->getOpcode(), dl, DAG.getVTList(VT, SVT), in PromoteIntRes_Overflow()
1384 EVT SVT = getSetCCResultType(InVT); in PromoteIntRes_SETCC() local
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H A DDAGCombiner.cpp13775 EVT SVT = VT.getScalarType(); in tryToFoldExtendOfConstant() local
13776 if (!(VT.isVector() && (!LegalTypes || TLI.isTypeLegal(SVT)) && in tryToFoldExtendOfConstant()
13781 unsigned VTBits = SVT.getSizeInBits(); in tryToFoldExtendOfConstant()
13790 Elts.push_back(DAG.getUNDEF(SVT)); in tryToFoldExtendOfConstant()
13792 Elts.push_back(DAG.getConstant(0, DL, SVT)); in tryToFoldExtendOfConstant()
13801 Elts.push_back(DAG.getConstant(C.sext(VTBits), DL, SVT)); in tryToFoldExtendOfConstant()
13803 Elts.push_back(DAG.getConstant(C.zext(VTBits), DL, SVT)); in tryToFoldExtendOfConstant()
14320 EVT SVT = getSetCCResultType(N00VT); in foldSextSetcc() local
14323 if (SVT != N0.getValueType()) { in foldSextSetcc()
14329 if (VT.getSizeInBits() == SVT.getSizeInBits()) in foldSextSetcc()
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H A DTargetLowering.cpp6322 EVT SVT = VT.getScalarType(); in BuildExactSDIV() local
6340 Factors.push_back(DAG.getConstant(Factor, dl, SVT)); in BuildExactSDIV()
6380 EVT SVT = VT.getScalarType(); in BuildExactUDIV() local
6399 Factors.push_back(DAG.getConstant(Factor, dl, SVT)); in BuildExactUDIV()
6506 EVT SVT = VT.getScalarType(); in BuildSDIV() local
6559 MagicFactors.push_back(DAG.getConstant(magics.Magic, dl, SVT)); in BuildSDIV()
6560 Factors.push_back(DAG.getSignedConstant(NumeratorFactor, dl, SVT)); in BuildSDIV()
6562 ShiftMasks.push_back(DAG.getSignedConstant(ShiftMask, dl, SVT)); in BuildSDIV()
6674 EVT SVT = VT.getScalarType(); in BuildUDIV() local
6723 MagicFactor = NPQFactor = DAG.getUNDEF(SVT); in BuildUDIV()
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H A DLegalizeVectorTypes.cpp7590 EVT SVT = getSetCCResultType(InOp0.getValueType()); in WidenVecOp_SETCC() local
7593 SVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, in WidenVecOp_SETCC()
7594 SVT.getVectorElementCount()); in WidenVecOp_SETCC()
7597 SVT, InOp0, InOp1, N->getOperand(2)); in WidenVecOp_SETCC()
7601 SVT.getVectorElementType(), in WidenVecOp_SETCC()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h42 constexpr EVT(MVT::SimpleValueType SVT) : V(SVT) {} in EVT()
H A DSelectionDAG.h1511 MachinePointerInfo PtrInfo, EVT SVT, Align Alignment,
1516 MachinePointerInfo PtrInfo, EVT SVT,
1520 return getTruncStore(Chain, dl, Val, Ptr, PtrInfo, SVT,
1521 Alignment.value_or(getEVTAlign(SVT)), MMOFlags,
1525 SDValue Ptr, EVT SVT, MachineMemOperand *MMO);
1530 SDValue Ptr, SDValue Offset, EVT SVT,
1590 MachinePointerInfo PtrInfo, EVT SVT,
1597 EVT SVT, MachineMemOperand *MMO,
1627 SDValue EVL, EVT SVT,
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DMachineValueType.h59 constexpr MVT(SimpleValueType SVT) : SimpleTy(SVT) {} in MVT() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp199 Type *SVT = VT->getElementType(); in simplifyX86immShift() local
202 unsigned BitWidth = SVT->getPrimitiveSizeInBits(); in simplifyX86immShift()
212 Amt = Builder.CreateZExtOrTrunc(Amt, SVT); in simplifyX86immShift()
221 Amt = ConstantInt::get(SVT, BitWidth - 1); in simplifyX86immShift()
228 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
255 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
282 auto ShiftAmt = ConstantInt::get(SVT, Count.zextOrTrunc(BitWidth)); in simplifyX86immShift()
347 Type *SVT = VT->getElementType(); in simplifyX86varShift() local
349 int BitWidth = SVT->getIntegerBitWidth(); in simplifyX86varShift()
401 ConstantVec.push_back(UndefValue::get(SVT)); in simplifyX86varShift()
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H A DX86ISelLowering.cpp4224 MVT SVT = Vec.getSimpleValueType().getScalarType(); in widenSubVector() local
4225 MVT VT = MVT::getVectorVT(SVT, WideNumElts); in widenSubVector()
4497 MVT SVT = VT.getScalarType(); in getAVX512Node() local
4506 !DAG.getTargetLoweringInfo().isTypeLegal(SVT)) in getAVX512Node()
4527 DstVT = MVT::getVectorVT(SVT, 512 / SVT.getSizeInBits()); in getAVX512Node()
13111 MVT SVT = VT.getScalarType(); in lowerShuffleAsBroadcast() local
13112 unsigned Offset = BroadcastIdx * SVT.getStoreSize(); in lowerShuffleAsBroadcast()
13124 X86ISD::VBROADCAST_LOAD, DL, Tys, Ops, SVT, in lowerShuffleAsBroadcast()
13126 Ld->getMemOperand(), Offset, SVT.getStoreSize())); in lowerShuffleAsBroadcast()
13130 assert(SVT == MVT::f64 && "Unexpected VT!"); in lowerShuffleAsBroadcast()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp4662 EVT SVT; in trySelectXAR() local
4666 SVT = MVT::nxv4i32; in trySelectXAR()
4670 SVT = MVT::nxv8i16; in trySelectXAR()
4674 SVT = MVT::nxv16i8; in trySelectXAR()
4678 SVT = Subtarget->hasSHA3() ? MVT::v2i64 : MVT::nxv2i64; in trySelectXAR()
4684 if ((!SVT.isScalableVector() && !Subtarget->hasSHA3()) || in trySelectXAR()
4685 (SVT.isScalableVector() && !Subtarget->hasSVE2())) in trySelectXAR()
4725 if (SVT != VT) { in trySelectXAR()
4727 SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, SVT), 0); in trySelectXAR()
4729 if (SVT.isScalableVector() && VT.is64BitVector()) { in trySelectXAR()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp1347 EVT SVT = (UW == 32 || UW == 64) ? MVT::getIntegerVT(UW) : UVT; in ppHoistZextI1() local
1348 SDValue Sel = DAG.getNode(ISD::SELECT, dl, SVT, OpI1, in ppHoistZextI1()
1349 DAG.getBitcast(SVT, If1), in ppHoistZextI1()
1350 DAG.getBitcast(SVT, If0)); in ppHoistZextI1()
H A DHexagonISelLowering.cpp3836 MVT SVT = VT.getSimpleVT(); in allowsMemoryAccess() local
3837 if (Subtarget.isHVXVectorType(SVT, true)) in allowsMemoryAccess()
3838 return allowsHvxMemoryAccess(SVT, Flags, Fast); in allowsMemoryAccess()
3848 MVT SVT = VT.getSimpleVT(); in allowsMisalignedMemoryAccesses() local
3849 if (Subtarget.isHVXVectorType(SVT, true)) in allowsMisalignedMemoryAccesses()
3850 return allowsHvxMisalignedMemoryAccesses(SVT, Flags, Fast); in allowsMisalignedMemoryAccesses()
H A DHexagonISelDAGToDAGHVX.cpp1172 MVT::SimpleValueType SVT = MVT::SimpleValueType(R.OpN & OpRef::Index); in materialize() local
1173 Ops.push_back(ISel.selectUndef(dl, MVT(SVT))); in materialize()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/
H A DGlobalISelMatchTable.cpp437 std::optional<LLTCodeGen> MVTToLLT(MVT::SimpleValueType SVT) { in MVTToLLT() argument
438 MVT VT(SVT); in MVTToLLT()
H A DGlobalISelMatchTable.h270 std::optional<LLTCodeGen> MVTToLLT(MVT::SimpleValueType SVT);
/freebsd/contrib/file/magic/Magdir/
H A Dsysex211 >>>4 byte 0x04 SVT (Velocity Curve)
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp5719 MVT SVT = VT.getVectorElementType(); in lowerVECTOR_SHUFFLE() local
5737 Offset *= SVT.getStoreSize(); in lowerVECTOR_SHUFFLE()
5742 if (SVT.isInteger() && SVT.bitsGT(XLenVT)) { in lowerVECTOR_SHUFFLE()
5753 ISD::INTRINSIC_W_CHAIN, DL, VTs, Ops, SVT, in lowerVECTOR_SHUFFLE()
5755 Ld->getMemOperand(), Offset, SVT.getStoreSize())); in lowerVECTOR_SHUFFLE()
5763 if (SVT == MVT::bf16 || in lowerVECTOR_SHUFFLE()
5764 (SVT == MVT::f16 && !Subtarget.hasStdExtZfh())) { in lowerVECTOR_SHUFFLE()
5765 SVT = MVT::i16; in lowerVECTOR_SHUFFLE()
5766 SplatVT = ContainerVT.changeVectorElementType(SVT); in lowerVECTOR_SHUFFLE()
5772 if (SVT.isFloatingPoint()) in lowerVECTOR_SHUFFLE()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp7096 static const TargetRegisterClass *getRegClassForSVT(MVT::SimpleValueType SVT, in getRegClassForSVT() argument
7100 assert((IsPPC64 || SVT != MVT::i64) && in getRegClassForSVT()
7103 switch (SVT) { in getRegClassForSVT()
7338 MVT::SimpleValueType SVT = VA.getLocVT().SimpleTy; in LowerFormalArguments_AIX() local
7340 getRegClassForSVT(SVT, IsPPC64, Subtarget.hasP8Vector(), in LowerFormalArguments_AIX()
7476 MVT::SimpleValueType SVT = ValVT.SimpleTy; in LowerFormalArguments_AIX() local
7479 getRegClassForSVT(SVT, IsPPC64, Subtarget.hasP8Vector(), in LowerFormalArguments_AIX()
9655 EVT SVT = SDV.getValueType(); in LowerBUILD_VECTOR() local
9656 if (SVT != DVT) { in LowerBUILD_VECTOR()
12672 EVT SVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), in ReplaceNodeResults() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp462 MVT::SimpleValueType SVT = VT.getSimpleVT().SimpleTy; in allowsMisalignedMemoryAccesses() local
476 switch (SVT) { in allowsMisalignedMemoryAccesses()

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