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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.h29 const MCSubtargetInfo &STI, raw_ostream &O) override;
36 const MCSubtargetInfo &STI, raw_ostream &O);
38 const MCSubtargetInfo &STI, raw_ostream &O);
41 const MCSubtargetInfo &STI,
46 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
49 const MCSubtargetInfo &STI, raw_ostream &O);
52 const MCSubtargetInfo &STI, raw_ostream &O);
54 const MCSubtargetInfo &STI, raw_ostream &O);
57 const MCSubtargetInfo &STI, raw_ostream &O);
59 const MCSubtargetInfo &STI, raw_ostream &O);
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H A DARMTargetStreamer.cpp135 static ARMBuildAttrs::CPUArch getArchForCPU(const MCSubtargetInfo &STI) { in getArchForCPU() argument
136 if (STI.getCPU() == "xscale") in getArchForCPU()
139 if (STI.hasFeature(ARM::HasV9_0aOps)) in getArchForCPU()
141 else if (STI.hasFeature(ARM::HasV8Ops)) { in getArchForCPU()
142 if (STI.hasFeature(ARM::FeatureRClass)) in getArchForCPU()
145 } else if (STI.hasFeature(ARM::HasV8_1MMainlineOps)) in getArchForCPU()
147 else if (STI.hasFeature(ARM::HasV8MMainlineOps)) in getArchForCPU()
149 else if (STI.hasFeature(ARM::HasV7Ops)) { in getArchForCPU()
150 if (STI.hasFeature(ARM::FeatureMClass) && STI.hasFeature(ARM::FeatureDSP)) in getArchForCPU()
153 } else if (STI.hasFeature(ARM::HasV6T2Ops)) in getArchForCPU()
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H A DARMMCCodeEmitter.cpp62 bool isThumb(const MCSubtargetInfo &STI) const { in isThumb()
63 return STI.hasFeature(ARM::ModeThumb); in isThumb()
66 bool isThumb2(const MCSubtargetInfo &STI) const { in isThumb2()
67 return isThumb(STI) && STI.hasFeature(ARM::FeatureThumb2); in isThumb2()
70 bool isTargetMachO(const MCSubtargetInfo &STI) const { in isTargetMachO()
71 const Triple &TT = STI.getTargetTriple(); in isTargetMachO()
81 const MCSubtargetInfo &STI) const;
87 const MCSubtargetInfo &STI) const;
95 const MCSubtargetInfo &STI) const;
100 const MCSubtargetInfo &STI) const;
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H A DARMInstPrinter.cpp87 StringRef Annot, const MCSubtargetInfo &STI, in printInst() argument
133 printSBitModifierOperand(MI, 6, STI, O); in printInst()
134 printPredicateOperand(MI, 4, STI, O); in printInst()
155 printSBitModifierOperand(MI, 5, STI, O); in printInst()
156 printPredicateOperand(MI, 3, STI, O); in printInst()
181 printPredicateOperand(MI, 2, STI, O); in printInst()
185 printRegisterList(MI, 4, STI, O); in printInst()
195 printPredicateOperand(MI, 4, STI, O); in printInst()
210 printPredicateOperand(MI, 2, STI, O); in printInst()
214 printRegisterList(MI, 4, STI, O); in printInst()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.h30 const MCSubtargetInfo &STI, raw_ostream &O);
35 const MCSubtargetInfo &STI, raw_ostream &O) override;
41 const MCSubtargetInfo &STI, raw_ostream &O);
44 const MCSubtargetInfo &STI, raw_ostream &O);
46 const MCSubtargetInfo &STI, raw_ostream &O);
49 void printOffset(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
51 void printFlatOffset(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
55 const MCSubtargetInfo &STI, raw_ostream &O);
57 const MCSubtargetInfo &STI, raw_ostream &O);
59 const MCSubtargetInfo &STI, raw_ostream &O);
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H A DAMDGPUInstPrinter.cpp44 StringRef Annot, const MCSubtargetInfo &STI, in printInst() argument
46 printInstruction(MI, Address, STI, OS); in printInst()
51 const MCSubtargetInfo &STI, in printU16ImmOperand() argument
65 printU32ImmOperand(MI, OpNo, STI, O); in printU16ImmOperand()
74 const MCSubtargetInfo &STI, in printU32ImmOperand() argument
80 const MCSubtargetInfo &STI, in printFP64ImmOperand() argument
85 if (STI.hasFeature(AMDGPU::Feature64BitLiterals) && Lo_32(Imm)) in printFP64ImmOperand()
99 const MCSubtargetInfo &STI, in printOffset() argument
108 if (AMDGPU::isGFX12(STI) && IsVBuffer) in printOffset()
116 const MCSubtargetInfo &STI, in printFlatOffset() argument
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H A DAMDGPUMCCodeEmitter.cpp46 const MCSubtargetInfo &STI) const override;
50 const MCSubtargetInfo &STI) const;
54 const MCSubtargetInfo &STI) const;
58 const MCSubtargetInfo &STI) const;
64 const MCSubtargetInfo &STI) const;
68 const MCSubtargetInfo &STI) const;
72 const MCSubtargetInfo &STI) const;
76 const MCSubtargetInfo &STI) const;
80 const MCSubtargetInfo &STI) const;
87 const MCSubtargetInfo &STI) const;
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.h31 const MCSubtargetInfo &STI, raw_ostream &O) override;
39 const MCSubtargetInfo &STI, raw_ostream &O);
41 const MCSubtargetInfo &STI, raw_ostream &O);
44 const MCSubtargetInfo &STI,
53 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
55 bool printSyspAlias(const MCInst *MI, const MCSubtargetInfo &STI,
57 bool printRangePrefetchAlias(const MCInst *MI, const MCSubtargetInfo &STI,
60 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
62 void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
64 void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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H A DAArch64MCCodeEmitter.cpp54 const MCSubtargetInfo &STI) const;
60 const MCSubtargetInfo &STI) const;
68 const MCSubtargetInfo &STI) const;
74 const MCSubtargetInfo &STI) const;
80 const MCSubtargetInfo &STI) const;
86 const MCSubtargetInfo &STI) const;
92 const MCSubtargetInfo &STI) const;
98 const MCSubtargetInfo &STI) const;
104 const MCSubtargetInfo &STI) const;
111 const MCSubtargetInfo &STI) const;
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCCodeEmitter.h35 bool isMicroMips(const MCSubtargetInfo &STI) const;
36 bool isMips32r6(const MCSubtargetInfo &STI) const;
49 const MCSubtargetInfo &STI) const override;
55 const MCSubtargetInfo &STI) const;
62 const MCSubtargetInfo &STI) const;
69 const MCSubtargetInfo &STI) const;
75 const MCSubtargetInfo &STI) const;
79 const MCSubtargetInfo &STI) const;
83 const MCSubtargetInfo &STI) const;
89 const MCSubtargetInfo &STI) const;
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H A DMipsInstPrinter.cpp81 StringRef Annot, const MCSubtargetInfo &STI, in printInst() argument
93 printSaveRestore(MI, STI, O); in printInst()
98 printSaveRestore(MI, STI, O); in printInst()
103 printSaveRestore(MI, STI, O); in printInst()
108 printSaveRestore(MI, STI, O); in printInst()
114 if (!printAliasInstr(MI, Address, STI, O) && in printInst()
115 !printAlias(*MI, Address, STI, O)) in printInst()
116 printInstruction(MI, Address, STI, O); in printInst()
129 const MCSubtargetInfo &STI, raw_ostream &O) { in printOperand() argument
146 const MCSubtargetInfo &STI, in printJumpOperand() argument
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H A DMipsMCCodeEmitter.cpp144 bool MipsMCCodeEmitter::isMicroMips(const MCSubtargetInfo &STI) const { in isMicroMips()
145 return STI.hasFeature(Mips::FeatureMicroMips); in isMicroMips()
148 bool MipsMCCodeEmitter::isMips32r6(const MCSubtargetInfo &STI) const { in isMips32r6()
149 return STI.hasFeature(Mips::FeatureMips32r6); in isMips32r6()
161 const MCSubtargetInfo &STI) const { in encodeInstruction()
188 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction()
199 if (isMicroMips(STI)) { in encodeInstruction()
200 if (isMips32r6(STI)) { in encodeInstruction()
217 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction()
222 unsigned RegPair = getMovePRegPairOpValue(MI, 0, Fixups, STI); in encodeInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYELFStreamer.cpp33 const MCSubtargetInfo &STI) in CSKYTargetELFStreamer() argument
36 const FeatureBitset &Features = STI.getFeatureBits(); in CSKYTargetELFStreamer()
179 void CSKYTargetELFStreamer::emitTargetAttributes(const MCSubtargetInfo &STI) { in emitTargetAttributes() argument
180 StringRef CPU = STI.getCPU(); in emitTargetAttributes()
196 if (STI.hasFeature(CSKY::HasE1)) in emitTargetAttributes()
199 if (STI.hasFeature(CSKY::HasE2)) in emitTargetAttributes()
202 if (STI.hasFeature(CSKY::Has2E3)) in emitTargetAttributes()
205 if (STI.hasFeature(CSKY::HasMP)) in emitTargetAttributes()
208 if (STI.hasFeature(CSKY::Has3E3r1)) in emitTargetAttributes()
211 if (STI.hasFeature(CSKY::Has3r1E3r2)) in emitTargetAttributes()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCInstPrinter.h36 const MCSubtargetInfo &STI, raw_ostream &O) override;
42 const MCSubtargetInfo &STI, raw_ostream &O);
46 const MCSubtargetInfo &STI, raw_ostream &OS);
49 const MCSubtargetInfo &STI, raw_ostream &OS);
51 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
54 const MCSubtargetInfo &STI, raw_ostream &O,
57 const MCSubtargetInfo &STI, raw_ostream &O);
60 const MCSubtargetInfo &STI, raw_ostream &O);
62 const MCSubtargetInfo &STI, raw_ostream &O);
64 const MCSubtargetInfo &STI, raw_ostream &O);
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H A DPPCMCCodeEmitter.h40 const MCSubtargetInfo &STI) const;
43 const MCSubtargetInfo &STI) const;
46 const MCSubtargetInfo &STI) const;
49 const MCSubtargetInfo &STI) const;
52 const MCSubtargetInfo &STI) const;
55 const MCSubtargetInfo &STI,
59 const MCSubtargetInfo &STI) const;
62 const MCSubtargetInfo &STI) const;
65 const MCSubtargetInfo &STI) const;
68 const MCSubtargetInfo &STI) cons
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H A DPPCInstPrinter.cpp57 StringRef Annot, const MCSubtargetInfo &STI, in printInst() argument
75 printOperand(MI, 0, STI, O); in printInst()
77 printOperand(MI, 2, STI, O); in printInst()
79 printOperand(MI, 1, STI, O); in printInst()
98 printInstruction(MI, Address, STI, O); in printInst()
128 printOperand(MI, 0, STI, O); in printInst()
130 printOperand(MI, 1, STI, O); in printInst()
145 printOperand(MI, 0, STI, O); in printInst()
147 printOperand(MI, 1, STI, O); in printInst()
165 (!TT.isOSAIX() || STI.hasFeature(PPC::FeatureModernAIXAs))) { in printInst()
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H A DPPCMCCodeEmitter.cpp58 const MCSubtargetInfo &STI) const { in getDirectBrEncoding()
62 return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
167 const MCSubtargetInfo &STI) const { in getCondBrEncoding()
169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
179 const MCSubtargetInfo &STI) const { in getAbsDirectBrEncoding()
181 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
191 const MCSubtargetInfo &STI) const { in getAbsCondBrEncoding()
193 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
203 const MCSubtargetInfo &STI) const { in getVSRpEvenEncoding()
205 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getVSRpEvenEncoding()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp197 bool isHsaAbi(const MCSubtargetInfo &STI) { in isHsaAbi() argument
198 return STI.getTargetTriple().getOS() == Triple::AMDHSA; in isHsaAbi()
969 AMDGPUTargetID::AMDGPUTargetID(const MCSubtargetInfo &STI) in AMDGPUTargetID() argument
970 : STI(STI), XnackSetting(TargetIDSetting::Any), in AMDGPUTargetID()
972 if (!STI.getFeatureBits().test(FeatureSupportsXNACK)) in AMDGPUTargetID()
974 if (!STI.getFeatureBits().test(FeatureSupportsSRAMECC)) in AMDGPUTargetID()
1062 auto TargetTriple = STI.getTargetTriple(); in toString()
1063 auto Version = getIsaVersion(STI.getCPU()); in toString()
1074 Processor = STI.getCPU().str(); in toString()
1081 if (STI.getTargetTriple().getOS() == Triple::AMDHSA) { in toString()
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H A DAMDGPUBaseInfo.h65 bool isHsaAbi(const MCSubtargetInfo &STI);
147 const MCSubtargetInfo &STI;
152 explicit AMDGPUTargetID(const MCSubtargetInfo &STI);
217 unsigned getWavefrontSize(const MCSubtargetInfo *STI);
220 unsigned getLocalMemorySize(const MCSubtargetInfo *STI);
224 unsigned getAddressableLocalMemorySize(const MCSubtargetInfo *STI);
228 unsigned getEUsPerCU(const MCSubtargetInfo *STI);
232 unsigned getMaxWorkGroupsPerCU(const MCSubtargetInfo *STI,
237 unsigned getMinWavesPerEU(const MCSubtargetInfo *STI);
241 unsigned getMaxWavesPerEU(const MCSubtargetInfo *STI);
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVInstPrinter.h30 const MCSubtargetInfo &STI, raw_ostream &O) override;
33 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
36 const MCSubtargetInfo &STI, raw_ostream &O);
38 const MCSubtargetInfo &STI, raw_ostream &O);
40 const MCSubtargetInfo &STI, raw_ostream &O);
41 void printFRMArg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
44 const MCSubtargetInfo &STI, raw_ostream &O);
46 const MCSubtargetInfo &STI, raw_ostream &O);
48 const MCSubtargetInfo &STI, raw_ostream &O);
49 void printVTypeI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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H A DRISCVMatInt.cpp53 static void generateInstSeqImpl(int64_t Val, const MCSubtargetInfo &STI, in generateInstSeqImpl() argument
55 bool IsRV64 = STI.hasFeature(RISCV::Feature64Bit); in generateInstSeqImpl()
58 if (STI.hasFeature(RISCV::FeatureStdExtZbs) && isPowerOf2_64(Val) && in generateInstSeqImpl()
64 if (!IsRV64 && STI.hasFeature(RISCV::FeatureVendorXqcili)) { in generateInstSeqImpl()
157 STI.hasFeature(RISCV::FeatureStdExtZba)) { in generateInstSeqImpl()
168 STI.hasFeature(RISCV::FeatureStdExtZba)) { in generateInstSeqImpl()
176 generateInstSeqImpl(Val, STI, Res); in generateInstSeqImpl()
206 static void generateInstSeqLeadingZeros(int64_t Val, const MCSubtargetInfo &STI, in generateInstSeqLeadingZeros() argument
218 generateInstSeqImpl(ShiftedVal, STI, TmpSeq); in generateInstSeqLeadingZeros()
230 generateInstSeqImpl(ShiftedVal, STI, TmpSeq); in generateInstSeqLeadingZeros()
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H A DRISCVMCCodeEmitter.cpp53 const MCSubtargetInfo &STI) const override;
57 const MCSubtargetInfo &STI) const;
61 const MCSubtargetInfo &STI) const;
65 const MCSubtargetInfo &STI) const;
69 const MCSubtargetInfo &STI) const;
73 const MCSubtargetInfo &STI, unsigned Size) const;
79 const MCSubtargetInfo &STI) const;
85 const MCSubtargetInfo &STI) const;
89 const MCSubtargetInfo &STI) const;
93 const MCSubtargetInfo &STI) const;
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/
H A DXtensaMCCodeEmitter.cpp48 const MCSubtargetInfo &STI) const override;
54 const MCSubtargetInfo &STI) const;
60 const MCSubtargetInfo &STI) const;
64 const MCSubtargetInfo &STI) const;
68 const MCSubtargetInfo &STI) const;
72 const MCSubtargetInfo &STI) const;
76 const MCSubtargetInfo &STI) const;
80 const MCSubtargetInfo &STI) const;
84 const MCSubtargetInfo &STI) const;
88 const MCSubtargetInfo &STI) const;
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEAsmPrinter.cpp50 const MCSubtargetInfo &STI);
52 const MCSubtargetInfo &STI);
54 const MCSubtargetInfo &STI);
85 const MCSubtargetInfo &STI) { in emitSIC() argument
89 OutStreamer.emitInstruction(SICInst, STI); in emitSIC()
93 const MCSubtargetInfo &STI) { in emitBSIC() argument
101 OutStreamer.emitInstruction(BSICInst, STI); in emitBSIC()
105 const MCSubtargetInfo &STI) { in emitLEAzzi() argument
113 OutStreamer.emitInstruction(LEAInst, STI); in emitLEAzzi()
117 const MCSubtargetInfo &STI) { in emitLEASLzzi() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcInstPrinter.h30 const MCSubtargetInfo &STI, raw_ostream &O) override;
31 bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
33 bool isV9(const MCSubtargetInfo &STI) const;
39 const MCSubtargetInfo &STI, raw_ostream &O);
41 const MCSubtargetInfo &STI, raw_ostream &O);
43 const MCSubtargetInfo &STI, raw_ostream &O);
46 const MCSubtargetInfo &STI, raw_ostream &O);
50 void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
52 void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
54 void printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
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