Searched refs:SCLK (Results 1 – 10 of 10) sorted by relevance
19 application of SCLK, as also specified. And since the delay is not20 implemented in the spi code, to satisfy it, SCLK's period should be at most
19 - clocks : A clock specifier for the clock connected as SCLK. If this27 external connection from the pll-out pin to the SCLK pin is assumed.
45 SCLK. Otherwise, data is on the falling edge of SCLK.
40 - sclk-strength: the SCLK pad strength. Possible values are:
18 #define SCLK 7 macro
9 the input clock to SCLK.
7 - clocks : phandle to the IP core SCLK
447 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
7011 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
587 /* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */