1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Purna Chandra Mandal,<purna.mandal@microchip.com> 4*c66ec88fSEmmanuel Vadot * Copyright (C) 2015 Microchip Technology Inc. All rights reserved. 5*c66ec88fSEmmanuel Vadot */ 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_ 8*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_ 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel Vadot /* clock output indices */ 11*c66ec88fSEmmanuel Vadot #define POSCCLK 0 12*c66ec88fSEmmanuel Vadot #define FRCCLK 1 13*c66ec88fSEmmanuel Vadot #define BFRCCLK 2 14*c66ec88fSEmmanuel Vadot #define LPRCCLK 3 15*c66ec88fSEmmanuel Vadot #define SOSCCLK 4 16*c66ec88fSEmmanuel Vadot #define FRCDIVCLK 5 17*c66ec88fSEmmanuel Vadot #define PLLCLK 6 18*c66ec88fSEmmanuel Vadot #define SCLK 7 19*c66ec88fSEmmanuel Vadot #define PB1CLK 8 20*c66ec88fSEmmanuel Vadot #define PB2CLK 9 21*c66ec88fSEmmanuel Vadot #define PB3CLK 10 22*c66ec88fSEmmanuel Vadot #define PB4CLK 11 23*c66ec88fSEmmanuel Vadot #define PB5CLK 12 24*c66ec88fSEmmanuel Vadot #define PB6CLK 13 25*c66ec88fSEmmanuel Vadot #define PB7CLK 14 26*c66ec88fSEmmanuel Vadot #define REF1CLK 15 27*c66ec88fSEmmanuel Vadot #define REF2CLK 16 28*c66ec88fSEmmanuel Vadot #define REF3CLK 17 29*c66ec88fSEmmanuel Vadot #define REF4CLK 18 30*c66ec88fSEmmanuel Vadot #define REF5CLK 19 31*c66ec88fSEmmanuel Vadot #define UPLLCLK 20 32*c66ec88fSEmmanuel Vadot #define MAXCLKS 21 33*c66ec88fSEmmanuel Vadot 34*c66ec88fSEmmanuel Vadot #endif /* _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_ */ 35