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Searched refs:ResTy (Results 1 – 25 of 72) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanAnalysis.cpp45 Type *ResTy = inferScalarType(R->getIncomingValue(0)); in inferScalarTypeForRecipe() local
48 assert(inferScalarType(Inc) == ResTy && in inferScalarTypeForRecipe()
50 CachedTypes[Inc] = ResTy; in inferScalarTypeForRecipe()
52 return ResTy; in inferScalarTypeForRecipe()
59 Type *ResTy = inferScalarType(R->getOperand(0)); in inferScalarTypeForRecipe() local
62 assert(inferScalarType(OtherV) == ResTy && in inferScalarTypeForRecipe()
64 CachedTypes[OtherV] = ResTy; in inferScalarTypeForRecipe()
66 return ResTy; in inferScalarTypeForRecipe()
79 Type *ResTy = inferScalarType(R->getOperand(1)); in inferScalarTypeForRecipe() local
81 assert(inferScalarType(OtherV) == ResTy && in inferScalarTypeForRecipe()
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H A DVPlanUnroll.cpp540 Type *ResTy = RepR->getUnderlyingInstr()->getType(); in replicateByVF() local
542 ResTy->isStructTy() ? VPInstruction::BuildStructVector in replicateByVF()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp508 HexagonTargetLowering::getInt(unsigned IntId, MVT ResTy, ArrayRef<SDValue> Ops, in getInt() argument
513 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, ResTy, IntOps); in getInt()
770 MVT ResTy = tyVector(OpTy, MVT::i8); in getByteShuffle() local
784 assert(ResTy.getVectorNumElements() == ByteMask.size()); in getByteShuffle()
785 return DAG.getVectorShuffle(ResTy, dl, opCastElem(Op0, MVT::i8, DAG), in getByteShuffle()
1162 const SDLoc &dl, MVT ResTy, SelectionDAG &DAG) const { in extractHvxElementReg() argument
1186 const SDLoc &dl, MVT ResTy, SelectionDAG &DAG) const { in extractHvxElementPred() argument
1188 assert(ResTy == MVT::i1); in extractHvxElementPred()
1267 SDValue IdxV, const SDLoc &dl, MVT ResTy, SelectionDAG &DAG) const { in extractHvxSubvectorReg() argument
1286 if (VecTy == ResTy) in extractHvxSubvectorReg()
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H A DHexagonISelLowering.h402 MVT ValTy, MVT ResTy, SelectionDAG &DAG) const;
404 MVT ValTy, MVT ResTy, SelectionDAG &DAG) const;
415 SDValue appendUndef(SDValue Val, MVT ResTy, SelectionDAG &DAG) const;
416 SDValue getCombine(SDValue Hi, SDValue Lo, const SDLoc &dl, MVT ResTy,
434 SDValue getInt(unsigned IntId, MVT ResTy, ArrayRef<SDValue> Ops,
519 MVT ResTy, SelectionDAG &DAG) const;
521 MVT ResTy, SelectionDAG &DAG) const;
527 const SDLoc &dl, MVT ResTy, SelectionDAG &DAG)
530 MVT ResTy, SelectionDAG &DAG) const;
535 SDValue extendHvxVectorPred(SDValue VecV, const SDLoc &dl, MVT ResTy,
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H A DHexagonISelDAGToDAGHVX.cpp991 bool scalarizeShuffle(ArrayRef<int> Mask, const SDLoc &dl, MVT ResTy,
1841 MVT ResTy, SDValue Va, SDValue Vb, in scalarizeShuffle() argument
1844 MVT ElemTy = ResTy.getVectorElementType(); in scalarizeShuffle()
1904 LV = DAG.getNode(ISD::CONCAT_VECTORS, dl, ResTy, {L0, L1}); in scalarizeShuffle()
1906 SDValue BV = DAG.getBuildVector(ResTy, dl, Ops); in scalarizeShuffle()
1911 SDValue IS = DAG.getNode(HexagonISD::ISEL, dl, ResTy, LV); in scalarizeShuffle()
2508 MVT ResTy = getSingleVT(MVT::i8); in butterfly() local
2522 Results.push(Hexagon::V6_vdelta, ResTy, {Va, OpRef(Ctl)}); in butterfly()
2530 Results.push(Hexagon::V6_vrdelta, ResTy, {Va, OpRef(Ctl)}); in butterfly()
2539 Results.push(Hexagon::V6_vdelta, ResTy, {Va, OpRef(CtlF)}); in butterfly()
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H A DHexagonISelDAGToDAG.h126 SDValue selectUndef(const SDLoc &dl, MVT ResTy) { in selectUndef() argument
127 SDNode *U = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, ResTy); in selectUndef()
H A DHexagonISelDAGToDAG.cpp710 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectExtractSubvector() local
714 [[maybe_unused]] unsigned ResLen = ResTy.getVectorNumElements(); in SelectExtractSubvector()
715 assert(InpTy.getVectorElementType() == ResTy.getVectorElementType()); in SelectExtractSubvector()
717 assert(ResTy.getSizeInBits() == 32); in SelectExtractSubvector()
721 SDValue Ext = CurDAG->getTargetExtractSubreg(SubReg, SDLoc(N), ResTy, Inp); in SelectExtractSubvector()
802 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectVAlign() local
803 if (HST->isHVXVectorType(ResTy, true)) in SelectVAlign()
807 unsigned VecLen = ResTy.getSizeInBits(); in SelectVAlign()
834 SDValue E = CurDAG->getTargetExtractSubreg(Hexagon::isub_lo, dl, ResTy, in SelectVAlign()
841 SDNode *VA = CurDAG->getMachineNode(Hexagon::S2_valignrb, dl, ResTy, in SelectVAlign()
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H A DHexagonISelLowering.cpp1121 MVT ResTy = ty(Op); in LowerSETCC() local
1129 return DAG.getSetCC(dl, ResTy, in LowerSETCC()
1135 if (ResTy.isVector()) in LowerSETCC()
1167 return DAG.getSetCC(dl, ResTy, in LowerSETCC()
2208 MVT ResTy = ResVT.getSimpleVT(), SrcTy = SrcVT.getSimpleVT(); in isExtractSubvectorCheap() local
2209 if (ResTy.getVectorElementType() != MVT::i1) in isExtractSubvectorCheap()
2458 MVT ResTy = ty(Res); in LowerVECTOR_SHIFT() local
2459 if (ResTy.getVectorElementType() != MVT::i8) in LowerVECTOR_SHIFT()
2463 assert(ResTy.getVectorElementType() == MVT::i8); in LowerVECTOR_SHIFT()
2475 if (ResTy.getSizeInBits() == 32) in LowerVECTOR_SHIFT()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp449 EVT ResTy = Op->getValueType(0); in lowerSELECT() local
456 return DAG.getNode(MipsISD::FSELECT, DL, ResTy, Tmp, Op->getOperand(1), in lowerSELECT()
1404 EVT ResTy = Op->getValueType(0); in lowerMSACopyIntr() local
1407 SDValue Result = DAG.getNode(Opc, DL, ResTy, Vec, Idx, in lowerMSACopyIntr()
1548 EVT ResTy = Op->getValueType(0); in truncateVecElts() local
1551 MVT ResEltTy = ResTy == MVT::v2i64 ? MVT::i64 : MVT::i32; in truncateVecElts()
1554 SDValue SplatVec = getBuildVectorSplat(ResTy, ConstValue, BigEndian, DAG); in truncateVecElts()
1556 return DAG.getNode(ISD::AND, DL, ResTy, Vec, SplatVec); in truncateVecElts()
1560 EVT ResTy = Op->getValueType(0); in lowerMSABitClear() local
1562 SDValue One = DAG.getConstant(1, DL, ResTy); in lowerMSABitClear()
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H A DMipsSEISelDAGToDAG.cpp914 MVT ResTy = Node->getSimpleValueType(0); in trySelect() local
915 assert((ResTy == MVT::f64 || ResTy == MVT::f32) && in trySelect()
918 if (ResTy == MVT::f64) in trySelect()
940 CurDAG->getMachineNode(Opc, DL, ResTy, Node->getOperand(0))); in trySelect()
964 MVT ResTy = Node->getSimpleValueType(0); in trySelect() local
975 if (ResTy != MVT::i32 && ResTy != MVT::i64) in trySelect()
979 if (ResTy == MVT::i32) { in trySelect()
996 ReplaceNode(Node, CurDAG->getMachineNode(Opcode, DL, ResTy, Ops)); in trySelect()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp240 LLT ResTy = Res.getLLTTy(*getMRI()); in buildPadVectorWithUndefElements() local
243 assert(ResTy.isVector() && "Res non vector type"); in buildPadVectorWithUndefElements()
247 assert((ResTy.getElementType() == Op0Ty.getElementType()) && in buildPadVectorWithUndefElements()
249 assert((ResTy.getNumElements() > Op0Ty.getNumElements()) && in buildPadVectorWithUndefElements()
256 assert((ResTy.getSizeInBits() > Op0Ty.getSizeInBits()) && in buildPadVectorWithUndefElements()
262 unsigned NumberOfPadElts = ResTy.getNumElements() - Regs.size(); in buildPadVectorWithUndefElements()
271 LLT ResTy = Res.getLLTTy(*getMRI()); in buildDeleteTrailingVectorElements() local
275 assert(((ResTy.isScalar() && (ResTy == Op0Ty.getElementType())) || in buildDeleteTrailingVectorElements()
276 (ResTy.isVector() && in buildDeleteTrailingVectorElements()
277 (ResTy.getElementType() == Op0Ty.getElementType()))) && in buildDeleteTrailingVectorElements()
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H A DInlineAsmLowering.cpp586 LLT ResTy = MRI->getType(ResRegs[i]); in lowerInlineAsm() local
587 if (ResTy.isScalar() && ResTy.getSizeInBits() < SrcSize) { in lowerInlineAsm()
595 } else if (ResTy.getSizeInBits() == SrcSize) { in lowerInlineAsm()
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DThreadPool.h111 template <typename ResTy>
112 std::shared_future<ResTy> asyncImpl(std::function<ResTy()> Task, in asyncImpl()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp437 Type *ResTy = II.getType(); in simplifyX86pack() local
441 return UndefValue::get(ResTy); in simplifyX86pack()
444 unsigned NumLanes = ResTy->getPrimitiveSizeInBits() / 128; in simplifyX86pack()
446 assert(cast<FixedVectorType>(ResTy)->getNumElements() == (2 * NumSrcElts) && in simplifyX86pack()
450 unsigned DstScalarSizeInBits = ResTy->getScalarSizeInBits(); in simplifyX86pack()
496 return Builder.CreateTrunc(Shuffle, ResTy); in simplifyX86pack()
504 auto *ResTy = cast<FixedVectorType>(II.getType()); in simplifyX86pmulh() local
506 assert(ArgTy == ResTy && ResTy->getScalarSizeInBits() == 16 && in simplifyX86pmulh()
512 return ConstantAggregateZero::get(ResTy); in simplifyX86pmulh()
516 return ConstantAggregateZero::get(ResTy); in simplifyX86pmulh()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp1297 ParseStatus ResTy; in parseDirectiveInsn() local
1299 ResTy = parseAnyReg(Operands); in parseDirectiveInsn()
1301 ResTy = parseVR128(Operands); in parseDirectiveInsn()
1303 ResTy = parseBDXAddr64(Operands); in parseDirectiveInsn()
1305 ResTy = parseBDAddr64(Operands); in parseDirectiveInsn()
1307 ResTy = parseBDVAddr64(Operands); in parseDirectiveInsn()
1309 ResTy = parseLXAAddr64(Operands); in parseDirectiveInsn()
1311 ResTy = parsePCRel32(Operands); in parseDirectiveInsn()
1313 ResTy = parsePCRel16(Operands); in parseDirectiveInsn()
1327 ResTy = ParseStatus::Success; in parseDirectiveInsn()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVISelLowering.cpp164 SPIRVType *ResType, const Type *ResTy) { in createNewPtrType() argument
172 ResTy, MIB, SPIRV::AccessQualifier::ReadWrite, false); in createNewPtrType()
181 SPIRVType *ResType, const Type *ResTy = nullptr) { in validatePtrTypes() argument
197 : GR.getTypeForSPIRVType(ElemType) == ResTy; in validatePtrTypes()
203 createNewPtrType(GR, I, OpType, IsSameMF, ResType, ResTy); in validatePtrTypes()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrNEON.td2523 string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode>
2526 [(set DPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vm))))]>;
2529 string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode>
2532 [(set QPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vm))))]>;
2538 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2541 [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vm))))]>;
2545 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2548 [(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vm))))]>;
2553 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2556 [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vm))))]>;
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H A DARMTargetTransformInfo.h297 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
301 getMulAccReductionCost(bool IsUnsigned, Type *ResTy, VectorType *ValTy,
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp876 EVT ResTy = Op->getValueType(0); in lowerBITREVERSE() local
880 EVT NewVT = ResTy.is128BitVector() ? MVT::v2i64 : MVT::v4i64; in lowerBITREVERSE()
881 unsigned int OrigEltNum = ResTy.getVectorNumElements(); in lowerBITREVERSE()
890 unsigned RevOp = (ResTy == MVT::v16i8 || ResTy == MVT::v32i8) in lowerBITREVERSE()
896 DAG.getNode(ISD::BITCAST, DL, ResTy, DAG.getBuildVector(NewVT, DL, Ops)); in lowerBITREVERSE()
898 switch (ResTy.getSimpleVT().SimpleTy) { in lowerBITREVERSE()
912 return DAG.getVectorShuffle(ResTy, DL, Res, DAG.getUNDEF(ResTy), Mask); in lowerBITREVERSE()
2456 EVT ResTy = Op->getValueType(0); in lowerBUILD_VECTOR() local
2461 bool Is128Vec = ResTy.is128BitVector(); in lowerBUILD_VECTOR()
2462 bool Is256Vec = ResTy.is256BitVector(); in lowerBUILD_VECTOR()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULowerBufferFatPointers.cpp1882 StructType *ResTy = cast<StructType>(GEP.getType()); in visitGetElementPtrInst() local
1883 Type *ResRsrcTy = ResTy->getElementType(0); in visitGetElementPtrInst()
1893 GEP.mutateType(ResTy); in visitGetElementPtrInst()
1930 Type *ResTy = PI.getType(); in visitPtrToIntInst() local
1931 unsigned Width = ResTy->getScalarSizeInBits(); in visitPtrToIntInst()
1939 Res = IRB.CreateIntCast(Off, ResTy, /*isSigned=*/false, in visitPtrToIntInst()
1942 Value *RsrcInt = IRB.CreatePtrToInt(Rsrc, ResTy, PI.getName() + ".rsrc"); in visitPtrToIntInst()
1945 ConstantExpr::getIntegerValue(ResTy, APInt(Width, BufferOffsetWidth)), in visitPtrToIntInst()
1947 Value *OffCast = IRB.CreateIntCast(Off, ResTy, /*isSigned=*/false, in visitPtrToIntInst()
2000 auto *ResTy = cast<StructType>(I.getType()); in visitAddrSpaceCastInst() local
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DLazyValueInfo.cpp1869 Type *ResTy = CmpInst::makeCmpResultType(C->getType()); in getPredicateResult() local
1874 return ConstantInt::getTrue(ResTy); in getPredicateResult()
1876 return ConstantInt::getFalse(ResTy); in getPredicateResult()
1888 return ConstantInt::getFalse(ResTy); in getPredicateResult()
1894 return ConstantInt::getTrue(ResTy); in getPredicateResult()
1926 Type *ResTy = CmpInst::makeCmpResultType(C->getType()); in getPredicateAt() local
1928 return ConstantInt::getFalse(ResTy); in getPredicateAt()
1930 return ConstantInt::getTrue(ResTy); in getPredicateAt()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.h444 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
449 bool IsUnsigned, Type *ResTy, VectorType *Ty,
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/
H A DBottomUpVec.cpp397 Type *ResTy = VecUtils::getWideType(Bndl[0]->getType(), Bndl.size()); in emitVectors() local
410 Value *LastV = PoisonValue::get(ResTy); in emitVectors()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/
H A DRISCV.cpp1255 llvm::Type *ResTy = ConvertType(E->getType()); in EmitRISCVBuiltinExpr() local
1267 if(ResTy->isScalableTy()) { in EmitRISCVBuiltinExpr()
1268 const ScalableVectorType *SVTy = cast<ScalableVectorType>(ResTy); in EmitRISCVBuiltinExpr()
1269 llvm::Type *ScalarTy = ResTy->getScalarType(); in EmitRISCVBuiltinExpr()
1273 Width = ResTy->getPrimitiveSizeInBits(); in EmitRISCVBuiltinExpr()
1275 Address(Ops[0], ResTy, CharUnits::fromQuantity(Width / 8))); in EmitRISCVBuiltinExpr()
H A DPPC.cpp366 llvm::Type *ResTy = ConvertType(E->getType()); in EmitPPCBuiltinExpr() local
372 Builder.CreateLoad(Address(Op0, ResTy, CharUnits::fromQuantity(1))); in EmitPPCBuiltinExpr()
396 Constant *Zero = llvm::Constant::getNullValue(IsLE ? ResTy : AllElts->getType()); in EmitPPCBuiltinExpr()
405 return Builder.CreateShuffleVector(Builder.CreateBitCast(AllElts, ResTy), in EmitPPCBuiltinExpr()
413 Builder.CreateCall(Vperm, {Zero, AllElts, Mask2}, "shuffle2"), ResTy); in EmitPPCBuiltinExpr()

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