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Searched refs:REG (Results 1 – 25 of 44) sorted by relevance

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/freebsd/sys/contrib/openzfs/module/zfs/
H A Dvdev_raidz_math_aarch64_neon_common.h26 #define VR0_(REG, ...) "%[w"#REG"]" argument
27 #define VR1_(_1, REG, ...) "%[w"#REG"]" argument
28 #define VR2_(_1, _2, REG, ...) "%[w"#REG"]" argument
29 #define VR3_(_1, _2, _3, REG, ...) "%[w"#REG"]" argument
30 #define VR4_(_1, _2, _3, _4, REG, ...) "%[w"#REG"]" argument
31 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "%[w"#REG"]" argument
32 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "%[w"#REG"]" argument
33 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "%[w"#REG"]" argument
55 #define RVR0_(REG, ...) [w##REG] "w" (w##REG) argument
56 #define RVR1_(_1, REG, ...) [w##REG] "w" (w##REG) argument
[all …]
H A Dvdev_raidz_math_powerpc_altivec_common.h23 #define VR0_(REG, ...) "%[w"#REG"]" argument
24 #define VR1_(_1, REG, ...) "%[w"#REG"]" argument
25 #define VR2_(_1, _2, REG, ...) "%[w"#REG"]" argument
26 #define VR3_(_1, _2, _3, REG, ...) "%[w"#REG"]" argument
27 #define VR4_(_1, _2, _3, _4, REG, ...) "%[w"#REG"]" argument
28 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "%[w"#REG"]" argument
29 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "%[w"#REG"]" argument
30 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "%[w"#REG"]" argument
52 #define RVR0_(REG, ...) [w##REG] "v" (w##REG) argument
53 #define RVR1_(_1, REG, ...) [w##REG] "v" (w##REG) argument
[all …]
H A Dvdev_raidz_math_avx512f.c32 #define VR0_(REG, ...) "zmm"#REG argument
33 #define VR1_(_1, REG, ...) "zmm"#REG argument
34 #define VR2_(_1, _2, REG, ...) "zmm"#REG argument
35 #define VR3_(_1, _2, _3, REG, ...) "zmm"#REG argument
36 #define VR4_(_1, _2, _3, _4, REG, ...) "zmm"#REG argument
37 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "zmm"#REG argument
38 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "zmm"#REG argument
39 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "zmm"#REG argument
50 #define VRy0_(REG, ...) "ymm"#REG argument
51 #define VRy1_(_1, REG, ...) "ymm"#REG argument
[all …]
H A Dvdev_raidz_math_ssse3.c30 #define VR0_(REG, ...) "xmm"#REG argument
31 #define VR1_(_1, REG, ...) "xmm"#REG argument
32 #define VR2_(_1, _2, REG, ...) "xmm"#REG argument
33 #define VR3_(_1, _2, _3, REG, ...) "xmm"#REG argument
34 #define VR4_(_1, _2, _3, _4, REG, ...) "xmm"#REG argument
35 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "xmm"#REG argument
36 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "xmm"#REG argument
37 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "xmm"#REG argument
50 #define R_23(REG...) _R_23(REG, 1, 2, 3) argument
H A Dvdev_raidz_math_avx2.c30 #define VR0_(REG, ...) "ymm"#REG argument
31 #define VR1_(_1, REG, ...) "ymm"#REG argument
32 #define VR2_(_1, _2, REG, ...) "ymm"#REG argument
33 #define VR3_(_1, _2, _3, REG, ...) "ymm"#REG argument
34 #define VR4_(_1, _2, _3, _4, REG, ...) "ymm"#REG argument
35 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "ymm"#REG argument
36 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "ymm"#REG argument
37 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "ymm"#REG argument
50 #define R_23(REG...) _R_23(REG, 1, 2, 3) argument
H A Dvdev_raidz_math_avx512bw.c33 #define VR0_(REG, ...) "zmm"#REG argument
34 #define VR1_(_1, REG, ...) "zmm"#REG argument
35 #define VR2_(_1, _2, REG, ...) "zmm"#REG argument
36 #define VR3_(_1, _2, _3, REG, ...) "zmm"#REG argument
37 #define VR4_(_1, _2, _3, _4, REG, ...) "zmm"#REG argument
38 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "zmm"#REG argument
39 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "zmm"#REG argument
40 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "zmm"#REG argument
53 #define R_23(REG...) _R_23(REG, 1, 2, 3) argument
H A Dvdev_raidz_math_sse2.c31 #define VR0_(REG, ...) "xmm"#REG argument
32 #define VR1_(_1, REG, ...) "xmm"#REG argument
33 #define VR2_(_1, _2, REG, ...) "xmm"#REG argument
34 #define VR3_(_1, _2, _3, REG, ...) "xmm"#REG argument
35 #define VR4_(_1, _2, _3, _4, REG, ...) "xmm"#REG argument
36 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "xmm"#REG argument
37 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "xmm"#REG argument
38 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "xmm"#REG argument
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/FreeBSDKernel/
H A DRegisterContextFreeBSDKernel_x86_64.cpp62 #define REG(x) \ in ReadRegister() macro
67 REG(r15); in ReadRegister()
68 REG(r14); in ReadRegister()
69 REG(r13); in ReadRegister()
70 REG(r12); in ReadRegister()
71 REG(rbp); in ReadRegister()
72 REG(rsp); in ReadRegister()
73 REG(rbx); in ReadRegister()
74 REG(rip); in ReadRegister()
76 #undef REG in ReadRegister()
H A DRegisterContextFreeBSDKernel_i386.cpp60 #define REG(x) \ in ReadRegister() macro
65 REG(edi); in ReadRegister()
66 REG(esi); in ReadRegister()
67 REG(ebp); in ReadRegister()
68 REG(esp); in ReadRegister()
69 REG(eip); in ReadRegister()
71 #undef REG in ReadRegister()
/freebsd/sys/dev/uart/
H A Duart_dev_imx.c99 GETREG(bas, REG(UCR1)), GETREG(bas, REG(UCR2)),
100 GETREG(bas, REG(UCR3)), GETREG(bas, REG(UCR4)),
101 GETREG(bas, REG(USR1)), GETREG(bas, REG(USR2)));
131 i = (GETREG(bas, REG(UFCR)) & IMXUART_UFCR_RFDIV_MASK) >> in imx_uart_getbaud()
134 ubir = GETREG(bas, REG(UBIR)) + 1; in imx_uart_getbaud()
135 ubmr = GETREG(bas, REG(UBMR)) + 1; in imx_uart_getbaud()
158 SET(bas, REG(UCR1), FLD(UCR1, UARTEN)); in imx_uart_init()
159 SET(bas, REG(UCR2), FLD(UCR2, RXEN) | FLD(UCR2, TXEN)); in imx_uart_init()
203 reg = GETREG(bas, REG(UFCR)); in imx_uart_init()
205 SETREG(bas, REG(UFCR), reg); in imx_uart_init()
[all …]
H A Duart_dev_imx.h198 #define REG(_r) IMXUART_ ## _r ## _REG macro
213 #define ENA(_bas, _r, _b) SET((_bas), REG(_r), FLD(_r, _b))
214 #define DIS(_bas, _r, _b) CLR((_bas), REG(_r), FLD(_r, _b))
215 #define IS(_bas, _r, _b) IS_SET((_bas), REG(_r), FLD(_r, _b))
/freebsd/contrib/arm-optimized-routines/string/arm/
H A Dstrcpy.c18 #define magic1(REG) "#0x01010101" argument
19 #define magic2(REG) "#0x80808080" argument
21 #define magic1(REG) #REG argument
22 #define magic2(REG) #REG ", lsl #7" argument
/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_udma_debug.h60 #define AL_UDMA_PRINT_REG(UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG) \ argument
61 al_dbg(PREFIX #REG " = 0x%08x" POSTFIX, al_reg_read32( \
62 &(UDMA->udma_regs->TYPE.GROUP.REG)))
65 UDMA, PREFIX, POSTFIX, FMT, TYPE, GROUP, REG, LBL, FIELD) \
67 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
71 UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG, LBL, FIELD) \
73 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/gdb-remote/
H A DGDBRemoteRegisterFallback.cpp14 #define REG(name, size) \ macro
20 #define R64(name) REG(name, 8)
21 #define R32(name) REG(name, 4)
22 #define R16(name) REG(name, 2)
80 #undef REG
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrData.td41 /// 0 0 | SIZE | REG | MODE | MODE | REG
148 foreach REG = ["r", "a", "d"] in
150 foreach TYPE = !if(!eq(REG, "d"), [MxType8, MxType16, MxType32], [MxType16, MxType32]) in
151 def MOV # TYPE.Size # AM # REG # TYPE.Postfix
152 : MxMove_MR<TYPE, !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#AM), REG,
155 !cast<MxEncMemOp>("MxMoveSrcOpEnc_"#REG)>>;
175 foreach REG = ["r", "a", "d"] in {
176 foreach TYPE = !if(!eq(REG, "d"), [MxType8, MxType16, MxType32], [MxType16, MxType32]) in
177 def MOV # TYPE.Size # REG # i # TYPE.Postfix
178 : MxMove_RI<TYPE, REG,
[all …]
H A DM68kInstrShiftRotate.td41 /// 1 1 1 0 | REG/IMM | D | SIZE |R/I| OP | REG
46 // REG/IMM
49 // REG
H A DM68kInstrBits.td33 /// 0 0 0 0 | REG | OP MODE | MODE | REG
48 /// 0 0 0 0 1 0 0 | OP MODE | MODE | REG
/freebsd/contrib/bionic-x86_64-string/
H A Dsse2-memmove-slm.S82 #define CFI_PUSH(REG) \ argument
84 cfi_rel_offset (REG, 0)
86 #define CFI_POP(REG) \ argument
88 cfi_restore (REG)
90 #define PUSH(REG) push REG; argument
91 #define POP(REG) pop REG; argument
/freebsd/sys/dev/pci/
H A Dpci.c704 #define REG(n, w) PCIB_READ_CONFIG(pcib, b, s, f, n, w) in pci_hdrtypedata() macro
707 cfg->subvendor = REG(PCIR_SUBVEND_0, 2); in pci_hdrtypedata()
708 cfg->subdevice = REG(PCIR_SUBDEV_0, 2); in pci_hdrtypedata()
709 cfg->mingnt = REG(PCIR_MINGNT, 1); in pci_hdrtypedata()
710 cfg->maxlat = REG(PCIR_MAXLAT, 1); in pci_hdrtypedata()
714 cfg->bridge.br_seclat = REG(PCIR_SECLAT_1, 1); in pci_hdrtypedata()
715 cfg->bridge.br_subbus = REG(PCIR_SUBBUS_1, 1); in pci_hdrtypedata()
716 cfg->bridge.br_secbus = REG(PCIR_SECBUS_1, 1); in pci_hdrtypedata()
717 cfg->bridge.br_pribus = REG(PCIR_PRIBUS_1, 1); in pci_hdrtypedata()
718 cfg->bridge.br_control = REG(PCIR_BRIDGECTL_1, 2); in pci_hdrtypedata()
[all …]
/freebsd/sys/dev/sym/
H A Dsym_defs.h551 #define REG(r) REGJ (nc_, r) macro
729 (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
732 (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
735 (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
800 (0xe1000000 | (how) | (SCR_REG_OFS2(REG(reg))) | (n))
803 (0xe0000000 | (how) | (SCR_REG_OFS2(REG(reg))) | (n))
H A Dsym_fw.h201 #define RADDR_1(label) (RELOC_REGISTER | REG(label))
202 #define RADDR_2(label,ofs) (RELOC_REGISTER | ((REG(label))+(ofs)))
/freebsd/sys/dev/pccbb/
H A Dpccbb_pci.c112 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ argument
113 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
114 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ argument
115 pci_write_config(DEV, REG, ( \
116 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
H A Dpccbb.c112 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ argument
113 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
114 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ argument
115 pci_write_config(DEV, REG, ( \
116 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
/freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/
H A DRISCV.cpp96 #define RESERVE_REG(REG) \ in getRISCVTargetFeatures() argument
97 if (Args.hasArg(options::OPT_ffixed_##REG)) \ in getRISCVTargetFeatures()
98 Features.push_back("+reserve-" #REG); in getRISCVTargetFeatures()
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DMemRegion.cpp906 template <typename REG>
907 const REG *MemRegionManager::LazyAllocate(REG*& region) { in LazyAllocate()
909 region = new (A) REG(*this); in LazyAllocate()
915 template <typename REG, typename ARG>
916 const REG *MemRegionManager::LazyAllocate(REG*& region, ARG a) { in LazyAllocate()
918 region = new (A) REG(this, a); in LazyAllocate()

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