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Searched refs:PhysReg (Results 1 – 25 of 111) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DReachingDefAnalysis.cpp33 static bool isValidRegUseOf(const MachineOperand &MO, MCRegister PhysReg, in isValidRegUseOf() argument
37 return TRI->regsOverlap(MO.getReg(), PhysReg); in isValidRegUseOf()
44 static bool isValidRegDefOf(const MachineOperand &MO, MCRegister PhysReg, in isValidRegDefOf() argument
48 return TRI->regsOverlap(MO.getReg(), PhysReg); in isValidRegDefOf()
68 for (MCRegUnit Unit : TRI->regunits(LI.PhysReg)) { in enterBasicBlock()
263 MCRegister PhysReg) const { in getReachingDef()
271 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in getReachingDef()
284 MCRegister PhysReg) const { in getReachingLocalMIDef()
285 return hasLocalDefBefore(MI, PhysReg) in getReachingLocalMIDef()
286 ? getInstFromId(MI->getParent(), getReachingDef(MI, PhysReg)) in getReachingLocalMIDef()
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H A DLiveRegMatrix.cpp81 const LiveInterval &VRegInterval, MCRegister PhysReg, in foreachUnit() argument
84 for (MCRegUnitMaskIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in foreachUnit()
96 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in foreachUnit()
104 void LiveRegMatrix::assign(const LiveInterval &VirtReg, MCRegister PhysReg) { in assign() argument
106 << printReg(PhysReg, TRI) << ':'); in assign()
108 VRM->assignVirt2Phys(VirtReg.reg(), PhysReg); in assign()
111 TRI, VirtReg, PhysReg, [&](unsigned Unit, const LiveRange &Range) { in assign()
122 Register PhysReg = VRM->getPhys(VirtReg.reg()); in unassign() local
124 << " from " << printReg(PhysReg, TRI) << ':'); in unassign()
127 foreachUnit(TRI, VirtReg, PhysReg, in unassign()
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H A DRegAllocFast.cpp203 MCPhysReg PhysReg = 0; ///< Currently held here. member
279 void setPhysRegState(MCPhysReg PhysReg, unsigned NewState);
280 bool isPhysRegFree(MCPhysReg PhysReg) const;
283 void markRegUsedInInstr(MCPhysReg PhysReg) { in markRegUsedInInstr() argument
284 for (MCRegUnit Unit : TRI->regunits(PhysReg)) in markRegUsedInInstr()
289 bool isClobberedByRegMasks(MCPhysReg PhysReg) const { in isClobberedByRegMasks()
290 return llvm::any_of(RegMasks, [PhysReg](const uint32_t *Mask) { in isClobberedByRegMasks()
291 return MachineOperand::clobbersPhysReg(Mask, PhysReg); in isClobberedByRegMasks()
296 bool isRegUsedInInstr(MCPhysReg PhysReg, bool LookAtPhysRegUses) const { in isRegUsedInInstr() argument
297 if (LookAtPhysRegUses && isClobberedByRegMasks(PhysReg)) in isRegUsedInInstr()
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H A DRegAllocGreedy.cpp401 MCRegister PhysReg; in tryAssign() local
402 for (auto I = Order.begin(), E = Order.end(); I != E && !PhysReg; ++I) { in tryAssign()
408 PhysReg = *I; in tryAssign()
411 if (!PhysReg.isValid()) in tryAssign()
412 return PhysReg; in tryAssign()
439 uint8_t Cost = RegCosts[PhysReg]; in tryAssign()
443 return PhysReg; in tryAssign()
445 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << " is available at cost " in tryAssign()
448 return CheapReg ? CheapReg : PhysReg; in tryAssign()
482 MCRegister PhysReg, in evictInterference() argument
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H A DRegAllocBasic.cpp118 bool spillInterferences(const LiveInterval &VirtReg, MCRegister PhysReg,
207 MCRegister PhysReg, in spillInterferences() argument
214 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in spillInterferences()
222 LLVM_DEBUG(dbgs() << "spilling " << printReg(PhysReg, TRI) in spillInterferences()
263 for (MCRegister PhysReg : Order) { in selectOrSplit() local
264 assert(PhysReg.isValid()); in selectOrSplit()
266 switch (Matrix->checkInterference(VirtReg, PhysReg)) { in selectOrSplit()
269 return PhysReg; in selectOrSplit()
273 PhysRegSpillCands.push_back(PhysReg); in selectOrSplit()
283 for (MCRegister &PhysReg : PhysRegSpillCands) { in selectOrSplit()
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H A DVirtRegMap.cpp198 void addLiveInsForSubRanges(const LiveInterval &LI, MCRegister PhysReg) const;
295 MCRegister PhysReg) const { in addLiveInsForSubRanges()
334 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges()
350 Register PhysReg = VRM->getPhys(VirtReg); in addMBBLiveIns() local
351 if (PhysReg == VirtRegMap::NO_PHYS_REG) { in addMBBLiveIns()
359 addLiveInsForSubRanges(LI, PhysReg); in addMBBLiveIns()
369 MBB->addLiveIn(PhysReg); in addMBBLiveIns()
553 MCRegister PhysReg = VRM->getPhys(VirtReg); in rewrite() local
554 if (PhysReg == VirtRegMap::NO_PHYS_REG) in rewrite()
557 assert(Register(PhysReg).isPhysical()); in rewrite()
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H A DRegisterClassInfo.cpp145 for (unsigned PhysReg : RawOrder) { in compute() local
147 if (Reserved.test(PhysReg)) in compute()
149 uint8_t Cost = RegCosts[PhysReg]; in compute()
152 if (getLastCalleeSavedAlias(PhysReg) && in compute()
153 !STI.ignoreCSRForAllocationOrder(*MF, PhysReg)) in compute()
155 CSRAlias.push_back(PhysReg); in compute()
159 RCI.Order[N++] = PhysReg; in compute()
167 for (unsigned PhysReg : CSRAlias) { in compute() local
168 uint8_t Cost = RegCosts[PhysReg]; in compute()
171 RCI.Order[N++] = PhysReg; in compute()
H A DRegAllocEvictionAdvisor.cpp169 const LiveInterval &VirtReg, MCRegister PhysReg, in canEvictHintInterference() argument
173 return canEvictInterferenceBasedOnCost(VirtReg, PhysReg, true, MaxCost, in canEvictHintInterference()
187 const LiveInterval &VirtReg, MCRegister PhysReg, bool IsHint, in canEvictInterferenceBasedOnCost() argument
190 if (Matrix->checkInterference(VirtReg, PhysReg) > LiveRegMatrix::IK_VirtReg) in canEvictInterferenceBasedOnCost()
205 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in canEvictInterferenceBasedOnCost()
267 (!EnableLocalReassign || !canReassign(*Intf, PhysReg))) { in canEvictInterferenceBasedOnCost()
297 MCRegister PhysReg = *I; in tryFindEvictionCandidate() local
298 assert(PhysReg); in tryFindEvictionCandidate()
299 if (!canAllocatePhysReg(CostPerUseLimit, PhysReg) || in tryFindEvictionCandidate()
300 !canEvictInterferenceBasedOnCost(VirtReg, PhysReg, false, BestCost, in tryFindEvictionCandidate()
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H A DInterferenceCache.cpp63 InterferenceCache::Entry *InterferenceCache::get(MCRegister PhysReg) { in get() argument
64 unsigned char E = PhysRegEntries[PhysReg.id()]; in get()
65 if (E < CacheEntries && Entries[E].getPhysReg() == PhysReg) { in get()
81 Entries[E].reset(PhysReg, LIUArray, TRI, MF); in get()
82 PhysRegEntries[PhysReg] = E; in get()
96 for (MCRegUnit Unit : TRI->regunits(PhysReg)) in revalidate()
107 PhysReg = physReg; in reset()
113 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in reset()
122 for (MCRegUnit Unit : TRI->regunits(PhysReg)) { in valid()
193 if (MachineOperand::clobbersPhysReg(RegMaskBits[i], PhysReg)) { in update()
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H A DInterferenceCache.h47 MCRegister PhysReg = 0; variable
105 PhysReg = MCRegister::NoRegister; in clear()
111 MCRegister getPhysReg() const { return PhysReg; } in getPhysReg()
155 Entry *get(MCRegister PhysReg);
209 void setPhysReg(InterferenceCache &Cache, MCRegister PhysReg) { in setPhysReg() argument
213 if (PhysReg.isValid()) in setPhysReg()
214 setEntry(Cache.get(PhysReg)); in setPhysReg()
H A DRegAllocGreedy.h224 MCRegister PhysReg; member
237 PhysReg = Reg; in reset()
337 bool mayRecolorAllInterferences(MCRegister PhysReg,
350 unsigned calculateRegionSplitCostAroundReg(MCPhysReg PhysReg,
370 AllocationOrder &Order, MCRegister PhysReg,
399 MCRegister PhysReg; member
401 HintInfo(BlockFrequency Freq, Register Reg, MCRegister PhysReg) in HintInfo()
402 : Freq(Freq), Reg(Reg), PhysReg(PhysReg) {} in HintInfo()
H A DMachineRegisterInfo.cpp528 bool MachineRegisterInfo::isConstantPhysReg(MCRegister PhysReg) const { in isConstantPhysReg()
529 assert(Register::isPhysicalRegister(PhysReg)); in isConstantPhysReg()
532 if (TRI->isConstantPhysReg(PhysReg)) in isConstantPhysReg()
537 for (MCRegAliasIterator AI(PhysReg, TRI, true); in isConstantPhysReg()
585 bool MachineRegisterInfo::isPhysRegModified(MCRegister PhysReg, in isPhysRegModified() argument
587 if (UsedPhysRegMask.test(PhysReg)) in isPhysRegModified()
590 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) { in isPhysRegModified()
600 bool MachineRegisterInfo::isPhysRegUsed(MCRegister PhysReg, in isPhysRegUsed() argument
602 if (!SkipRegMaskTest && UsedPhysRegMask.test(PhysReg)) in isPhysRegUsed()
605 for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid(); in isPhysRegUsed()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DReachingDefAnalysis.h142 int getReachingDef(MachineInstr *MI, MCRegister PhysReg) const;
146 MCRegister PhysReg) const;
150 bool isReachingDefLiveOut(MachineInstr *MI, MCRegister PhysReg) const;
155 MCRegister PhysReg) const;
160 MCRegister PhysReg) const;
172 bool hasLocalDefBefore(MachineInstr *MI, MCRegister PhysReg) const;
176 bool isRegUsedAfter(MachineInstr *MI, MCRegister PhysReg) const;
179 bool isRegDefinedAfter(MachineInstr *MI, MCRegister PhysReg) const;
183 int getClearance(MachineInstr *MI, MCRegister PhysReg) const;
187 void getReachingLocalUses(MachineInstr *MI, MCRegister PhysReg,
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H A DLiveRegMatrix.h108 MCRegister PhysReg);
115 bool checkInterference(SlotIndex Start, SlotIndex End, MCRegister PhysReg);
120 void assign(const LiveInterval &VirtReg, MCRegister PhysReg);
128 bool isPhysRegUsed(MCRegister PhysReg) const;
141 MCRegister PhysReg = MCRegister::NoRegister);
147 MCRegister PhysReg);
159 Register getOneVReg(unsigned PhysReg) const;
H A DMachineRegisterInfo.h639 bool isConstantPhysReg(MCRegister PhysReg) const;
893 bool isPhysRegModified(MCRegister PhysReg, bool SkipNoReturnDef = false) const;
899 bool isPhysRegUsed(MCRegister PhysReg, bool SkipRegMaskTest = false) const;
928 void reserveReg(MCRegister PhysReg, const TargetRegisterInfo *TRI) { in reserveReg() argument
931 MCRegAliasIterator R(PhysReg, TRI, true); in reserveReg()
946 bool canReserveReg(MCRegister PhysReg) const { in canReserveReg() argument
947 return !reservedRegsFrozen() || ReservedRegs.test(PhysReg); in canReserveReg()
964 bool isReserved(MCRegister PhysReg) const { in isReserved() argument
965 return getReservedRegs().test(PhysReg.id()); in isReserved()
982 bool isAllocatable(MCRegister PhysReg) const { in isAllocatable() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPreAllocateWWMRegs.cpp105 for (MCRegister PhysReg : RegClassInfo.getOrder(MRI->getRegClass(Reg))) { in processDef() local
106 if (!MRI->isPhysRegUsed(PhysReg, /*SkipRegMaskTest=*/true) && in processDef()
107 Matrix->checkInterference(LI, PhysReg) == LiveRegMatrix::IK_Free) { in processDef()
108 Matrix->assign(LI, PhysReg); in processDef()
109 assert(PhysReg != 0); in processDef()
132 Register PhysReg = VRM->getPhys(VirtReg); in rewriteRegs() local
135 PhysReg = TRI->getSubReg(PhysReg, SubReg); in rewriteRegs()
139 MO.setReg(PhysReg); in rewriteRegs()
150 const Register PhysReg = VRM->getPhys(Reg); in rewriteRegs() local
151 assert(PhysReg != 0); in rewriteRegs()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.cpp38 void assignValueToReg(Register ValVReg, Register PhysReg,
51 void OutgoingArgHandler::assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg() argument
53 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
55 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
146 Register PhysReg, in assignValueToReg() argument
148 markPhysRegUsed(PhysReg); in assignValueToReg()
149 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); in assignValueToReg()
184 void FormalArgHandler::markPhysRegUsed(unsigned PhysReg) { in markPhysRegUsed() argument
185 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
186 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
H A DPPCCallLowering.h48 void assignValueToReg(Register ValVReg, Register PhysReg,
59 virtual void markPhysRegUsed(unsigned PhysReg) = 0;
64 void markPhysRegUsed(unsigned PhysReg) override;
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp41 void assignValueToReg(Register ValVReg, Register PhysReg,
59 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
61 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
63 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
150 Register PhysReg, in assignValueToReg() argument
152 MIRBuilder.getMRI()->addLiveIn(PhysReg); in assignValueToReg()
153 MIRBuilder.getMBB().addLiveIn(PhysReg); in assignValueToReg()
154 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); in assignValueToReg()
183 void CallReturnHandler::assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg() argument
185 MIB.addDef(PhysReg, RegState::Implicit); in assignValueToReg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp119 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
122 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?"); in assignValueToReg()
128 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
129 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
292 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
295 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?"); in assignValueToReg()
303 markPhysRegUsed(PhysReg); in assignValueToReg()
305 MIRBuilder.buildCopy(ValVReg, PhysReg); in assignValueToReg()
312 auto PhysRegToVReg = MIRBuilder.buildCopy(LLT::scalar(LocSize), PhysReg); in assignValueToReg()
357 virtual void markPhysRegUsed(unsigned PhysReg) = 0;
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp109 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
111 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
113 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
220 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
222 markPhysRegUsed(PhysReg); in assignValueToReg()
223 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); in assignValueToReg()
229 virtual void markPhysRegUsed(unsigned PhysReg) = 0;
239 void markPhysRegUsed(unsigned PhysReg) override { in markPhysRegUsed()
240 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
241 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp42 Register PhysReg = VRM->getPhys(MO.getReg()); in getRC32() local
43 if (SystemZ::GR32BitRegClass.contains(PhysReg)) in getRC32()
45 assert (SystemZ::GRH32BitRegClass.contains(PhysReg) && in getRC32()
110 Register PhysReg = in getRegAllocationHints() local
112 if (PhysReg) { in getRegAllocationHints()
114 PhysReg = getSubReg(PhysReg, MO->getSubReg()); in getRegAllocationHints()
116 PhysReg = getMatchingSuperReg(PhysReg, VRRegMO->getSubReg(), in getRegAllocationHints()
118 if (!MRI->isReserved(PhysReg) in getRegAllocationHints()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp95 void assignValueToReg(Register ValVReg, Register PhysReg,
109 virtual void markPhysRegUsed(unsigned PhysReg) { in markPhysRegUsed()
110 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
111 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
122 void markPhysRegUsed(unsigned PhysReg) override { in markPhysRegUsed()
123 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
132 Register PhysReg, in assignValueToReg()
134 markPhysRegUsed(PhysReg); in assignValueToReg()
135 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); in assignValueToReg()
202 void assignValueToReg(Register ValVReg, Register PhysReg,
108 markPhysRegUsed(unsigned PhysReg) markPhysRegUsed() argument
121 markPhysRegUsed(unsigned PhysReg) markPhysRegUsed() argument
131 assignValueToReg(Register ValVReg,Register PhysReg,CCValAssign VA) assignValueToReg() argument
220 assignValueToReg(Register ValVReg,Register PhysReg,CCValAssign VA) assignValueToReg() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp103 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
115 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
116 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
239 void assignValueToReg(Register ValVReg, Register PhysReg, in assignValueToReg()
241 markPhysRegUsed(PhysReg); in assignValueToReg()
242 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); in assignValueToReg()
286 virtual void markPhysRegUsed(MCRegister PhysReg) = 0;
296 void markPhysRegUsed(MCRegister PhysReg) override { in markPhysRegUsed()
297 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
298 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
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