401   MCRegister PhysReg;  in tryAssign()  local
402   for (auto I = Order.begin(), E = Order.end(); I != E && !PhysReg; ++I) {  in tryAssign()
408         PhysReg = *I;  in tryAssign()
411   if (!PhysReg.isValid())  in tryAssign()
412     return PhysReg;  in tryAssign()
439   uint8_t Cost = RegCosts[PhysReg];  in tryAssign()
443     return PhysReg;  in tryAssign()
445   LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << " is available at cost "  in tryAssign()
448   return CheapReg ? CheapReg : PhysReg;  in tryAssign()
482                                  MCRegister PhysReg,  in evictInterference()  argument
489   LLVM_DEBUG(dbgs() << "evicting " << printReg(PhysReg, TRI)  in evictInterference()
494   for (MCRegUnit Unit : TRI->regunits(PhysReg)) {  in evictInterference()
522 bool RegAllocEvictionAdvisor::isUnusedCalleeSavedReg(MCRegister PhysReg) const {  in isUnusedCalleeSavedReg()
523   MCRegister CSR = RegClassInfo.getLastCalleeSavedAlias(PhysReg);  in isUnusedCalleeSavedReg()
527   return !Matrix->isPhysRegUsed(PhysReg);  in isUnusedCalleeSavedReg()
558                                                  MCRegister PhysReg) const {  in canAllocatePhysReg()
559   if (RegCosts[PhysReg] >= CostPerUseLimit)  in canAllocatePhysReg()
563   if (CostPerUseLimit == 1 && isUnusedCalleeSavedReg(PhysReg)) {  in canAllocatePhysReg()
565         dbgs() << printReg(PhysReg, TRI) << " would clobber CSR "  in canAllocatePhysReg()
566                << printReg(RegClassInfo.getLastCalleeSavedAlias(PhysReg), TRI)  in canAllocatePhysReg()
765     if (Cand.PhysReg) {  in growRegion()
1094 RAGreedy::calculateRegionSplitCostAroundReg(MCPhysReg PhysReg,  in calculateRegionSplitCostAroundReg()  argument
1105       if (CandIndex == BestCand || !GlobalCand[CandIndex].PhysReg)  in calculateRegionSplitCostAroundReg()
1122   Cand.reset(IntfCache, PhysReg);  in calculateRegionSplitCostAroundReg()
1127     LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << "\tno positive bundles\n");  in calculateRegionSplitCostAroundReg()
1130   LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI)  in calculateRegionSplitCostAroundReg()
1138                << printReg(GlobalCand[BestCand].PhysReg, TRI) << '\n';  in calculateRegionSplitCostAroundReg()
1177   for (MCPhysReg PhysReg : Order) {  in calculateRegionSplitCost()  local
1178     assert(PhysReg);  in calculateRegionSplitCost()
1179     if (IgnoreCSR && EvictAdvisor->isUnusedCalleeSavedReg(PhysReg))  in calculateRegionSplitCost()
1182     calculateRegionSplitCostAroundReg(PhysReg, Order, BestCost, NumCands,  in calculateRegionSplitCost()
1206       LLVM_DEBUG(dbgs() << "Split for " << printReg(Cand.PhysReg, TRI) << " in "  in doRegionSplit()
1215     assert(!Cand.PhysReg && "Compact region has no physreg");  in doRegionSplit()
1489 void RAGreedy::calcGapWeights(MCRegister PhysReg,  in calcGapWeights()  argument
1505   for (MCRegUnit Unit : TRI->regunits(PhysReg)) {  in calcGapWeights()
1540   for (MCRegUnit Unit : TRI->regunits(PhysReg)) {  in calcGapWeights()
1657   for (MCPhysReg PhysReg : Order) {  in tryLocalSplit()  local
1658     assert(PhysReg);  in tryLocalSplit()
1661     calcGapWeights(PhysReg, GapWeight);  in tryLocalSplit()
1664     if (Matrix->checkRegMaskInterference(VirtReg, PhysReg))  in tryLocalSplit()
1683       LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << ' ' << Uses[SplitBefore]  in tryLocalSplit()
1810     Register PhysReg = tryLocalSplit(VirtReg, Order, NewVRegs);  in trySplit()  local
1811     if (PhysReg || !NewVRegs.empty())  in trySplit()
1812       return PhysReg;  in trySplit()
1825     MCRegister PhysReg = tryRegionSplit(VirtReg, Order, NewVRegs);  in trySplit()  local
1826     if (PhysReg || !NewVRegs.empty())  in trySplit()
1827       return PhysReg;  in trySplit()
1851                                          MCRegister PhysReg,  in assignedRegPartiallyOverlaps()  argument
1854   if (PhysReg == AssignedReg)  in assignedRegPartiallyOverlaps()
1856   return TRI.regsOverlap(PhysReg, AssignedReg);  in assignedRegPartiallyOverlaps()
1868     MCRegister PhysReg, const LiveInterval &VirtReg,  in mayRecolorAllInterferences()  argument
1872   for (MCRegUnit Unit : TRI->regunits(PhysReg)) {  in mayRecolorAllInterferences()
1897             !assignedRegPartiallyOverlaps(*TRI, *VRM, PhysReg, *Intf)) &&  in mayRecolorAllInterferences()
1989   for (MCRegister PhysReg : Order) {  in tryLastChanceRecoloring()  local
1990     assert(PhysReg.isValid());  in tryLastChanceRecoloring()
1992                       << printReg(PhysReg, TRI) << '\n');  in tryLastChanceRecoloring()
1997     if (Matrix->checkInterference(VirtReg, PhysReg) >  in tryLastChanceRecoloring()
2007     if (!mayRecolorAllInterferences(PhysReg, VirtReg, RecoloringCandidates,  in tryLastChanceRecoloring()
2033     Matrix->assign(VirtReg, PhysReg);  in tryLastChanceRecoloring()
2047       return PhysReg;  in tryLastChanceRecoloring()
2051                       << printReg(PhysReg, TRI) << '\n');  in tryLastChanceRecoloring()
2075       MCRegister PhysReg;  in tryLastChanceRecoloring()  local
2076       std::tie(LI, PhysReg) = RecolorStack[I];  in tryLastChanceRecoloring()
2084       MCRegister PhysReg;  in tryLastChanceRecoloring()  local
2085       std::tie(LI, PhysReg) = RecolorStack[I];  in tryLastChanceRecoloring()
2087         Matrix->assign(*LI, PhysReg);  in tryLastChanceRecoloring()
2114     MCRegister PhysReg = selectOrSplitImpl(*LI, NewVRegs, FixedRegisters,  in tryRecoloringCandidates()  local
2120     if (PhysReg == ~0u || (!PhysReg && !LI->empty()))  in tryRecoloringCandidates()
2123     if (!PhysReg) {  in tryRecoloringCandidates()
2130                       << " succeeded with: " << printReg(PhysReg, TRI) << '\n');  in tryRecoloringCandidates()
2132     Matrix->assign(*LI, PhysReg);  in tryRecoloringCandidates()
2175     const LiveInterval &VirtReg, AllocationOrder &Order, MCRegister PhysReg,  in tryAssignCSRFirstTime()  argument
2182       return PhysReg;  in tryAssignCSRFirstTime()
2199       return PhysReg;  in tryAssignCSRFirstTime()
2205   return PhysReg;  in tryAssignCSRFirstTime()
2266                                            MCRegister PhysReg) {  in getBrokenHintFreq()  argument
2269     if (Info.PhysReg != PhysReg)  in getBrokenHintFreq()
2291   MCRegister PhysReg = VRM->getPhys(Reg);  in tryHintRecoloring()  local
2298                     << '(' << printReg(PhysReg, TRI) << ")\n");  in tryHintRecoloring()
2320     if (CurrPhys != PhysReg && (!MRI->getRegClass(Reg)->contains(PhysReg) ||  in tryHintRecoloring()
2321                                 Matrix->checkInterference(LI, PhysReg)))  in tryHintRecoloring()
2332     if (CurrPhys != PhysReg) {  in tryHintRecoloring()
2335       BlockFrequency NewCopiesCost = getBrokenHintFreq(Info, PhysReg);  in tryHintRecoloring()
2349       Matrix->assign(LI, PhysReg);  in tryHintRecoloring()
2417   if (MCRegister PhysReg =  in selectOrSplitImpl()  local
2423         EvictAdvisor->isUnusedCalleeSavedReg(PhysReg) && NewVRegs.empty()) {  in selectOrSplitImpl()
2424       MCRegister CSRReg = tryAssignCSRFirstTime(VirtReg, Order, PhysReg,  in selectOrSplitImpl()
2431       return PhysReg;  in selectOrSplitImpl()
2445     if (Register PhysReg =  in selectOrSplitImpl()  local
2454       if (Hint && Hint != PhysReg)  in selectOrSplitImpl()
2456       return PhysReg;  in selectOrSplitImpl()
2474     Register PhysReg = trySplit(VirtReg, Order, NewVRegs, FixedRegisters);  in selectOrSplitImpl()  local
2475     if (PhysReg || (NewVRegs.size() - NewVRegSizeBefore))  in selectOrSplitImpl()
2476       return PhysReg;  in selectOrSplitImpl()